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Change subject: vendorcode/intel/edk2/edk2-stable202111: Use fixed size struct elements
......................................................................
Patch Set 1:
(1 comment)
File src/vendorcode/intel/edk2/edk2-stable202111/IntelFsp2Pkg/Include/FspEas/FspApi.h:
https://review.coreboot.org/c/coreboot/+/62847/comment/4d0fa0f0_6a9fe118
PS1, Line 147: UINT32
> I swear I brought this up to Nate before, that we should use fixed-size elements for ABIs, never `void *`...
:) understood Tim, I have added this bug into intel<->google sync meeting and let's follow up there.
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Change subject: mb/google/nissa/var/nivviks: Add TcssAuxori for nivviks
......................................................................
mb/google/nissa/var/nivviks: Add TcssAuxori for nivviks
Enable SBU orientation handling by SoC for both USBC port0 and USBC
port1. Nivviks USBC port0 do not have retimer, USBC port1 has redriver,
but that do not flip the data lines. Hence we need to set bits for both
the USBC ports.
BRANCH:None
TEST=emerge-nissa coreboot chromeos-bootimage
Signed-off-by: Usha P <usha.p(a)intel.com>
Change-Id: I219de6092ac9a9c773adbaa99f5a7d6196a2c937
---
M src/mainboard/google/brya/variants/nivviks/overridetree.cb
1 file changed, 1 insertion(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/62731/3
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Change subject: soc/intel/adl: Remove IOM Mctp command from TCSS ASL
......................................................................
Patch Set 2:
(4 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/62861/comment/be2c79fd_3db04a8b
PS2, Line 14: Due to change in hardware sequence
> maybe mention like […]
Done
https://review.coreboot.org/c/coreboot/+/62861/comment/188391bf_23b99d04
PS2, Line 26: MAULIK V VAGHELA
> is your name in git config still set to all caps? 😄
Sorry, this was pushed from my another machine. Corrected now across all machines :)
File src/soc/intel/alderlake/acpi/tcss.asl:
https://review.coreboot.org/c/coreboot/+/62861/comment/646fb26f_82b98c01
PS2, Line 694: /*
: * If the TCSS Deven is cleared by BIOS Mailbox request, then
: * restore to previously saved value of TCSS DEVNE.
: */
: Local0 = 0
: While (\_SB.PCI0.TXHC.VDID == 0xFFFFFFFF) {
: If (DSGS () == 1) {
: DSCR (0)
: }
: Local0++
: If (Local0 == 5) {
: Printf("pCode mailbox command failed.")
: Break
: }
: }
> Is this part still necessary too? I don't see the reference code doing this.
Ack
https://review.coreboot.org/c/coreboot/+/62861/comment/9fcb7704_b545594f
PS2, Line 725: /*
: * If the TCSS Deven in normal state, then Save current TCSS DEVEN value and
: * clear it.
: */
: Local0 = 0
: While (\_SB.PCI0.TXHC.VDID != 0xFFFFFFFF) {
: If (DSGS () == 0) {
: DSCR (1)
: }
: Local0++
: If (Local0 == 5) {
: Printf("pCode mailbox command failed.")
: Break
: }
: }
> Which means DSGS and DSCR are also unused now too I think
Ack.
Agreed Tim..I have removed Mailbox communication part
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Change subject: soc/intel/adl: Remove IOM Mctp command from TCSS ASL
......................................................................
soc/intel/adl: Remove IOM Mctp command from TCSS ASL
TCSS ASL code was carried forward from TGL and it used to follow the same
sequence.
Recently as part of s0ix hang issue, it was found that sending IOM
MCTP command as part of TCSS D3 Cold enter-exit sequence created an
issue.
We discovered that due to change in hardware sequence, ADL should not
set/reset IOM MCTP during D3 cold entry or exit. This patch removes the
bit setting from ASL file to prevent hang in the system.
This patch also removes obsolete Pcode mailbox communication which is
no longer required for ADL.
BUG=b:220796339
BRANCH=firmware-brya-14505.B
TEST=Check if hang issue is resolved with the CL and no other regression
observed
Change-Id: I2f066bcc4a8f475a15ddd12ef5ed87d7298312bb
Signed-off-by: Maulik V Vaghela <maulik.v.vaghela(a)intel.com>
Signed-off-by: Kane Chen <kane.chen(a)intel.com>
---
M src/soc/intel/alderlake/acpi/tcss.asl
1 file changed, 1 insertion(+), 142 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/61/62861/3
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Change subject: mb/google/brask/variants/moli: update overridetree
......................................................................
Patch Set 32:
(1 comment)
Patchset:
PS32:
> Is there a reason this can't be squashed into CB:62321 ?
Ok,
The reason is CB:62321 based on the schematic adl-rfq_mb_20220216.pdf and this CL based on the schematic adl-rfq_mb_20220310.pdf, so i think it should have another CL.
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Change subject: mb/hp/z220_series: Convert z220_sff_workstation into variant
......................................................................
Patch Set 2:
(3 comments)
File src/mainboard/hp/z220_series/Kconfig:
https://review.coreboot.org/c/coreboot/+/62808/comment/3894327a_d08f8c67
PS2, Line 1: ## SPDX-License-Identifier: GPL-2.0-only
> Hmmm, this license header wasn't there before
Happy to remove it if you prefer.
File src/mainboard/hp/z220_series/Kconfig.name:
https://review.coreboot.org/c/coreboot/+/62808/comment/8f559d6e_6caa6d71
PS2, Line 1: ## SPDX-License-Identifier: GPL-2.0-only
> Hmmm, this license header wasn't there before
Ditto
File src/mainboard/hp/z220_series/variants/z220_sff_workstation/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/62808/comment/379f1e24_2edbd5de
PS2, Line 5: subsystemid 0x103c 0x1791 inherit
> Is it necessary to specify the subsystemid here? It's in the devicetree already.
Yes, without this line, the overridetree stops the devicetree from inheriting it because of it being missing.
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Change subject: mb/google/brya/var/banshee: Update DPTF parameters
......................................................................
Patch Set 2:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/62807/comment/058abf49_0c0bd506
PS1, Line 11: 223492897
Please add me in this bug to go through the design suggestions. Thanks.
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Hello Varshit B Pandya, build bot (Jenkins), Subrata Banik, Nick Vaccaro, Eric Lai,
I'd like you to reexamine a change. Please visit
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Change subject: drivers/wifi/generic: Fix properties in generic-under-PCI device case
......................................................................
drivers/wifi/generic: Fix properties in generic-under-PCI device case
In the devicetree case where a generic device underneath the Intel PCI
CNVi device carries the device properties, the incorrect device was
passed to wifi_ssdt_write_properties.
Also while here, update the UUID for `DmaProperty` to match what
Microsoft defined here:
https://docs.microsoft.com/en-us/windows-hardware/drivers/pci/dsd-for-pcie-…
BUG=b:215424986, b:220639445
TEST=dump SSDT and see that _PRW for CNVi device is no longer garbage,
but contains the value from the devicetree (GPE0_PME_B0).
Signed-off-by: Tim Wawrzynczak <twawrzynczak(a)chromium.org>
Change-Id: Iafd86458d2f65ccb7e74d1308d37fd3ebbf7f520
---
M src/drivers/wifi/generic/acpi.c
M src/drivers/wifi/generic/generic.c
2 files changed, 29 insertions(+), 24 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/62746/4
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Change subject: drivers/wifi/generic: Fix properties in generic-under-PCI device case
......................................................................
Patch Set 3:
(1 comment)
Patchset:
PS3:
strict IO/MMU won't work on wifi without this CL I don't think this is getting urgent
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Gerrit-Change-Id: Iafd86458d2f65ccb7e74d1308d37fd3ebbf7f520
Gerrit-Change-Number: 62746
Gerrit-PatchSet: 3
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Attention is currently required from: Varshit B Pandya, Subrata Banik, Paul Menzel, Nick Vaccaro.
Hello Varshit B Pandya, build bot (Jenkins), Subrata Banik, Nick Vaccaro,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/62746
to look at the new patch set (#3).
Change subject: drivers/wifi/generic: Fix properties in generic-under-PCI device case
......................................................................
drivers/wifi/generic: Fix properties in generic-under-PCI device case
In the devicetree case where a generic device underneath the Intel PCI
CNVi device carries the device properties, the incorrect device was
passed to wifi_ssdt_write_properties.
Also while here, update the UUID for `DmaProperty` to match what
Microsoft defined here:
https://docs.microsoft.com/en-us/windows-hardware/drivers/pci/dsd-for-pcie-…
BUG=b:215424986, b:220639445
TEST=dump SSDT and see that _PRW for CNVi device is no longer garbage,
but contains the value from the devicetree (GPE0_PME_B0).
Signed-off-by: Tim Wawrzynczak <twawrzynczak(a)chromium.org>
Change-Id: Iafd86458d2f65ccb7e74d1308d37fd3ebbf7f520
---
M src/drivers/wifi/generic/acpi.c
M src/drivers/wifi/generic/generic.c
2 files changed, 30 insertions(+), 24 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/62746/3
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Iafd86458d2f65ccb7e74d1308d37fd3ebbf7f520
Gerrit-Change-Number: 62746
Gerrit-PatchSet: 3
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