coreboot-gerrit March 2022

coreboot-gerrit@coreboot.org

1 participants
6700 discussions

Change in coreboot[master]: soc/intel/(cnl, jsl, tgl): Enable SOC_INTEL_COMMON_BASECODE
by Tim Wawrzynczak (Code Review) 17 Mar '22

17 Mar '22

Attention is currently required from: Sridhar Siricilla. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62843 ) Change subject: soc/intel/(cnl, jsl, tgl): Enable SOC_INTEL_COMMON_BASECODE ...................................................................... Patch Set 1: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/62843/comment/3ba39ae8_5e0e86e0 PS1, Line 10: acces `access` https://review.coreboot.org/c/coreboot/+/62843/comment/f74e8869_f821dd8a PS1, Line 10: Tiher `Tiger` -- To view, visit https://review.coreboot.org/c/coreboot/+/62843 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie55ded673c8fa0edf2ca6789b15771bd2e56c95e Gerrit-Change-Number: 62843 Gerrit-PatchSet: 1 Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Comment-Date: Thu, 17 Mar 2022 17:23:00 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

Change in coreboot[master]: mb/google/skyrim: Add DXIO descriptors
by build bot (Jenkins) (Code Review) 17 Mar '22

17 Mar '22

Attention is currently required from: Raul Rangel, Karthik Ramasubramanian, Felix Held. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62903 ) Change subject: mb/google/skyrim: Add DXIO descriptors ...................................................................... Patch Set 2: (2 comments) File src/mainboard/google/skyrim/port_descriptors.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-144200): https://review.coreboot.org/c/coreboot/+/62903/comment/07de5c86_609039a2 PS2, Line 22: //.port_params = {PP_PSPP_AC, 0x144, PP_PSPP_DC, 0x133} // TODO: uncomment this when PSPP is working line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-144200): https://review.coreboot.org/c/coreboot/+/62903/comment/bb0f0985_da034f7d PS2, Line 49: //.port_params = {PP_PSPP_AC, 0x144, PP_PSPP_DC, 0x133} // TODO: uncomment this when PSPP is working line over 96 characters -- To view, visit https://review.coreboot.org/c/coreboot/+/62903 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib68cf3d64641b006e0f2c4805af22b44a505a0d1 Gerrit-Change-Number: 62903 Gerrit-PatchSet: 2 Gerrit-Owner: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Thu, 17 Mar 2022 17:20:15 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

Change in coreboot[master]: mb/google/brya: Remove Pcie Generic driver for WWAN
by 9elements QA (Code Review) 17 Mar '22

17 Mar '22

9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62330 ) Change subject: mb/google/brya: Remove Pcie Generic driver for WWAN ...................................................................... Patch Set 14: Automatic boot test returned (PASS/FAIL/TOTAL): 11 / 1 / 12 PASS: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES_ and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/96090 PASS: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/96089 PASS: x86_32 "ThinkPad T500" , build config LENOVO_T500 and payload SeaBIOS : https://lava.9esec.io/r/96088 PASS: x86_32 "HP Z220 SFF Workstation" , build config HP_Z220_SFF_WORKSTATION and payload LinuxBoot_BB_kexec : https://lava.9esec.io/r/96087 PASS: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload TianoCore : https://lava.9esec.io/r/96086 PASS: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload SeaBIOS : https://lava.9esec.io/r/96085 PASS: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload TianoCore : https://lava.9esec.io/r/96084 PASS: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload SeaBIOS : https://lava.9esec.io/r/96083 PASS: x86_64 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_X86_64 and payload SeaBIOS : https://lava.9esec.io/r/96082 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ASAN and payload SeaBIOS : https://lava.9esec.io/r/96081 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ and payload SeaBIOS : https://lava.9esec.io/r/96080 FAIL: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX and payload SeaBIOS : https://lava.9esec.io/r/96079 Please note: This test is under development and might not be accurate at all! -- To view, visit https://review.coreboot.org/c/coreboot/+/62330 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia343c7545cf30bdbcd1de19e5eb84049dbb2977f Gerrit-Change-Number: 62330 Gerrit-PatchSet: 14 Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Cliff Huang <cliff.huang(a)intel.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Thu, 17 Mar 2022 17:18:22 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

Change in coreboot[master]: mb/google/skyrim: Add DXIO descriptors
by build bot (Jenkins) (Code Review) 17 Mar '22

17 Mar '22

Attention is currently required from: Raul Rangel, Karthik Ramasubramanian, Felix Held. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62903 ) Change subject: mb/google/skyrim: Add DXIO descriptors ...................................................................... Patch Set 1: (2 comments) File src/mainboard/google/skyrim/port_descriptors.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-144199): https://review.coreboot.org/c/coreboot/+/62903/comment/4d0e3e20_4cd4d0a4 PS1, Line 21: //.port_params = {PP_PSPP_AC, 0x144, PP_PSPP_DC, 0x133} // TODO: uncomment this when PSPP is working line over 96 characters Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-144199): https://review.coreboot.org/c/coreboot/+/62903/comment/a3b2bcef_d56987f8 PS1, Line 48: //.port_params = {PP_PSPP_AC, 0x144, PP_PSPP_DC, 0x133} // TODO: uncomment this when PSPP is working line over 96 characters -- To view, visit https://review.coreboot.org/c/coreboot/+/62903 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib68cf3d64641b006e0f2c4805af22b44a505a0d1 Gerrit-Change-Number: 62903 Gerrit-PatchSet: 1 Gerrit-Owner: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Thu, 17 Mar 2022 17:14:47 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

Change in coreboot[master]: soc/intel/mtl: Do initial SoC commit till bootblock
by Ravishankar Sarawadi (Code Review) 17 Mar '22

17 Mar '22

Attention is currently required from: Felix Singer, Jamie Ryu, Ethan Tsao, Raj Astekar. Ravishankar Sarawadi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62772 ) Change subject: soc/intel/mtl: Do initial SoC commit till bootblock ...................................................................... Patch Set 3: (1 comment) File meteorlake/bootblock/bootblock.c: PS2: > All the files are placed in the root directory. […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/62772 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I26479fcc3a3f9c6f8ebf5f198ab0809f0b4a2cc4 Gerrit-Change-Number: 62772 Gerrit-PatchSet: 3 Gerrit-Owner: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Ethan Tsao <ethan.tsao(a)intel.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-CC: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.corp-partner.google.com> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Ethan Tsao <ethan.tsao(a)intel.com> Gerrit-Attention: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Comment-Date: Thu, 17 Mar 2022 17:14:38 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Singer <felixsinger(a)posteo.net> Gerrit-MessageType: comment

1 0

Change in coreboot[master]: soc/intel/mtl: Do initial SoC commit till bootblock
by Ravishankar Sarawadi (Code Review) 17 Mar '22

17 Mar '22

Attention is currently required from: Jamie Ryu, Ethan Tsao, Ravishankar Sarawadi, Raj Astekar. Hello build bot (Jenkins), Jamie Ryu, Wonkyu Kim, Ethan Tsao, Raj Astekar, Ravishankar Sarawadi, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/62772 to look at the new patch set (#3). Change subject: soc/intel/mtl: Do initial SoC commit till bootblock ...................................................................... soc/intel/mtl: Do initial SoC commit till bootblock List of changes: 1. Add required SoC programming till bootblock 2. Include only required headers into include/soc 3. Include MTL-P related DID, BDF 4. Ref: Processor EDS documents vol1 #621483, vol2 #640858 Signed-off-by: Ravi Sarawadi <ravishankar.sarawadi(a)intel.corp-partner.google.com> Change-Id: I26479fcc3a3f9c6f8ebf5f198ab0809f0b4a2cc4 --- A src/soc/intel/meteorlake/Kconfig A src/soc/intel/meteorlake/Makefile.inc A src/soc/intel/meteorlake/bootblock/bootblock.c A src/soc/intel/meteorlake/bootblock/pch.c A src/soc/intel/meteorlake/bootblock/report_platform.c A src/soc/intel/meteorlake/include/soc/bootblock.h A src/soc/intel/meteorlake/include/soc/espi.h A src/soc/intel/meteorlake/include/soc/iomap.h A src/soc/intel/meteorlake/include/soc/p2sb.h A src/soc/intel/meteorlake/include/soc/pci_devs.h A src/soc/intel/meteorlake/include/soc/pcr_ids.h A src/soc/intel/meteorlake/include/soc/pm.h A src/soc/intel/meteorlake/include/soc/smbus.h 13 files changed, 1,036 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/72/62772/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/62772 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I26479fcc3a3f9c6f8ebf5f198ab0809f0b4a2cc4 Gerrit-Change-Number: 62772 Gerrit-PatchSet: 3 Gerrit-Owner: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Ethan Tsao <ethan.tsao(a)intel.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <felixsinger(a)posteo.net> Gerrit-CC: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.corp-partner.google.com> Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Ethan Tsao <ethan.tsao(a)intel.com> Gerrit-Attention: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Attention: Raj Astekar <raj.astekar(a)intel.com> Gerrit-MessageType: newpatchset

1 0

Change in coreboot[master]: mb/google/skyrim: Add DXIO descriptors
by Jon Murphy (Code Review) 17 Mar '22

17 Mar '22

Jon Murphy has uploaded a new patch set (#2). ( https://review.coreboot.org/c/coreboot/+/62903 ) Change subject: mb/google/skyrim: Add DXIO descriptors ...................................................................... mb/google/skyrim: Add DXIO descriptors Add Skyrim DXIO descriptors using info from AMD and skyrim bouard shematics. BUG=b:225179599 TEST=Builds Signed-off-by: Jon Murphy <jpmurphy(a)google.com> Change-Id: Ib68cf3d64641b006e0f2c4805af22b44a505a0d1 --- M src/mainboard/google/skyrim/port_descriptors.c M src/mainboard/google/skyrim/variants/baseboard/devicetree.cb M src/mainboard/google/skyrim/variants/baseboard/include/baseboard/variants.h 3 files changed, 118 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/62903/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/62903 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib68cf3d64641b006e0f2c4805af22b44a505a0d1 Gerrit-Change-Number: 62903 Gerrit-PatchSet: 2 Gerrit-Owner: Jon Murphy <jpmurphy(a)google.com> Gerrit-MessageType: newpatchset

1 0

Change in coreboot[master]: mb/google/brya/{}: Add SBU orientation property for Type C Mux
by Tim Wawrzynczak (Code Review) 17 Mar '22

17 Mar '22

Attention is currently required from: Subrata Banik, Maulik V Vaghela, Meera Ravindranath, Nick Vaccaro, Eric Lai, Prashant Malani. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61622 ) Change subject: mb/google/brya/{}: Add SBU orientation property for Type C Mux ...................................................................... Patch Set 5: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/61622/comment/33ed4514_c14ba468 PS5, Line 10: TEST=On Redrix, type-C display verified with normal and inverted `BRANCH=firmware-brya-14505.B` -- To view, visit https://review.coreboot.org/c/coreboot/+/61622 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6f7f9554b75f4d62298aac9938e66c71c3e7cee9 Gerrit-Change-Number: 61622 Gerrit-PatchSet: 5 Gerrit-Owner: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Deepti Deshatty <deepti.deshatty(a)intel.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Prashant Malani <pmalani(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Attention: Prashant Malani <pmalani(a)chromium.org> Gerrit-Comment-Date: Thu, 17 Mar 2022 17:11:16 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

Change in coreboot[master]: mb/google/brya/{}: Add SBU orientation property for Type C Mux
by Tim Wawrzynczak (Code Review) 17 Mar '22

17 Mar '22

Attention is currently required from: Subrata Banik, Maulik V Vaghela, Meera Ravindranath, Nick Vaccaro, Eric Lai, Prashant Malani. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61622 ) Change subject: mb/google/brya/{}: Add SBU orientation property for Type C Mux ...................................................................... Patch Set 5: Code-Review+1 (1 comment) Patchset: PS5: Would love for other folks to verify this as well -- To view, visit https://review.coreboot.org/c/coreboot/+/61622 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6f7f9554b75f4d62298aac9938e66c71c3e7cee9 Gerrit-Change-Number: 61622 Gerrit-PatchSet: 5 Gerrit-Owner: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Deepti Deshatty <deepti.deshatty(a)intel.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Prashant Malani <pmalani(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Attention: Prashant Malani <pmalani(a)chromium.org> Gerrit-Comment-Date: Thu, 17 Mar 2022 17:11:01 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

Change in coreboot[master]: ec/google/chromeec: add fan speed rpm control
by Tim Wawrzynczak (Code Review) 17 Mar '22

17 Mar '22

Attention is currently required from: Sumeet R Pawnikar. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62789 ) Change subject: ec/google/chromeec: add fan speed rpm control ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: is there a corresponding EC CL? -- To view, visit https://review.coreboot.org/c/coreboot/+/62789 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibb1646b1fb1659fd853ece97d97bb9dee2a3f57e Gerrit-Change-Number: 62789 Gerrit-PatchSet: 1 Gerrit-Owner: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Comment-Date: Thu, 17 Mar 2022 17:09:09 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit March 2022