Sridhar Siricilla has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62904 )
Change subject: mb/google/brya: Deselect ALDERLAKE_A0_CONFIGURE_PMC_DESCRIPTOR
......................................................................
Patch Set 2:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/62904/comment/603ad954_772eb54d
PS1, Line 15: TEST=Build the coreboot for Gimble
> can you add a branch tag too please? […]
Done
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Hello build bot (Jenkins), Tim Wawrzynczak,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/62904
to look at the new patch set (#2).
Change subject: mb/google/brya: Deselect ALDERLAKE_A0_CONFIGURE_PMC_DESCRIPTOR
......................................................................
mb/google/brya: Deselect ALDERLAKE_A0_CONFIGURE_PMC_DESCRIPTOR
The patch deselects ALDERLAKE_A0_CONFIGURE_PMC_DESCRIPTOR Kconfig which
updates PMC settings in the IFD for Alder Lake A0 silicon.
As Alder Lake A0 is intermediate stepping, and the IFD is locked in the
production systems, so the Kconfig is deselected.
BUG=b:190588098
BRANCH=firmware-brya-14505.B
TEST=Build the coreboot for Gimble
Signed-off-by: Sridhar Siricilla <sridhar.siricilla(a)intel.com>
Change-Id: I81fe7c792dd82d9d547d318ebda55ee4a0f3ac96
---
M src/mainboard/google/brya/Kconfig
1 file changed, 0 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/62904/2
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Matt DeVillier has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62194 )
Change subject: util/liveiso: Remove coreboot toolchain from todo
......................................................................
Patch Set 6: Code-Review+2
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Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62904 )
Change subject: mb/google/brya: Deselect ALDERLAKE_A0_CONFIGURE_PMC_DESCRIPTOR
......................................................................
Patch Set 1: Code-Review+2
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/62904/comment/00bfe2c9_6a943dd1
PS1, Line 15: TEST=Build the coreboot for Gimble
can you add a branch tag too please?
`BRANCH=firmware-brya-14505.B`
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Sridhar Siricilla has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/62904 )
Change subject: mb/google/brya: Deselect ALDERLAKE_A0_CONFIGURE_PMC_DESCRIPTOR
......................................................................
mb/google/brya: Deselect ALDERLAKE_A0_CONFIGURE_PMC_DESCRIPTOR
The patch deselects ALDERLAKE_A0_CONFIGURE_PMC_DESCRIPTOR Kconfig which
updates PMC settings in the IFD for Alder Lake A0 silicon.
As Alder Lake A0 is intermediate stepping, and the IFD is locked in the
production systems, so the Kconfig is deselected.
BUG=b:190588098
TEST=Build the coreboot for Gimble
Signed-off-by: Sridhar Siricilla <sridhar.siricilla(a)intel.com>
Change-Id: I81fe7c792dd82d9d547d318ebda55ee4a0f3ac96
---
M src/mainboard/google/brya/Kconfig
1 file changed, 0 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/62904/1
diff --git a/src/mainboard/google/brya/Kconfig b/src/mainboard/google/brya/Kconfig
index 1d29b6f..199db11 100644
--- a/src/mainboard/google/brya/Kconfig
+++ b/src/mainboard/google/brya/Kconfig
@@ -1,6 +1,5 @@
config BOARD_GOOGLE_BRYA_COMMON
def_bool n
- select ALDERLAKE_A0_CONFIGURE_PMC_DESCRIPTOR
select BOARD_ROMSIZE_KB_32768
select CR50_USE_LONG_INTERRUPT_PULSES
select DRIVERS_GENERIC_ALC1015
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Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62847 )
Change subject: vendorcode/intel/edk2/edk2-stable202111: Use fixed size struct elements
......................................................................
Patch Set 1: Code-Review+2
(1 comment)
File src/vendorcode/intel/edk2/edk2-stable202111/IntelFsp2Pkg/Include/FspEas/FspApi.h:
https://review.coreboot.org/c/coreboot/+/62847/comment/37f1a8ff_89db06c0
PS1, Line 147: UINT32
> > I swear I brought this up to Nate before, that we should use fixed-size elements for ABIs, never ` […]
Thanks!
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Change subject: drivers/intel/fsp2_0: Add support for FSP_NON_VOLATILE_STORAGE_HOB2
......................................................................
Patch Set 43: Code-Review+1
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/59638/comment/aee6a8c6_d3def64c
PS43, Line 12:
Can we add just a little bit about the motiviation for STORAGE_HOB2 vs. STORAGE_HOB here so folks can follow along?
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Change subject: mb/google/brya/{}: Add SBU orientation property for Type C Mux
......................................................................
Patch Set 5:
(1 comment)
Patchset:
PS5:
> Deepti, Could you provide more detailed verification/validation results regarding this? The CL chang […]
Sorry, I meant Meera.
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Change subject: mb/google/brya/{}: Add SBU orientation property for Type C Mux
......................................................................
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Patchset:
PS5:
Deepti, Could you provide more detailed verification/validation results regarding this? The CL changes a bunch of variants, and a sole DP test on Redrix is insufficient.
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Change subject: vendorcode/intel/edk2/edk2-stable202111: Use fixed size struct elements
......................................................................
Patch Set 1: Code-Review+1
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