coreboot-gerrit March 2022

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Change in coreboot[master]: include/efi: Add EFI Status code definitions
by Subrata Banik (Code Review) 22 Mar '22

22 Mar '22

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/63006 to look at the new patch set (#2). Change subject: include/efi: Add EFI Status code definitions ...................................................................... include/efi: Add EFI Status code definitions This patch adds EFI status code macros in `efi_datatype.h` to implement FSP debug event handler natively in coreboot. Added `PiStatusCode.h` and `StatusCodeDataTypeId.h` files for `UDK base >= 2017`, as these files were added with UDK version 2017. BUG=b:225544587 TEST=Able to build and boot Brya. Signed-off-by: Subrata Banik <subratabanik(a)google.com> Change-Id: Ib2debb6a50581456783dc9f22f892f8f92a25509 --- M src/include/efi/efi_datatype.h 1 file changed, 12 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/63006/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/63006 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib2debb6a50581456783dc9f22f892f8f92a25509 Gerrit-Change-Number: 63006 Gerrit-PatchSet: 2 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: Documentation: Move documentation license to main menu
by Felix Singer (Code Review) 22 Mar '22

22 Mar '22

Attention is currently required from: Nico Huber, Patrick Georgi, Paul Menzel, Angel Pons, Michael Niewöhner, Patrick Rudolph. Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62767 ) Change subject: Documentation: Move documentation license to main menu ...................................................................... Patch Set 4: (1 comment) File Documentation/contributing/documentation_license.md: https://review.coreboot.org/c/coreboot/+/62767/comment/d87598d6_9f160464 PS1, Line 3: Documentation/ > Yes, I think that's better. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/62767 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8bfc4f52da8a93d78a62e3a68fd6f1dc8ae4d335 Gerrit-Change-Number: 62767 Gerrit-PatchSet: 4 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Tue, 22 Mar 2022 22:21:21 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Singer <felixsinger(a)posteo.net> Comment-In-Reply-To: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-MessageType: comment

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Change in coreboot[master]: payloads/iPXE: Update stable version from 2019.3 to to 2022.1
by 9elements QA (Code Review) 22 Mar '22

22 Mar '22

9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62289 ) Change subject: payloads/iPXE: Update stable version from 2019.3 to to 2022.1 ...................................................................... Patch Set 6: Automatic boot test returned (PASS/FAIL/TOTAL): 11 / 1 / 12 PASS: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES_ and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/96599 PASS: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/96598 PASS: x86_32 "ThinkPad T500" , build config LENOVO_T500 and payload SeaBIOS : https://lava.9esec.io/r/96597 PASS: x86_32 "HP Z220 SFF Workstation" , build config HP_Z220_SFF_WORKSTATION and payload LinuxBoot_BB_kexec : https://lava.9esec.io/r/96596 PASS: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload TianoCore : https://lava.9esec.io/r/96595 PASS: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload SeaBIOS : https://lava.9esec.io/r/96594 PASS: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload TianoCore : https://lava.9esec.io/r/96593 PASS: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload SeaBIOS : https://lava.9esec.io/r/96592 PASS: x86_64 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_X86_64 and payload SeaBIOS : https://lava.9esec.io/r/96591 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ASAN and payload SeaBIOS : https://lava.9esec.io/r/96590 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ and payload SeaBIOS : https://lava.9esec.io/r/96589 FAIL: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX and payload SeaBIOS : https://lava.9esec.io/r/96588 Please note: This test is under development and might not be accurate at all! -- To view, visit https://review.coreboot.org/c/coreboot/+/62289 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ide12a3a3082f9ea027e180518a80e6c0772b1232 Gerrit-Change-Number: 62289 Gerrit-PatchSet: 6 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Martin L Roth <martinroth(a)google.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Christian Walter <christian.walter(a)9elements.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Tue, 22 Mar 2022 21:41:58 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: libpayload/vboot: Fix include paths fixup macro
by Julius Werner (Code Review) 22 Mar '22

22 Mar '22

Attention is currently required from: Jakub Czapiga. Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63002 ) Change subject: libpayload/vboot: Fix include paths fixup macro ...................................................................... Patch Set 1: Code-Review+2 (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/63002/comment/44c26bc0_670bdd53 PS1, Line 11: ti to File payloads/libpayload/vboot/Makefile.inc: https://review.coreboot.org/c/coreboot/+/63002/comment/5d8a8458_fc62342b PS1, Line 15: )% Doesn't make much of a difference, but for consistency you should either have the slash here in both lines or in neither. -- To view, visit https://review.coreboot.org/c/coreboot/+/63002 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I264e715fa879a4e56b6e5f5423916298e8780a2b Gerrit-Change-Number: 63002 Gerrit-PatchSet: 1 Gerrit-Owner: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Comment-Date: Tue, 22 Mar 2022 21:17:22 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: drivers/intel/fsp2_0: Add native implementation for FSP Debug Handler
by build bot (Jenkins) (Code Review) 22 Mar '22

22 Mar '22

Attention is currently required from: Andrey Petrov. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63007 ) Change subject: drivers/intel/fsp2_0: Add native implementation for FSP Debug Handler ...................................................................... Patch Set 1: (2 comments) File src/drivers/intel/fsp2_0/fsp_debug_event.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-144491): https://review.coreboot.org/c/coreboot/+/63007/comment/afaa36bd_b432d87d PS1, Line 24: if (!fsp_guid_compare ((uint8_t *)&(data->Type), fsp_string_type_guid)) space prohibited between function name and open parenthesis '(' File src/drivers/intel/fsp2_0/memory_init.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-144491): https://review.coreboot.org/c/coreboot/+/63007/comment/d2114d45_518a80d0 PS1, Line 185: arch_upd->FspEventHandler = (UINT32)((FSP_EVENT_HANDLER *)fsp_debug_event_handler); line over 96 characters -- To view, visit https://review.coreboot.org/c/coreboot/+/63007 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1018e67d70492b18c76531f9e78d3b58fa435cd4 Gerrit-Change-Number: 63007 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Comment-Date: Tue, 22 Mar 2022 21:13:04 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/alderlake: Enable FSP_DEBUG_EVENT_HANDLER_IN_COREBOOT Kconfig
by Subrata Banik (Code Review) 22 Mar '22

22 Mar '22

Attention is currently required from: Tim Wawrzynczak. Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/63009 ) Change subject: soc/intel/alderlake: Enable FSP_DEBUG_EVENT_HANDLER_IN_COREBOOT Kconfig ...................................................................... soc/intel/alderlake: Enable FSP_DEBUG_EVENT_HANDLER_IN_COREBOOT Kconfig This patch uses the FSP event handler feature and updates with coreboot native debug implementation to unify the debug library between coreboot and FSP. BUG=b:225544587 TEST=Able to build and boot Brya with the same FSP debug log before and with this code changes. Before: Register PPI Notify: DCD0BE23-9586-40F4-B643-06522CED4EDE Install PPI: 8C8CE578-8A3D-4F1C-9935-896185C32DD3 Install PPI: 5473C07A-3DCB-4DCA-BD6F-1E9689E7349A The 0th FV start address is 0x000F961B000, size is 0x00150000, handle is 0xF961B000 Register PPI Notify: 49EDB1C1-BF21-4761-BB12-EB0031AABB39 Register PPI Notify: EA7CA24B-DED5-4DAD-A389-BF827E8F9B38 Install PPI: B9E0ABFE-5979-4914-977F-6DEE78C278A6 With this code change: [SPEW ] Register PPI Notify: DCD0BE23-9586-40F4-B643-06522CED4EDE [SPEW ] Install PPI: 8C8CE578-8A3D-4F1C-9935-896185C32DD3 [SPEW ] Install PPI: 5473C07A-3DCB-4DCA-BD6F-1E9689E7349A [SPEW ] The 0th FV start address is 0x000F95C0000, size is 0x00160000, handle is 0xF95C0000 [SPEW ] Register PPI Notify: 49EDB1C1-BF21-4761-BB12-EB0031AABB39 [SPEW ] Register PPI Notify: EA7CA24B-DED5-4DAD-A389-BF827E8F9B38 [SPEW ] Install PPI: B9E0ABFE-5979-4914-977F-6DEE78C278A6 Signed-off-by: Subrata Banik <subratabanik(a)google.com> Change-Id: I4a0530a282657e379a00c3e7d0ed8148dd5e9196 --- M src/soc/intel/alderlake/Kconfig 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/09/63009/1 diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig index 38415e6..b087853 100644 --- a/src/soc/intel/alderlake/Kconfig +++ b/src/soc/intel/alderlake/Kconfig @@ -40,6 +40,7 @@ select DRIVERS_USB_ACPI select FSP_COMPRESS_FSP_S_LZ4 select FAST_SPI_SUPPORTS_EXT_BIOS_WINDOW + select FSP_DEBUG_EVENT_HANDLER_IN_COREBOOT select FSP_M_XIP select FSP_STATUS_GLOBAL_RESET_REQUIRED_3 select FSPS_HAS_ARCH_UPD -- To view, visit https://review.coreboot.org/c/coreboot/+/63009 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4a0530a282657e379a00c3e7d0ed8148dd5e9196 Gerrit-Change-Number: 63009 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/intel/alderlake: Use coreboot native event handler for FSP-S
by Subrata Banik (Code Review) 22 Mar '22

22 Mar '22

Attention is currently required from: Tim Wawrzynczak. Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/63008 ) Change subject: soc/intel/alderlake: Use coreboot native event handler for FSP-S ...................................................................... soc/intel/alderlake: Use coreboot native event handler for FSP-S This patch assigns FSP handler event for FSP-S with coreboot ramstage debug handler when FSP_DEBUG_EVENT_HANDLER_IN_COREBOOT Kconfig is enabled. BUG=b:225544587 TEST=Able to build and boot brya. Also, verified the FSP-S debug log is exactly same before and with this code change. Signed-off-by: Subrata Banik <subratabanik(a)google.com> Change-Id: I665def977faaae45f6f834d75e8456859093ba49 --- M src/soc/intel/alderlake/fsp_params.c 1 file changed, 3 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/08/63008/1 diff --git a/src/soc/intel/alderlake/fsp_params.c b/src/soc/intel/alderlake/fsp_params.c index 4a27cb5..dfa496f 100644 --- a/src/soc/intel/alderlake/fsp_params.c +++ b/src/soc/intel/alderlake/fsp_params.c @@ -7,6 +7,7 @@ #include <device/pci.h> #include <device/pci_ids.h> #include <fsp/api.h> +#include <fsp/fsp_debug_event.h> #include <fsp/ppi/mp_service_ppi.h> #include <fsp/util.h> #include <option.h> @@ -509,6 +510,8 @@ static void fill_fsps_uart_params(FSP_S_CONFIG *s_cfg, const struct soc_intel_alderlake_config *config) { + if (CONFIG(FSP_DEBUG_EVENT_HANDLER_IN_COREBOOT)) + s_cfg->FspEventHandler = (UINT32)((FSP_EVENT_HANDLER *)fsp_debug_event_handler); /* PCH UART selection for FSP Debug */ s_cfg->SerialIoDebugUartNumber = CONFIG_UART_FOR_CONSOLE; ASSERT(ARRAY_SIZE(s_cfg->SerialIoUartAutoFlow) > CONFIG_UART_FOR_CONSOLE); -- To view, visit https://review.coreboot.org/c/coreboot/+/63008 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I665def977faaae45f6f834d75e8456859093ba49 Gerrit-Change-Number: 63008 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: newchange

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Change in coreboot[master]: drivers/intel/fsp2_0: Add native implementation for FSP Debug Handler
by Subrata Banik (Code Review) 22 Mar '22

22 Mar '22

Attention is currently required from: Andrey Petrov. Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/63007 ) Change subject: drivers/intel/fsp2_0: Add native implementation for FSP Debug Handler ...................................................................... drivers/intel/fsp2_0: Add native implementation for FSP Debug Handler This patch implements coreboot native debug handler to manage the FSP event messages. `FSP Event Handlers` feature introduced in FSP to generate event messages to aid in the debugging of firmware issues. This eliminates the need for FSP to directly write debug messages to the UART and FSP might not need to know the board related UART port configuration. Instead FSP signals the bootloader to inform it of a new debug message. This allows the coreboot to provide board specific methods of reporting debug messages, example: legacy UART or LPSS UART etc. This implementation has several advantages as: 1. FSP relies on XIP `DebugLib` driver even while printing FSP-S debug messages, hence, without ROM being cached, post `romstage` would results into sluggish boot with FSP debug enabled. This patch utilities coreboot native debug implementation which is XIP during FSP-M and relocatable to DRAM based resource for FSP-S. 2. This patch simplifies the FSP DebugLib implementation and remove the need to have serialport library. Instead coreboot `printk` can be used for display FSP serial messages. Additionally, unifies the debug library between coreboot and FSP. 3. This patch is also useful to get debug prints even with FSP non-serial image (refer to `Note` below) as FSP PEIMs are now leveraging coreboot debug library instead FSP `NULL` DebugLib reference for release build. 4. Can optimize the FSP binary size by removing the DebugLib dependency from most of FSP PEIMs, for example: on Alder Lake FSP-M debug binary size is reduced by ~100KB+ and FSP-S debug library size is also reduced by ~300KB+ (FSP-S debug and release binary size is exactly same with this code changes). The total savings is ~400KB for each FSP copy, and in case of Chrome AP firmware with 3 copies, the total savings would be 400KB * 3 = ~1.2MB. Note: Need to modify FSP source code to remove `MDEPKG_NDEBUG` as compilation flag for release build and generate FSP binary with non-NULL FSP debug wrapper module injected (to allow FSP event handler to execute even with FSP non-serial image) in the final FSP.fd. Additionally, this patch assigns FSP handler event for FSP-M with coreboot romstage debug handler when FSP_DEBUG_EVENT_HANDLER_IN_COREBOOT Kconfig is enabled. BUG=b:225544587 TEST=Able to build and boot brya. Also, verified the FSP-M debug log is exactly same before and with this code change. Signed-off-by: Subrata Banik <subratabanik(a)google.com> Change-Id: I1018e67d70492b18c76531f9e78d3b58fa435cd4 --- M src/drivers/intel/fsp2_0/Kconfig M src/drivers/intel/fsp2_0/Makefile.inc A src/drivers/intel/fsp2_0/fsp_debug_event.c A src/drivers/intel/fsp2_0/include/fsp/fsp_debug_event.h M src/drivers/intel/fsp2_0/memory_init.c 5 files changed, 60 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/63007/1 diff --git a/src/drivers/intel/fsp2_0/Kconfig b/src/drivers/intel/fsp2_0/Kconfig index fdea4b8..9ba648d 100644 --- a/src/drivers/intel/fsp2_0/Kconfig +++ b/src/drivers/intel/fsp2_0/Kconfig @@ -352,4 +352,11 @@ to perform the required lock down and chipset register configuration prior boot to payload. +config FSP_DEBUG_EVENT_HANDLER_IN_COREBOOT + bool + default n + help + This option allows to create `Debug Event Handler` to print message to debug output + device using coreboot native implementation. + endif diff --git a/src/drivers/intel/fsp2_0/Makefile.inc b/src/drivers/intel/fsp2_0/Makefile.inc index eaf99d1..0abf024 100644 --- a/src/drivers/intel/fsp2_0/Makefile.inc +++ b/src/drivers/intel/fsp2_0/Makefile.inc @@ -5,6 +5,7 @@ bootblock-$(CONFIG_FSP_CAR) += fspt_report.c romstage-y += debug.c +romstage-$(CONFIG_FSP_DEBUG_EVENT_HANDLER_IN_COREBOOT) += fsp_debug_event.c romstage-y += hand_off_block.c romstage-$(CONFIG_DISPLAY_FSP_HEADER) += header_display.c romstage-$(CONFIG_DISPLAY_HOBS) += hob_display.c @@ -16,6 +17,7 @@ romstage-y += cbmem.c ramstage-y += debug.c +ramstage-$(CONFIG_FSP_DEBUG_EVENT_HANDLER_IN_COREBOOT) += fsp_debug_event.c ramstage-$(CONFIG_USE_INTEL_FSP_MP_INIT) += fsp_mpinit.c ramstage-$(CONFIG_RUN_FSP_GOP) += graphics.c ramstage-y += hand_off_block.c diff --git a/src/drivers/intel/fsp2_0/fsp_debug_event.c b/src/drivers/intel/fsp2_0/fsp_debug_event.c new file mode 100644 index 0000000..a347829 --- /dev/null +++ b/src/drivers/intel/fsp2_0/fsp_debug_event.c @@ -0,0 +1,28 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <console/console.h> +#include <fsp/api.h> +#include <fsp/fsp_debug_event.h> +#include <fsp/util.h> + +static const uint8_t fsp_string_type_guid[16] = { + 0x80, 0x10, 0xd1, 0x92, 0x6f, 0x49, 0x95, 0x4d, + 0xbe, 0x7e, 0x03, 0x74, 0x88, 0x38, 0x2b, 0x0a +}; + +static efi_return_status_t print_fsp_string_data(const efi_status_code_data_t *data) +{ + printk(BIOS_SPEW, "%s", ((efi_status_code_string_data *) data)->String.Ascii); + + return FSP_SUCCESS; +} + +efi_return_status_t fsp_debug_event_handler(efi_status_code_type_t ignored1, + efi_status_code_value_t ignored2, efi_uint32_t ignored3, efi_guid_t *ignored4, + efi_status_code_data_t *data) +{ + if (!fsp_guid_compare ((uint8_t *)&(data->Type), fsp_string_type_guid)) + return FSP_NOT_FOUND; + + return print_fsp_string_data(data); +} diff --git a/src/drivers/intel/fsp2_0/include/fsp/fsp_debug_event.h b/src/drivers/intel/fsp2_0/include/fsp/fsp_debug_event.h new file mode 100644 index 0000000..7d50c1e --- /dev/null +++ b/src/drivers/intel/fsp2_0/include/fsp/fsp_debug_event.h @@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef FSP_DEBUG_EVENT_H +#define FSP_DEBUG_EVENT_H + +/* + * This file to implement FSP_EVENT_HANDLER for Intel FSP to use. + * More details about this structure can be found here : + * http://github.com/tianocore/edk2/blob/master/IntelFsp2Pkg/Include/FspEas/Fs… + */ +#include <efi/efi_datatype.h> +#include <fsp/soc_binding.h> + +/* fsp debug event handler */ +efi_return_status_t fsp_debug_event_handler(efi_status_code_type_t ignored1, + efi_status_code_value_t ignored2, efi_uint32_t ignored3, efi_guid_t *ignored4, + efi_status_code_data_t *data); + +#endif /* FSP_DEBUG_EVENT_H */ diff --git a/src/drivers/intel/fsp2_0/memory_init.c b/src/drivers/intel/fsp2_0/memory_init.c index 1612089..6569dc2 100644 --- a/src/drivers/intel/fsp2_0/memory_init.c +++ b/src/drivers/intel/fsp2_0/memory_init.c @@ -10,6 +10,7 @@ #include <console/console.h> #include <elog.h> #include <fsp/api.h> +#include <fsp/fsp_debug_event.h> #include <fsp/util.h> #include <memrange.h> #include <mrc_cache.h> @@ -180,6 +181,9 @@ printk(BIOS_SPEW, "bootmode is set to: %d\n", arch_upd->BootMode); + if (CONFIG(FSP_DEBUG_EVENT_HANDLER_IN_COREBOOT)) + arch_upd->FspEventHandler = (UINT32)((FSP_EVENT_HANDLER *)fsp_debug_event_handler); + return CB_SUCCESS; } -- To view, visit https://review.coreboot.org/c/coreboot/+/63007 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1018e67d70492b18c76531f9e78d3b58fa435cd4 Gerrit-Change-Number: 63007 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: include/efi: Add EFI Status code definitions
by Subrata Banik (Code Review) 22 Mar '22

22 Mar '22

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/63006 ) Change subject: include/efi: Add EFI Status code definitions ...................................................................... include/efi: Add EFI Status code definitions This patch adds EFI status code macros in `efi_datatype.h` to implement FSP debug event handler natively in coreboot. Added `PiStatusCode.h` and `StatusCodeDataTypeId.h` files for `UDK base >= 2017`, as these files were added with UDK version 2017. BUG=b:225544587 TEST=Able to build and boot Brya. Signed-off-by: Subrata Banik <subratabanik(a)google.com> Change-Id: Ib2debb6a50581456783dc9f22f892f8f92a25509 --- M src/include/efi/efi_datatype.h 1 file changed, 12 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/63006/1 diff --git a/src/include/efi/efi_datatype.h b/src/include/efi/efi_datatype.h index 7eefad3..318fa06 100644 --- a/src/include/efi/efi_datatype.h +++ b/src/include/efi/efi_datatype.h @@ -7,12 +7,22 @@ #include <Uefi/UefiBaseType.h> #if CONFIG_UDK_VERSION >= CONFIG_UDK_2017_VERSION +#include <Guid/StatusCodeDataTypeId.h> #include <Pi/PiPeiCis.h> +#include <Pi/PiStatusCode.h> /* Data structure for EFI_PEI_SERVICE. */ typedef EFI_PEI_SERVICES efi_pei_services; /* Structure that describes information about a logical CPU. */ typedef EFI_PROCESSOR_INFORMATION efi_processor_information; +/* Status code type definition */ +typedef EFI_STATUS_CODE_TYPE efi_status_code_type_t; +/* Status value type definition */ +typedef EFI_STATUS_CODE_VALUE efi_status_code_value_t; +/* Status data type definition */ +typedef EFI_STATUS_CODE_DATA efi_status_code_data_t; +/* Status string data type definition */ +typedef EFI_STATUS_CODE_STRING_DATA efi_status_code_string_data; #endif /* Basic Data types */ @@ -44,6 +54,8 @@ typedef INTN efi_intn_t; /* Status codes common to all execution phases */ typedef EFI_STATUS efi_return_status_t; +/* 128-bit buffer containing a unique identifier value */ +typedef EFI_GUID efi_guid_t; /* Data structure for EFI_PHYSICAL_ADDRESS */ typedef EFI_PHYSICAL_ADDRESS efi_physical_address; -- To view, visit https://review.coreboot.org/c/coreboot/+/63006 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib2debb6a50581456783dc9f22f892f8f92a25509 Gerrit-Change-Number: 63006 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: payloads/iPXE: Update stable version from 2019.3 to to 2022.1
by Michał Żygowski (Code Review) 22 Mar '22

22 Mar '22

Michał Żygowski has submitted this change. ( https://review.coreboot.org/c/coreboot/+/62289 ) Change subject: payloads/iPXE: Update stable version from 2019.3 to to 2022.1 ...................................................................... payloads/iPXE: Update stable version from 2019.3 to to 2022.1 Update iPXE stable from commit id ebf2eaf515: Mar 18 10:24:08 2019 +0000 [intel] Add PCI ID for I219-V and -LM 6 to 9 to commit id 6ba671acd9: Jan 17 16:17:17 2022 +0000 [efi] Attempt to fetch autoexec script via TFTP This brings in 424 new commits and fixes the build with coreboot-sdk 2021-09-23_b0d87f753c. TEST=Build PC Engines apu2 board and boot it over network with the iPXE Signed-off-by: Michał Żygowski <michal.zygowski(a)3mdeb.com> Change-Id: Ide12a3a3082f9ea027e180518a80e6c0772b1232 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62289 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> --- M payloads/external/iPXE/Kconfig M payloads/external/iPXE/Makefile 2 files changed, 4 insertions(+), 4 deletions(-) Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved diff --git a/payloads/external/iPXE/Kconfig b/payloads/external/iPXE/Kconfig index 6c8049a..645d41b 100644 --- a/payloads/external/iPXE/Kconfig +++ b/payloads/external/iPXE/Kconfig @@ -31,12 +31,12 @@ depends on BUILD_IPXE config IPXE_STABLE - bool "2019.3" + bool "2022.1" help iPXE uses a rolling release with no stable version, for reproducibility, use the last commit of a given month as the 'stable' version. - This is iPXE from the end of March, 2019. + This is iPXE from the end of January, 2022. config IPXE_MASTER bool "master" diff --git a/payloads/external/iPXE/Makefile b/payloads/external/iPXE/Makefile index 3e12f61..b6aa1b6 100644 --- a/payloads/external/iPXE/Makefile +++ b/payloads/external/iPXE/Makefile @@ -1,8 +1,8 @@ ## SPDX-License-Identifier: GPL-2.0-only -# 2019.3 - Last commit of March 2019 +# 2022.1 - Last commit of January 2022 # When updating, change the name both here and in payloads/external/iPXE/Kconfig -STABLE_COMMIT_ID=ebf2eaf515e46abd43bc798e7e4ba77bfe529218 +STABLE_COMMIT_ID=6ba671acd922ee046b257c5119b8a0f64d275473 TAG-$(CONFIG_IPXE_MASTER)=origin/master TAG-$(CONFIG_IPXE_STABLE)=$(STABLE_COMMIT_ID) 4 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. -- To view, visit https://review.coreboot.org/c/coreboot/+/62289 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ide12a3a3082f9ea027e180518a80e6c0772b1232 Gerrit-Change-Number: 62289 Gerrit-PatchSet: 6 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Martin L Roth <martinroth(a)google.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Christian Walter <christian.walter(a)9elements.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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