coreboot-gerrit March 2022

coreboot-gerrit@coreboot.org

1 participants
6700 discussions

Change in coreboot[master]: include/efi: Add correct header file for EFI_PROCESSOR_INFORMATION
by Tim Wawrzynczak (Code Review) 23 Mar '22

23 Mar '22

Attention is currently required from: Subrata Banik. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63010 ) Change subject: include/efi: Add correct header file for EFI_PROCESSOR_INFORMATION ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/63010 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4c0ca4f8876e46f1748ffc9e3b90de00ead80ebd Gerrit-Change-Number: 63010 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Comment-Date: Wed, 23 Mar 2022 15:30:33 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

Change in coreboot[master]: driver/wifi: Add _DSM method for DDRRFIM
by Tim Wawrzynczak (Code Review) 23 Mar '22

23 Mar '22

Attention is currently required from: Varshit B Pandya, Subrata Banik, Maulik V Vaghela, Paul Menzel, Sugnan Prabhu S, Tim Wawrzynczak. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61020 ) Change subject: driver/wifi: Add _DSM method for DDRRFIM ...................................................................... Patch Set 23: Code-Review+1 (2 comments) File src/drivers/wifi/generic/acpi.c: https://review.coreboot.org/c/coreboot/+/61020/comment/ed4d1a60_53d16bba PS23, Line 157: bool *is_cnvi_ddr_rfim_enabled = NULL; : is_cnvi_ddr_rfim_enabled = (bool *)ptr; : acpigen_write_return_integer(*is_cnvi_ddr_rfim_enabled); nit: I would simplify this to: ``` const bool is_cnvi_ddr_rfim_enabled = *(bool *)ptr; acpigen_write_return_integer(is_cnvi_ddr_rfim_enabled ? 1 : 0); ``` https://review.coreboot.org/c/coreboot/+/61020/comment/3bfedbc0_7d86eec6 PS23, Line 540: if (dev) `if (dev && config)` -- To view, visit https://review.coreboot.org/c/coreboot/+/61020 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I217b736df3d4224a6732d1941a160abcddbd8f37 Gerrit-Change-Number: 61020 Gerrit-PatchSet: 23 Gerrit-Owner: Varshit B Pandya <varshit.b.pandya(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Sugnan Prabhu S <sugnan.prabhu.s(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Reviewer: Varshit B Pandya <varshit.b.pandya(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Haribalaraman Ramasubramanian <haribalaraman.r(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-CC: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Attention: Varshit B Pandya <varshit.b.pandya(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Sugnan Prabhu S <sugnan.prabhu.s(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Comment-Date: Wed, 23 Mar 2022 15:29:04 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

Change in coreboot[master]: 3rdparty/blobs: Reference newer version of submodule
by Karthik Ramasubramanian (Code Review) 23 Mar '22

23 Mar '22

Attention is currently required from: Robert Zieba, Raul Rangel, Felix Held. Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63027 ) Change subject: 3rdparty/blobs: Reference newer version of submodule ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/63027 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iee7a8c550a69bc50b82850b9bfac1a8ca5229557 Gerrit-Change-Number: 63027 Gerrit-PatchSet: 1 Gerrit-Owner: Robert Zieba <robertzieba(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-CC: Eric Peers <epeers(a)google.com> Gerrit-Attention: Robert Zieba <robertzieba(a)google.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Wed, 23 Mar 2022 15:25:43 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

Change in coreboot[master]: 3rdparty/blobs: Reference newer version of submodule
by Robert Zieba (Code Review) 23 Mar '22

23 Mar '22

Robert Zieba has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/63027 ) Change subject: 3rdparty/blobs: Reference newer version of submodule ...................................................................... 3rdparty/blobs: Reference newer version of submodule This submodule was updated by CL 62963. This commit references the updated version of that submodule. BUG=b:224884904 Signed-off-by: Robert Zieba <robertzieba(a)google.com> Change-Id: Iee7a8c550a69bc50b82850b9bfac1a8ca5229557 --- M 3rdparty/blobs 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/63027/1 diff --git a/3rdparty/blobs b/3rdparty/blobs index f14575c..8c580e5 160000 --- a/3rdparty/blobs +++ b/3rdparty/blobs @@ -1 +1 @@ -Subproject commit f14575cb9924b051cedfb4c1f62e3640b25f9dbd +Subproject commit 8c580e55da92252fa665b5038b87100d0e076d23 -- To view, visit https://review.coreboot.org/c/coreboot/+/63027 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iee7a8c550a69bc50b82850b9bfac1a8ca5229557 Gerrit-Change-Number: 63027 Gerrit-PatchSet: 1 Gerrit-Owner: Robert Zieba <robertzieba(a)google.com> Gerrit-MessageType: newchange

1 0

Change in coreboot[master]: soc/qualcomm/common: verify size of memchipinfo structure
by build bot (Jenkins) (Code Review) 23 Mar '22

23 Mar '22

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63026 ) Change subject: soc/qualcomm/common: verify size of memchipinfo structure ...................................................................... Patch Set 1: (2 comments) File src/commonlib/bsd/include/commonlib/bsd/mem_chip_info.h: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-144565): https://review.coreboot.org/c/coreboot/+/63026/comment/5f54e761_24e2d17b PS1, Line 28: static inline size_t mem_chip_info_size(struct mem_chip_info *info) { open brace '{' following function definitions go on the next line Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-144565): https://review.coreboot.org/c/coreboot/+/63026/comment/2c900641_97d69f3b PS1, Line 29: return sizeof(*info) + sizeof(info->channel[0]) * info->num_channels; please, no spaces at the start of a line -- To view, visit https://review.coreboot.org/c/coreboot/+/63026 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0d59669adaf287d0eb7b58ccb0fe3f98e3d23281 Gerrit-Change-Number: 63026 Gerrit-PatchSet: 1 Gerrit-Owner: Ravi Kumar Bokka <rbokka(a)codeaurora.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 23 Mar 2022 15:17:22 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

Change in coreboot[master]: HACK trogdor: optimize coreboot.rom for T32 flash script HACK
by build bot (Jenkins) (Code Review) 23 Mar '22

23 Mar '22

Attention is currently required from: Ravi Kumar Bokka, Shelley Chen, Sudheer Amrabadi, Julius Werner, Yu-Ping Wu. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36278 ) Change subject: HACK trogdor: optimize coreboot.rom for T32 flash script HACK ...................................................................... Patch Set 255: Verified-1 -- To view, visit https://review.coreboot.org/c/coreboot/+/36278 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5293ac9365bf4ac74bc475e70a02062f5371f9b8 Gerrit-Change-Number: 36278 Gerrit-PatchSet: 255 Gerrit-Owner: mturney mturney <quic_mturney(a)quicinc.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin L Roth <martinroth(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: mturney mturney <quic_mturney(a)quicinc.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Ravi Kumar Bokka <rbokka(a)codeaurora.org> Gerrit-Attention: Ravi Kumar Bokka <rbokka(a)codeaurora.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Sudheer Amrabadi <samrabad(a)codeaurora.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Wed, 23 Mar 2022 15:17:18 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

Change in coreboot[master]: libpayload: Add support for PCI MMIO CONFIG access.
by build bot (Jenkins) (Code Review) 23 Mar '22

23 Mar '22

Attention is currently required from: Ravi Kumar Bokka, Furquan Shaikh, Arthur Heymans, Prasad Malisetty. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/57615 ) Change subject: libpayload: Add support for PCI MMIO CONFIG access. ...................................................................... Patch Set 39: Verified-1 (2 comments) File payloads/libpayload/drivers/qc_pci_mmio_ops.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-144561): https://review.coreboot.org/c/coreboot/+/57615/comment/55fb78af_bd46a29a PS39, Line 107: cfg_address = (void*) pci_mmio_info->config_base; "(foo*)" should be "(foo *)" File payloads/libpayload/include/qc_pci.h: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-144561): https://review.coreboot.org/c/coreboot/+/57615/comment/2df13ea2_6b2f5f9e PS39, Line 70: #endif trailing whitespace -- To view, visit https://review.coreboot.org/c/coreboot/+/57615 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7d1217502cbd7d4d0cdd298919ae82435630d61c Gerrit-Change-Number: 57615 Gerrit-PatchSet: 39 Gerrit-Owner: Ravi Kumar Bokka <rbokka(a)codeaurora.org> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Prasad Malisetty <pmaliset(a)qualcomm.corp-partner.google.com> Gerrit-CC: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Gerrit-CC: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Ravi Kumar Bokka <rbokka(a)codeaurora.org> Gerrit-Attention: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Prasad Malisetty <pmaliset(a)qualcomm.corp-partner.google.com> Gerrit-Comment-Date: Wed, 23 Mar 2022 15:14:30 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

Change in coreboot[master]: sc7280: Add PCIe host controller driver
by build bot (Jenkins) (Code Review) 23 Mar '22

23 Mar '22

Attention is currently required from: Ravi Kumar Bokka, Furquan Shaikh, Paul Menzel, Julius Werner, Prasad Malisetty, mturney mturney. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/53902 ) Change subject: sc7280: Add PCIe host controller driver ...................................................................... Patch Set 74: Verified+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/53902 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iccf60aa56541f5230fa9c3f821d7709615c36631 Gerrit-Change-Number: 53902 Gerrit-PatchSet: 74 Gerrit-Owner: Ravi Kumar Bokka <rbokka(a)codeaurora.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: mturney mturney <mturney(a)codeaurora.org> Gerrit-CC: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Prasad Malisetty <pmaliset(a)qualcomm.corp-partner.google.com> Gerrit-CC: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Gerrit-Attention: Ravi Kumar Bokka <rbokka(a)codeaurora.org> Gerrit-Attention: Furquan Shaikh <furquan.m.shaikh(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Prasad Malisetty <pmaliset(a)qualcomm.corp-partner.google.com> Gerrit-Attention: mturney mturney <mturney(a)codeaurora.org> Gerrit-Comment-Date: Wed, 23 Mar 2022 15:08:39 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

Change in coreboot[master]: soc/qualcomm/common: verify size of memchipinfo structure
by Ravi Kumar Bokka (Code Review) 23 Mar '22

23 Mar '22

Ravi Kumar Bokka has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/63026 ) Change subject: soc/qualcomm/common: verify size of memchipinfo structure ...................................................................... soc/qualcomm/common: verify size of memchipinfo structure BUG=b:182963902,b:177917361 TEST=Validated on qualcomm sc7280 development board Signed-off-by: Ravi Kumar Bokka <rbokka(a)codeaurora.org> Change-Id: I0d59669adaf287d0eb7b58ccb0fe3f98e3d23281 --- M src/commonlib/bsd/include/commonlib/bsd/mem_chip_info.h M src/soc/qualcomm/common/qclib.c 2 files changed, 19 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/63026/1 diff --git a/src/commonlib/bsd/include/commonlib/bsd/mem_chip_info.h b/src/commonlib/bsd/include/commonlib/bsd/mem_chip_info.h index 8dc6db3..43d1c60 100644 --- a/src/commonlib/bsd/include/commonlib/bsd/mem_chip_info.h +++ b/src/commonlib/bsd/include/commonlib/bsd/mem_chip_info.h @@ -25,4 +25,8 @@ } channel[0]; }; +static inline size_t mem_chip_info_size(struct mem_chip_info *info) { + return sizeof(*info) + sizeof(info->channel[0]) * info->num_channels; +}; + #endif /* _COMMONLIB_BSD_MEM_CHIP_INFO_H_ */ diff --git a/src/soc/qualcomm/common/qclib.c b/src/soc/qualcomm/common/qclib.c index 9a485db..afa67e3 100644 --- a/src/soc/qualcomm/common/qclib.c +++ b/src/soc/qualcomm/common/qclib.c @@ -25,12 +25,24 @@ static void write_mem_chip_information(struct qclib_cb_if_table_entry *te) { - /* Save mem_chip_info in local variables ahead of hook running */ - mem_chip_addr = (void *)te->blob_address; + struct mem_chip_info memchip; + memchip.num_channels = 2; + + if (te->size == mem_chip_info_size(&memchip)) { + /* Save mem_chip_info in local variables ahead of hook running */ + mem_chip_addr = (void *)te->blob_address; + } + + if (!mem_chip_addr) { + printk(BIOS_ERR, "Did not receive valid mem_chip_info from QcLib!"); + return; + } } static void add_mem_chip_info(int unused) { + struct mem_chip_info memchip; + memchip.num_channels = 2; void *mem_region_base = NULL; /* Add cbmem table */ @@ -40,7 +52,7 @@ ASSERT(mem_region_base != NULL); /* Migrate the data into CBMEM */ - memcpy(mem_region_base, mem_chip_addr, sizeof(struct mem_chip_info)); + memcpy(mem_region_base, mem_chip_addr, mem_chip_info_size(&memchip)); } ROMSTAGE_CBMEM_INIT_HOOK(add_mem_chip_info); -- To view, visit https://review.coreboot.org/c/coreboot/+/63026 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0d59669adaf287d0eb7b58ccb0fe3f98e3d23281 Gerrit-Change-Number: 63026 Gerrit-PatchSet: 1 Gerrit-Owner: Ravi Kumar Bokka <rbokka(a)codeaurora.org> Gerrit-MessageType: newchange

1 0

Change in coreboot[master]: mb/google/dedede/var/beadrix: Enable LTE function by FW_CONFIG option
by Felix Held (Code Review) 23 Mar '22

23 Mar '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/62801 ) Change subject: mb/google/dedede/var/beadrix: Enable LTE function by FW_CONFIG option ...................................................................... mb/google/dedede/var/beadrix: Enable LTE function by FW_CONFIG option Enable/disable LTE function based on LTE field of FW_CONFIG. 1. GPIO control 2. USB port setting BUG=b:213582491 BRANCH=dedede TEST=FW_NAME=beadrix emerge-dedede coreboot Change-Id: Icea44992e2e3195d1fd9a888f5ce4650f82280bb Signed-off-by: Teddy Shih <teddyshih(a)ami.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/62801 Reviewed-by: Henry Sun <henrysun(a)google.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/google/dedede/variants/beadrix/gpio.c M src/mainboard/google/dedede/variants/beadrix/overridetree.cb 2 files changed, 18 insertions(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Tim Wawrzynczak: Looks good to me, approved Henry Sun: Looks good to me, but someone else must approve Teddy Shih: Looks good to me, but someone else must approve diff --git a/src/mainboard/google/dedede/variants/beadrix/gpio.c b/src/mainboard/google/dedede/variants/beadrix/gpio.c index 0732355..57573cc 100644 --- a/src/mainboard/google/dedede/variants/beadrix/gpio.c +++ b/src/mainboard/google/dedede/variants/beadrix/gpio.c @@ -2,6 +2,8 @@ #include <baseboard/gpio.h> #include <baseboard/variants.h> +#include <bootstate.h> +#include <fw_config.h> /* Pad configuration in ramstage */ static const struct pad_config gpio_table[] = { @@ -69,8 +71,21 @@ PAD_CFG_GPO(GPP_H17, 0, PLTRST), }; +static const struct pad_config lte_disable_pads[] = { + PAD_NC(GPP_A10, NONE), + PAD_NC(GPP_D0, NONE), + PAD_NC(GPP_H17, NONE), +}; + const struct pad_config *variant_override_gpio_table(size_t *num) { *num = ARRAY_SIZE(gpio_table); return gpio_table; } + +static void fw_config_handle(void *unused) +{ + if (!fw_config_probe(FW_CONFIG(LTE, LTE_PRESENT))) + gpio_configure_pads(lte_disable_pads, ARRAY_SIZE(lte_disable_pads)); +} +BOOT_STATE_INIT_ENTRY(BS_DEV_ENABLE, BS_ON_ENTRY, fw_config_handle, NULL); diff --git a/src/mainboard/google/dedede/variants/beadrix/overridetree.cb b/src/mainboard/google/dedede/variants/beadrix/overridetree.cb index 7f2d62f..d5b37d4 100644 --- a/src/mainboard/google/dedede/variants/beadrix/overridetree.cb +++ b/src/mainboard/google/dedede/variants/beadrix/overridetree.cb @@ -97,7 +97,9 @@ register "reset_off_delay_ms" = "20" register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A10)" register "enable_delay_ms" = "20" - device usb 3.3 on end + device usb 3.3 on + probe LTE LTE_PRESENT + end end end end -- To view, visit https://review.coreboot.org/c/coreboot/+/62801 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icea44992e2e3195d1fd9a888f5ce4650f82280bb Gerrit-Change-Number: 62801 Gerrit-PatchSet: 2 Gerrit-Owner: Teddy Shih <teddyshih(a)ami.corp-partner.google.com> Gerrit-Reviewer: Aseda Aboagye <aaboagye(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Henry Sun <henrysun(a)google.com> Gerrit-Reviewer: Ivan Chen <yulunchen(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Paul Fagerburg <pfagerburg(a)google.com> Gerrit-Reviewer: Teddy Shih <teddyshih(a)ami.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jack Cheng <jack.cheng(a)ecs.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Raymond Chung <raymondchung(a)ami.corp-partner.google.com> Gerrit-MessageType: merged

1 0

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit March 2022