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Hello build bot (Jenkins), Stefan Reinauer,
I'd like you to reexamine a change. Please visit
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Change subject: util/inteltool: Add support for Gemini Lake
......................................................................
util/inteltool: Add support for Gemini Lake
Tested on:
* StarLite Mk III (N5000)
* StarLite Mk IV (N5030)
Signed-off-by: Sean Rhodes <sean(a)starlabs.systems>
Change-Id: I0ef7619c04db66ea0c6e179bdf0a58ed1ab61a48
---
M util/inteltool/gpio.c
M util/inteltool/gpio_groups.c
A util/inteltool/gpio_names/geminilake.h
M util/inteltool/inteltool.c
M util/inteltool/inteltool.h
M util/inteltool/pcr.c
6 files changed, 324 insertions(+), 0 deletions(-)
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Change subject: drivers/smmstore: Get SMMSTORE block size at runtime
......................................................................
drivers/smmstore: Get SMMSTORE block size at runtime
Set the block size for SMMSTORE to the sector size of the SPI, as this
is the smallest size that it would support.
Signed-off-by: Sean Rhodes <sean(a)starlabs.systems>
Change-Id: Ieeed9f5895b8ddde753ebf596b803e8f440d5b74
---
M Documentation/drivers/smmstorev2.md
M src/drivers/smmstore/store.c
M src/include/smmstore.h
3 files changed, 27 insertions(+), 25 deletions(-)
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Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/62064 )
Change subject: soc/intel: Move `pmc_clear_pmcon_sts()` into IA common code
......................................................................
Patch Set 13:
(1 comment)
Patchset:
PS13:
> Ping!
Need help to get vote to make this CL to move further, thanks.
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Terry Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63078 )
Change subject: device: Demote missing set resources message from error to warnings
......................................................................
Patch Set 6:
(3 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/63078/comment/077c4cb6_6092669a
PS3, Line 7: device: change set_resources to WARNING
> Maybe: […]
Done
https://review.coreboot.org/c/coreboot/+/63078/comment/ce1cf8fa_25f0d27b
PS3, Line 9: shows
> shows the error
Done
https://review.coreboot.org/c/coreboot/+/63078/comment/b98ab48f_19673ba0
PS3, Line 9: While running power_Resume/control that shows "NONE missing set_resources". The message does seem more like a warning , therefore switch to BIOS_WARN instead.
> 1. Please wrap lines after 72 characters. […]
Done
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I'd like you to reexamine a change. Please visit
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Change subject: device: Demote missing set resources message from error to warnings
......................................................................
device: Demote missing set resources message from error to warnings
While running power_Resume/control that shows the error "NONE missing
set_resources". The message does seem more like a warning, therefore
switch to BIOS_WARN instead.
BUG=b:223936777
TEST=USE="project_primus" emerge-brya coreboot chromeos-bootimage
test_that -b {BOARD_NAME} {device IP} f:.*power_Resume/control
Signed-off-by: Terry Chen <terry_chen(a)wistron.corp-partner.google.com>
Change-Id: Ie7e7923265c84999b97a075f0757e7a8d8963b2d
---
M src/device/device.c
1 file changed, 1 insertion(+), 1 deletion(-)
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Hello build bot (Jenkins), Tim Wawrzynczak, Nick Vaccaro,
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#5).
Change subject: device: Demote missing set resources message from error to warnings
......................................................................
device: Demote missing set resources message from error to warnings
While running power_Resume/control that show the error "NONE missing
set_resources". The message does seem more like a warning, therefore
switch to BIOS_WARN instead.
BUG=b:223936777
TEST=USE="project_primus" emerge-brya coreboot chromeos-bootimage
test_that -b {BOARD_NAME} {device IP} f:.*power_Resume/control
Signed-off-by: Terry Chen <terry_chen(a)wistron.corp-partner.google.com>
Change-Id: Ie7e7923265c84999b97a075f0757e7a8d8963b2d
---
M src/device/device.c
1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/78/63078/5
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Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63009 )
Change subject: soc/intel/alderlake: Enable FSP_USES_CB_DEBUG_EVENT_HANDLER Kconfig
......................................................................
Patch Set 2:
(1 comment)
File src/soc/intel/alderlake/Kconfig:
https://review.coreboot.org/c/coreboot/+/63009/comment/dd99d0a4_0c408b82
PS2, Line 43: select FSP_DEBUG_EVENT_HANDLER_IN_COREBOOT
> > > > Can we depend CONFIG_CONSOLE_SERIAL or CONFIG_UART_DEBUG? I think the normal image, we don't n […]
Ack
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Hello build bot (Jenkins), Tim Wawrzynczak, Nick Vaccaro,
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#4).
Change subject: device: Demote missing set resources message from error to warnings
......................................................................
device: Demote missing set resources message from error to warnings
While running power_Resume/control that show the error "NONE missing set_resources". The message
does seem more like a warning, therefore switch to BIOS_WARN instead.
BUG=b:223936777
TEST=USE="project_primus" emerge-brya coreboot chromeos-bootimage
test_that -b {BOARD_NAME} {device IP} f:.*power_Resume/control
Signed-off-by: Terry Chen <terry_chen(a)wistron.corp-partner.google.com>
Change-Id: Ie7e7923265c84999b97a075f0757e7a8d8963b2d
---
M src/device/device.c
1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/78/63078/4
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Change subject: soc/intel/alderlake: Enable FSP_USES_CB_DEBUG_EVENT_HANDLER Kconfig
......................................................................
soc/intel/alderlake: Enable FSP_USES_CB_DEBUG_EVENT_HANDLER Kconfig
This patch uses the FSP event handler feature and updates with coreboot
native debug implementation to unify the debug library between coreboot
and FSP.
BUG=b:225544587
TEST=Able to build and boot Brya with the same FSP debug log before and
with this code changes.
Before:
Register PPI Notify: DCD0BE23-9586-40F4-B643-06522CED4EDE
Install PPI: 8C8CE578-8A3D-4F1C-9935-896185C32DD3
Install PPI: 5473C07A-3DCB-4DCA-BD6F-1E9689E7349A
The 0th FV start address is 0x000F961B000, size is 0x00150000, handle is 0xF961B000
Register PPI Notify: 49EDB1C1-BF21-4761-BB12-EB0031AABB39
Register PPI Notify: EA7CA24B-DED5-4DAD-A389-BF827E8F9B38
Install PPI: B9E0ABFE-5979-4914-977F-6DEE78C278A6
With this code change:
[SPEW ] Register PPI Notify: DCD0BE23-9586-40F4-B643-06522CED4EDE
[SPEW ] Install PPI: 8C8CE578-8A3D-4F1C-9935-896185C32DD3
[SPEW ] Install PPI: 5473C07A-3DCB-4DCA-BD6F-1E9689E7349A
[SPEW ] The 0th FV start address is 0x000F95C0000, size is 0x00160000, handle is 0xF95C0000
[SPEW ] Register PPI Notify: 49EDB1C1-BF21-4761-BB12-EB0031AABB39
[SPEW ] Register PPI Notify: EA7CA24B-DED5-4DAD-A389-BF827E8F9B38
[SPEW ] Install PPI: B9E0ABFE-5979-4914-977F-6DEE78C278A6
Signed-off-by: Subrata Banik <subratabanik(a)google.com>
Change-Id: I4a0530a282657e379a00c3e7d0ed8148dd5e9196
---
M src/soc/intel/alderlake/Kconfig
1 file changed, 1 insertion(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/09/63009/3
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Gerrit-PatchSet: 3
Gerrit-Owner: Subrata Banik <subratabanik(a)google.com>
Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com>
Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org>
Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org>
Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com>
Gerrit-MessageType: newpatchset
Hello build bot (Jenkins), Tim Wawrzynczak, Arthur Heymans,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/63008
to look at the new patch set (#3).
Change subject: soc/intel/alderlake: Use coreboot native event handler for FSP-M/S
......................................................................
soc/intel/alderlake: Use coreboot native event handler for FSP-M/S
This patch assigns FSP handler event for FSP-M and FSP-S with coreboot
romstage and ramstage debug handler when FSP_USES_CB_DEBUG_EVENT_HANDLER
Kconfig is enabled.
BUG=b:225544587
TEST=Able to build and boot brya. Also, verified the FSP debug log is
exactly same before and with this code change.
Signed-off-by: Subrata Banik <subratabanik(a)google.com>
Change-Id: I665def977faaae45f6f834d75e8456859093ba49
---
M src/soc/intel/alderlake/fsp_params.c
M src/soc/intel/alderlake/romstage/fsp_params.c
2 files changed, 9 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/08/63008/3
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I665def977faaae45f6f834d75e8456859093ba49
Gerrit-Change-Number: 63008
Gerrit-PatchSet: 3
Gerrit-Owner: Subrata Banik <subratabanik(a)google.com>
Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org>
Gerrit-MessageType: newpatchset