coreboot-gerrit February 2022

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Change in coreboot[master]: soc/amd/cezanne: Add the fw SPL to fw.cfg
by Raul Rangel (Code Review) 07 Feb '22

07 Feb '22

Raul Rangel has submitted this change. ( https://review.coreboot.org/c/coreboot/+/61425 ) Change subject: soc/amd/cezanne: Add the fw SPL to fw.cfg ...................................................................... soc/amd/cezanne: Add the fw SPL to fw.cfg SPL: Security Patch Level The data in SPL is used for FW anti-rollback, preventing rollback of platform level firmware to older version that are deemed vulnerable from a security point of view. BUG=b:216096562 Change-Id: I0aa456b8b4eec506fbb319293f0903b293325cb0 Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/61425 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Raul Rangel <rrangel(a)chromium.org> --- M src/soc/amd/cezanne/fw.cfg 1 file changed, 1 insertion(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Raul Rangel: Looks good to me, approved diff --git a/src/soc/amd/cezanne/fw.cfg b/src/soc/amd/cezanne/fw.cfg index 9757d72..f26e215 100644 --- a/src/soc/amd/cezanne/fw.cfg +++ b/src/soc/amd/cezanne/fw.cfg @@ -28,6 +28,7 @@ DRTMTA_FILE TypeId0x47_DrtmTA_CZN.sbin KEYDBBL_FILE TypeId0x50_KeyDbBl_CZN.sbin KEYDB_TOS_FILE TypeId0x51_KeyDbTos_CZN.sbin +SPL_TABLE_FILE TypeId0x55_SplTableBl_CZN.sbin DMCUERAMDCN21_FILE TypeId0x58_DmcuEramDcn21.sbin DMCUINTVECTORSDCN21_FILE TypeId0x59_DmcuIntvectorsDcn21.sbin PSPBTLDR_AB_FILE TypeId0x73_PspBootLoader_AB_CZN.sbin -- To view, visit https://review.coreboot.org/c/coreboot/+/61425 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0aa456b8b4eec506fbb319293f0903b293325cb0 Gerrit-Change-Number: 61425 Gerrit-PatchSet: 5 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Avinash Alevoor Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Mohan Viswanathan Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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Change in coreboot[master]: amdfwtool: Add SPL support
by Raul Rangel (Code Review) 07 Feb '22

07 Feb '22

Raul Rangel has submitted this change. ( https://review.coreboot.org/c/coreboot/+/61426 ) Change subject: amdfwtool: Add SPL support ...................................................................... amdfwtool: Add SPL support SPL: Security Patch Level The data in SPL is used for FW anti-rollback, preventing rollback of platform level firmware to older version that are deemed vulnerable from a security point of view. BUG=b:216096562 Change-Id: I4665f2372ccd599ab835c8784da08cde5558a795 Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/61426 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Raul Rangel <rrangel(a)chromium.org> --- M util/amdfwtool/amdfwtool.c M util/amdfwtool/amdfwtool.h M util/amdfwtool/data_parse.c 3 files changed, 5 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Raul Rangel: Looks good to me, approved diff --git a/util/amdfwtool/amdfwtool.c b/util/amdfwtool/amdfwtool.c index fb6769a..1d5db12 100644 --- a/util/amdfwtool/amdfwtool.c +++ b/util/amdfwtool/amdfwtool.c @@ -256,6 +256,7 @@ { .type = AMD_FW_DRTM_TA, .level = PSP_LVL2 }, { .type = AMD_FW_KEYDB_BL, .level = PSP_BOTH }, { .type = AMD_FW_KEYDB_TOS, .level = PSP_LVL2 }, + { .type = AMD_FW_SPL, .level = PSP_LVL2 }, { .type = AMD_FW_DMCU_ERAM, .level = PSP_LVL2 }, { .type = AMD_FW_DMCU_ISR, .level = PSP_LVL2 }, { .type = AMD_RPMC_NVRAM, .level = PSP_LVL2 }, diff --git a/util/amdfwtool/amdfwtool.h b/util/amdfwtool/amdfwtool.h index 2ffbfc6..b14a437 100644 --- a/util/amdfwtool/amdfwtool.h +++ b/util/amdfwtool/amdfwtool.h @@ -48,6 +48,7 @@ AMD_FW_PSP_VERSTAGE = 0x52, AMD_FW_VERSTAGE_SIG = 0x53, AMD_RPMC_NVRAM = 0x54, + AMD_FW_SPL = 0x55, AMD_FW_DMCU_ERAM = 0x58, AMD_FW_DMCU_ISR = 0x59, AMD_FW_PSP_BOOTLOADER_AB = 0x73, diff --git a/util/amdfwtool/data_parse.c b/util/amdfwtool/data_parse.c index 8f93183..6814346 100644 --- a/util/amdfwtool/data_parse.c +++ b/util/amdfwtool/data_parse.c @@ -282,6 +282,9 @@ } else if (strcmp(fw_name, "KEYDB_TOS_FILE") == 0) { fw_type = AMD_FW_KEYDB_TOS; subprog = 0; + } else if (strcmp(fw_name, "SPL_TABLE_FILE") == 0) { + fw_type = AMD_FW_SPL; + subprog = 0; } else if (strcmp(fw_name, "DMCUERAMDCN21_FILE") == 0) { fw_type = AMD_FW_DMCU_ERAM; subprog = 0; -- To view, visit https://review.coreboot.org/c/coreboot/+/61426 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4665f2372ccd599ab835c8784da08cde5558a795 Gerrit-Change-Number: 61426 Gerrit-PatchSet: 6 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Avinash Alevoor Gerrit-Reviewer: Mohan Viswanathan Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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Change in coreboot[master]: mb/google/guybrush: Fix trackpad SCI config
by Rob Barnes (Code Review) 07 Feb '22

07 Feb '22

Attention is currently required from: Karthik Ramasubramanian. Rob Barnes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61645 ) Change subject: mb/google/guybrush: Fix trackpad SCI config ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/61645 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If4324e09535d2676c8a8c6643604227eeaba0fe8 Gerrit-Change-Number: 61645 Gerrit-PatchSet: 1 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Mon, 07 Feb 2022 18:33:22 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/guybrush: Fix trackpad SCI config
by Jon Murphy (Code Review) 07 Feb '22

07 Feb '22

Attention is currently required from: Rob Barnes, Karthik Ramasubramanian. Jon Murphy has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61645 ) Change subject: mb/google/guybrush: Fix trackpad SCI config ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/61645 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If4324e09535d2676c8a8c6643604227eeaba0fe8 Gerrit-Change-Number: 61645 Gerrit-PatchSet: 1 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Rob Barnes <robbarnes(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Mon, 07 Feb 2022 18:32:40 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/alderlake: Inject CSE TS into CBMEM timestamp table
by Bora Guvendik (Code Review) 07 Feb '22

07 Feb '22

Attention is currently required from: Subrata Banik, Selma Bensaid, Paul Menzel, Julius Werner, Patrick Rudolph. Bora Guvendik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59507 ) Change subject: soc/intel/alderlake: Inject CSE TS into CBMEM timestamp table ...................................................................... Patch Set 14: (13 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/59507/comment/efd8f81f_ba61e6dc PS12, Line 7: timestamp_table > CBMEM timestamp table Done https://review.coreboot.org/c/coreboot/+/59507/comment/96bc6841_0012a747 PS12, Line 9: it > them Done https://review.coreboot.org/c/coreboot/+/59507/comment/33127959_3892a01e PS12, Line 11: > Please mention, that they need to be normalized? Done https://review.coreboot.org/c/coreboot/+/59507/comment/e39afb62_83f8cfbe PS12, Line 13: TEST=Able to see TS elapse prior to IA reset. > Please mention the board, and even paste the new output. Done File src/soc/intel/common/block/cse/telemetry.c: https://review.coreboot.org/c/coreboot/+/59507/comment/b73cf13c_5cc4aa7a PS7, Line 72: BS_PRE_DEVICE > Thanks Subrata for raising good points. […] Done File src/soc/intel/common/block/cse/telemetry.c: https://review.coreboot.org/c/coreboot/+/59507/comment/a1c4bd2c_2c2ed403 PS12, Line 33: int > `unsigned int` or `size_t` Done https://review.coreboot.org/c/coreboot/+/59507/comment/e33d7207_e8382a7d PS12, Line 35: 0xFFFFFFFF > Please use lowercase. Done https://review.coreboot.org/c/coreboot/+/59507/comment/e7d8fb40_29c3b32d PS12, Line 36: printk(BIOS_ERR, "%s: CSME timestamps invalid\n", __func__); > What should the user do in such a case? no action needed from the user. Just to explain why they are not seeing CSE timestamps in the cbmem timstamp table. https://review.coreboot.org/c/coreboot/+/59507/comment/b15ea153_5e5f4d54 PS12, Line 45: int > Ditto. Done https://review.coreboot.org/c/coreboot/+/59507/comment/927146cc_129c4780 PS12, Line 53: int > Ditto. Done https://review.coreboot.org/c/coreboot/+/59507/comment/fba78e12_c6c54af1 PS12, Line 53: zero_point_idx+1 > Please add spaces around operators. Done https://review.coreboot.org/c/coreboot/+/59507/comment/90a8f9a4_bfb630cc PS12, Line 56: printk(BIOS_ERR, "%s: CSME timestamps invalid\n", __func__); > 1. Print the value both values? […] 1. I think it is not useful to print the values in this case. But I added an indication for the user that wrap-around was detected. 2. just to explain why they don't see CSE timestamps in their cbmem timestamp table. File src/soc/intel/common/block/include/intelblocks/cse.h: https://review.coreboot.org/c/coreboot/+/59507/comment/e1d6761d_f18369c5 PS12, Line 502: coreboot > CBMEM Done -- To view, visit https://review.coreboot.org/c/coreboot/+/59507 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Idcdbb69538ca2977cd97ce1ef9b211ff6510a3f8 Gerrit-Change-Number: 59507 Gerrit-PatchSet: 14 Gerrit-Owner: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Bora Guvendik <bora.guvendik(a)intel.corp-partner.google.com> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Mon, 07 Feb 2022 18:32:30 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Bora Guvendik <bora.guvendik(a)intel.com> Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/guybrush: Fix trackpad SCI config
by Raul Rangel (Code Review) 07 Feb '22

07 Feb '22

Attention is currently required from: Jon Murphy, Rob Barnes, Karthik Ramasubramanian. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61645 ) Change subject: mb/google/guybrush: Fix trackpad SCI config ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/61645 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If4324e09535d2676c8a8c6643604227eeaba0fe8 Gerrit-Change-Number: 61645 Gerrit-PatchSet: 1 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Rob Barnes <robbarnes(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jon Murphy <jpmurphy(a)google.com> Gerrit-Attention: Rob Barnes <robbarnes(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Mon, 07 Feb 2022 18:30:40 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: payloads/tianocore: Rework Makefile
by Sean Rhodes (Code Review) 07 Feb '22

07 Feb '22

Attention is currently required from: Martin Roth, Matt DeVillier. Sean Rhodes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61620 ) Change subject: payloads/tianocore: Rework Makefile ...................................................................... Patch Set 23: (1 comment) File payloads/external/tianocore/Makefile: https://review.coreboot.org/c/coreboot/+/61620/comment/9f8efe19_86d3ce78 PS20, Line 9: BUILD_STR = -q : BUILD_STR += -a IA32 -a X64 -t COREBOOT > I'd rather not change the build type just to get verbose output, so between the two options, I'd sti […] Moved - it might seem random, but makes it easier to extract the build target which looks for the Nth word. -- To view, visit https://review.coreboot.org/c/coreboot/+/61620 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3cc274e7385dd71c2aae315162cc48444b7eaa5f Gerrit-Change-Number: 61620 Gerrit-PatchSet: 23 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Comment-Date: Mon, 07 Feb 2022 18:30:07 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Sean Rhodes <sean(a)starlabs.systems> Comment-In-Reply-To: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: payloads/tianocore: Rework Makefile
by Matt DeVillier (Code Review) 07 Feb '22

07 Feb '22

Attention is currently required from: Sean Rhodes, Martin Roth. Matt DeVillier has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61620 ) Change subject: payloads/tianocore: Rework Makefile ...................................................................... Patch Set 22: (2 comments) File payloads/external/tianocore/Kconfig: https://review.coreboot.org/c/coreboot/+/61620/comment/f8052dcc_79983af4 PS20, Line 9: TIANOCORE_REPOSITORY > Maybe leave it up them if they want to? All it's doing is setting REPOSITORY and TAG_OR_REV accordin […] Ack File payloads/external/tianocore/Makefile: https://review.coreboot.org/c/coreboot/+/61620/comment/a3457d80_6fb8f01c PS20, Line 9: BUILD_STR = -q : BUILD_STR += -a IA32 -a X64 -t COREBOOT > To make it easy to remove - how about we tie it to TIANOCORE_DEBUG, save another Kconfig option? I'd rather not change the build type just to get verbose output, so between the two options, I'd stick with the two lines (though I'd flip them) -- To view, visit https://review.coreboot.org/c/coreboot/+/61620 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3cc274e7385dd71c2aae315162cc48444b7eaa5f Gerrit-Change-Number: 61620 Gerrit-PatchSet: 22 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Comment-Date: Mon, 07 Feb 2022 18:27:32 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Sean Rhodes <sean(a)starlabs.systems> Comment-In-Reply-To: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/alderlake: Inject CSE TS into CBMEM timestamp table
by Bora Guvendik (Code Review) 07 Feb '22

07 Feb '22

Attention is currently required from: Selma Bensaid, Julius Werner, Patrick Rudolph. Hello build bot (Jenkins), Subrata Banik, Selma Bensaid, Tim Wawrzynczak, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/59507 to look at the new patch set (#14). Change subject: soc/intel/alderlake: Inject CSE TS into CBMEM timestamp table ...................................................................... soc/intel/alderlake: Inject CSE TS into CBMEM timestamp table Get boot performance timestamps from CSE and inject them into CBMEM timestamp table after normalizing to the zero-point value. Although consumer CSE sku also supports this feature, it was validated on CSE Lite sku only. BUG=b:182575295 TEST=Able to see TS elapse prior to IA reset on Brya/Redrix 990:CSME ROM started execution 0 944:CSE sent 'Boot Stall Done' to PMC 88,000 945:CSE started to handle ICC configuration 88,000 (0) 946:CSE sent 'Host BIOS Prep Done' to PMC 90,000 (2,000) 947:CSE received 'CPU Reset Done Ack sent' from PMC 282,000 (192,000) 0:1st timestamp 330,857 (48,857) 11:start of bootblock 341,811 (10,953) 12:end of bootblock 349,299 (7,487) Signed-off-by: Bora Guvendik <bora.guvendik(a)intel.com> Change-Id: Idcdbb69538ca2977cd97ce1ef9b211ff6510a3f8 --- M src/soc/intel/alderlake/romstage/romstage.c M src/soc/intel/common/block/cse/Kconfig M src/soc/intel/common/block/cse/Makefile.inc A src/soc/intel/common/block/cse/telemetry.c M src/soc/intel/common/block/include/intelblocks/cse.h 5 files changed, 92 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/59507/14 -- To view, visit https://review.coreboot.org/c/coreboot/+/59507 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Idcdbb69538ca2977cd97ce1ef9b211ff6510a3f8 Gerrit-Change-Number: 59507 Gerrit-PatchSet: 14 Gerrit-Owner: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Bora Guvendik <bora.guvendik(a)intel.corp-partner.google.com> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Selma Bensaid <selma.bensaid(a)intel.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/starlabs/lite: Add StarLite Mk III
by Sean Rhodes (Code Review) 07 Feb '22

07 Feb '22

Attention is currently required from: Angel Pons. Sean Rhodes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60980 ) Change subject: mb/starlabs/lite: Add StarLite Mk III ...................................................................... Patch Set 45: (3 comments) This change is ready for review. File src/mainboard/starlabs/lite/mainboard.c: https://review.coreboot.org/c/coreboot/+/60980/comment/b5a19ccc_9ae73cb8 PS28, Line 8: enum cmos_power_profile get_power_profile(enum cmos_power_profile fallback) : { : const unsigned int power_profile = get_uint_option("power_profile", fallback); : return power_profile < NUM_POWER_PROFILES ? power_profile : fallback; : } > I think you put it there :) I'll make another patch to move the one in mb/labtop too Done File src/mainboard/starlabs/lite/smbios.c: https://review.coreboot.org/c/coreboot/+/60980/comment/c69957b2_0c93f07e PS28, Line 20: /* Get the Embedded Controller firmware version */ : void smbios_ec_revision(uint8_t *ec_major_revision, uint8_t *ec_minor_revision) : { : u16 ec_version = it_get_version(); : : *ec_major_revision = ec_version >> 8; : *ec_minor_revision = ec_version & 0xff; : } > Will make a separate patch Done File src/mainboard/starlabs/lite/variants/glk/romstage.c: https://review.coreboot.org/c/coreboot/+/60980/comment/736b2b19_bb267fe9 PS28, Line 59: config->DDR3LPageSize = 0x01, : config->DDR3LASR = 0x00, > Does this matter if you're using LPDDR? Pretty sure it doesn't - but having them specified covers hardcoded UPDs. -- To view, visit https://review.coreboot.org/c/coreboot/+/60980 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iddbf2022d03735d6a0e6d098c21643f5fdc875f6 Gerrit-Change-Number: 60980 Gerrit-PatchSet: 45 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Mon, 07 Feb 2022 18:26:26 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Sean Rhodes <sean(a)starlabs.systems> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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2017

2016

2015

2014

2013

coreboot-gerrit February 2022