Attention is currently required from: Jason Glenesk, Marshall Dawson, Felix Held.
Hello Jason Glenesk, Marshall Dawson, Felix Held,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/61690
to look at the new patch set (#2).
Change subject: soc/amd/cezanne: Add ability to dump Smart Trace Buffer in bootblock
......................................................................
soc/amd/cezanne: Add ability to dump Smart Trace Buffer in bootblock
This will make it easier to inspect the smart trace buffer. This
buffer contains POST codes and other debug data that can be useful to
understand what the system is doing.
This functionality was ported over from the linux amd-pmc driver.
BUG=b:217960752
TEST=Boot guybrush and verify STB is dumped
Signed-off-by: Raul E Rangel <rrangel(a)chromium.org>
Change-Id: Ied3010ba0fc1d7327fe07df562f0483099d6b165
---
M src/soc/amd/cezanne/Kconfig
M src/soc/amd/cezanne/Makefile.inc
M src/soc/amd/cezanne/bootblock.c
A src/soc/amd/cezanne/include/soc/stb.h
A src/soc/amd/cezanne/stb.c
5 files changed, 55 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/61690/2
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Ied3010ba0fc1d7327fe07df562f0483099d6b165
Gerrit-Change-Number: 61690
Gerrit-PatchSet: 2
Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org>
Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de>
Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com>
Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com>
Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com>
Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com>
Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de>
Gerrit-MessageType: newpatchset
Julius Werner has submitted this change. ( https://review.coreboot.org/c/coreboot/+/61613 )
Change subject: console: Add compile-time fast path when only CBMEM console is used
......................................................................
console: Add compile-time fast path when only CBMEM console is used
A common use case when running coreboot on production systems is that
only the CBMEM console (the one with the least impact on boot speed) is
enabled. In this case, some of the code in the console subsystem has no
effect. Due to the way it's all genericized over multiple consoles and
tied together with function pointers, not all of this can be
compile-time eliminated automatically, so this patch adds a little
helper to facilitate that. This results in roughly 200 (compressed)
bytes of savings per stage on an arm64 system.
Signed-off-by: Julius Werner <jwerner(a)chromium.org>
Change-Id: I1d5b8bda80d02a13ee0b7835e0805c4319fd21d8
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61613
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Raul Rangel <rrangel(a)chromium.org>
---
M src/console/console.c
M src/console/printk.c
M src/include/console/console.h
3 files changed, 19 insertions(+), 4 deletions(-)
Approvals:
build bot (Jenkins): Verified
Raul Rangel: Looks good to me, approved
diff --git a/src/console/console.c b/src/console/console.c
index 5b8a872..f37f120 100644
--- a/src/console/console.c
+++ b/src/console/console.c
@@ -11,6 +11,8 @@
#include <console/flash.h>
#include <console/system76_ec.h>
+/* Note: when adding a new console, make sure you update the definition of
+ HAS_ONLY_FAST_CONSOLES in <console.h>! */
void console_hw_init(void)
{
__cbmemc_init();
diff --git a/src/console/printk.c b/src/console/printk.c
index ffa3106..8db2c45 100644
--- a/src/console/printk.c
+++ b/src/console/printk.c
@@ -67,6 +67,8 @@
};
};
+#define LOG_FAST(state) (HAS_ONLY_FAST_CONSOLES || ((state).level == CONSOLE_LOG_FAST))
+
static void wrap_interactive_printf(const char *fmt, ...)
{
va_list args;
@@ -83,7 +85,7 @@
LOG_FAST mode, just write the marker to CBMC and exit -- the rest of this function
implements the LOG_ALL case. */
unsigned char marker = BIOS_LOG_LEVEL_TO_MARKER(state.level);
- if (state.speed == CONSOLE_LOG_FAST) {
+ if (LOG_FAST(state)) {
__cbmemc_tx_byte(marker);
return;
}
@@ -98,7 +100,7 @@
static void line_end(union log_state state)
{
- if (CONFIG(CONSOLE_USE_ANSI_ESCAPES) && state.speed != CONSOLE_LOG_FAST)
+ if (CONFIG(CONSOLE_USE_ANSI_ESCAPES) && !LOG_FAST(state))
wrap_interactive_printf(BIOS_LOG_ESCAPE_RESET);
}
@@ -115,7 +117,7 @@
line_started = true;
}
- if (state.speed == CONSOLE_LOG_FAST)
+ if (LOG_FAST(state))
__cbmemc_tx_byte(byte);
else
console_tx_byte(byte);
@@ -138,7 +140,7 @@
console_time_run();
i = vtxprintf(wrap_putchar, fmt, args, state.as_ptr);
- if (state.speed != CONSOLE_LOG_FAST)
+ if (LOG_FAST(state))
console_tx_flush();
console_time_stop();
diff --git a/src/include/console/console.h b/src/include/console/console.h
index 5546aa9..e4090af 100644
--- a/src/include/console/console.h
+++ b/src/include/console/console.h
@@ -61,7 +61,18 @@
long console_time_get_and_reset(void);
void console_time_report(void);
+/*
+ * "Fast" basically means only the CBMEM console right now. This is used to still
+ * print debug messages there when loglevel disables the other consoles. It is also
+ * used to compile-time eliminate code paths that only affect "interactive" consoles
+ * (which are all "slow") when none of those are enabled.
+ */
enum { CONSOLE_LOG_NONE = 0, CONSOLE_LOG_FAST, CONSOLE_LOG_ALL };
+#define HAS_ONLY_FAST_CONSOLES !(CONFIG(SPKMODEM) || CONFIG(CONSOLE_QEMU_DEBUGCON) || \
+ CONFIG(CONSOLE_SERIAL) || CONFIG(CONSOLE_NE2K) || CONFIG(CONSOLE_USB) || \
+ CONFIG(EM100PRO_SPI_CONSOLE) || CONFIG(CONSOLE_SPI_FLASH) || \
+ CONFIG(CONSOLE_SYSTEM76_EC))
+
#else
static inline int get_log_level(void) { return -1; }
static inline void console_init(void) {}
3 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I1d5b8bda80d02a13ee0b7835e0805c4319fd21d8
Gerrit-Change-Number: 61613
Gerrit-PatchSet: 8
Gerrit-Owner: Julius Werner <jwerner(a)chromium.org>
Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org>
Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org>
Gerrit-MessageType: merged
Julius Werner has submitted this change. ( https://review.coreboot.org/c/coreboot/+/61308 )
Change subject: console: Add loglevel marker codes to stored consoles
......................................................................
console: Add loglevel marker codes to stored consoles
In order to provide the same loglevel prefixes and highlighting that
were recently introduced for "interactive" consoles (e.g. UART) to
"stored" consoles (e.g. CBMEM) but minimize the amont of extra storage
space wasted on this info, this patch will write a 1-byte control
character marker indicating the loglevel to the start of every line
logged in those consoles. The `cbmem` utility will then interpret those
markers and translate them back into loglevel prefixes and escape
sequences as needed.
Since coreboot and userspace log readers aren't always in sync,
occasionally an older reader may come across these markers and not know
how to interpret them... but that should usually be fine, as the range
chosen contains non-printable ASCII characters that normally have no
effect on the terminal. At worst the outdated reader would display one
garbled character at the start of every line which isn't that bad.
(Older versions of the `cbmem` utility will translate non-printable
characters into `?` question marks.)
Signed-off-by: Julius Werner <jwerner(a)chromium.org>
Change-Id: I86073f48aaf1e0a58e97676fb80e2475ec418ffc
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61308
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Raul Rangel <rrangel(a)chromium.org>
---
M src/commonlib/include/commonlib/loglevel.h
M src/console/printk.c
M src/lib/cbmem_console.c
M util/cbmem/cbmem.c
4 files changed, 51 insertions(+), 5 deletions(-)
Approvals:
build bot (Jenkins): Verified
Raul Rangel: Looks good to me, approved
diff --git a/src/commonlib/include/commonlib/loglevel.h b/src/commonlib/include/commonlib/loglevel.h
index 1594465..34d9824 100644
--- a/src/commonlib/include/commonlib/loglevel.h
+++ b/src/commonlib/include/commonlib/loglevel.h
@@ -201,6 +201,20 @@
[BIOS_SPEW] = "0",
};
+/*
+ * When storing console logs somewhere for later retrieval, log level prefixes
+ * and escape sequences should not be stored raw to preserve space. Instead, a
+ * non-printable control character marker is inserted into the log to indicate
+ * the log level. Decoders reading this character should translate it back into
+ * the respective escape sequence and prefix. If a decoder doesn't support this
+ * feature, the non-printable character should usually be harmless.
+ */
+#define BIOS_LOG_MARKER_START 0x10
+#define BIOS_LOG_MARKER_END (BIOS_LOG_MARKER_START + BIOS_LOG_PREFIX_MAX_LEVEL)
+#define BIOS_LOG_IS_MARKER(c) ((c) >= BIOS_LOG_MARKER_START && (c) <= BIOS_LOG_MARKER_END)
+#define BIOS_LOG_LEVEL_TO_MARKER(level) (BIOS_LOG_MARKER_START + (level))
+#define BIOS_LOG_MARKER_TO_LEVEL(c) ((c) - BIOS_LOG_MARKER_START)
+
#endif /* __ASSEMBLER__ */
#endif /* LOGLEVEL_H */
diff --git a/src/console/printk.c b/src/console/printk.c
index 93aed52..ffa3106 100644
--- a/src/console/printk.c
+++ b/src/console/printk.c
@@ -78,8 +78,16 @@
{
if (state.level > BIOS_LOG_PREFIX_MAX_LEVEL)
return;
- if (state.speed == CONSOLE_LOG_FAST)
+
+ /* Stored consoles just get a single control char marker to save space. If we are in
+ LOG_FAST mode, just write the marker to CBMC and exit -- the rest of this function
+ implements the LOG_ALL case. */
+ unsigned char marker = BIOS_LOG_LEVEL_TO_MARKER(state.level);
+ if (state.speed == CONSOLE_LOG_FAST) {
+ __cbmemc_tx_byte(marker);
return;
+ }
+ console_stored_tx_byte(marker, NULL);
/* Interactive consoles get a `[DEBUG] ` style readable prefix,
and potentially an escape sequence for highlighting. */
diff --git a/src/lib/cbmem_console.c b/src/lib/cbmem_console.c
index 2faa5d5..0c56095 100644
--- a/src/lib/cbmem_console.c
+++ b/src/lib/cbmem_console.c
@@ -182,12 +182,16 @@
if (current_console->cursor & OVERFLOW) {
for (cursor = current_console->cursor & CURSOR_MASK;
cursor < current_console->size; cursor++) {
+ if (BIOS_LOG_IS_MARKER(current_console->body[cursor]))
+ continue;
if (current_console->body[cursor] == '\n')
uart_tx_byte(console_index, '\r');
uart_tx_byte(console_index, current_console->body[cursor]);
}
}
for (cursor = 0; cursor < (current_console->cursor & CURSOR_MASK); cursor++) {
+ if (BIOS_LOG_IS_MARKER(current_console->body[cursor]))
+ continue;
if (current_console->body[cursor] == '\n')
uart_tx_byte(console_index, '\r');
uart_tx_byte(console_index, current_console->body[cursor]);
@@ -206,9 +210,11 @@
if (current_console->cursor & OVERFLOW)
for (cursor = current_console->cursor & CURSOR_MASK;
cursor < current_console->size; cursor++)
- do_putchar(current_console->body[cursor]);
+ if (!BIOS_LOG_IS_MARKER(current_console->body[cursor]))
+ do_putchar(current_console->body[cursor]);
for (cursor = 0; cursor < (current_console->cursor & CURSOR_MASK); cursor++)
- do_putchar(current_console->body[cursor]);
+ if (!BIOS_LOG_IS_MARKER(current_console->body[cursor]))
+ do_putchar(current_console->body[cursor]);
console_paused = false;
}
diff --git a/util/cbmem/cbmem.c b/util/cbmem/cbmem.c
index 51b4adc..d5a8ae4 100644
--- a/util/cbmem/cbmem.c
+++ b/util/cbmem/cbmem.c
@@ -18,6 +18,7 @@
#include <assert.h>
#include <regex.h>
#include <commonlib/bsd/cbmem_id.h>
+#include <commonlib/loglevel.h>
#include <commonlib/timestamp_serialized.h>
#include <commonlib/tcpa_log_serialized.h>
#include <commonlib/coreboot_tables.h>
@@ -783,7 +784,8 @@
/* Slight memory corruption may occur between reboots and give us a few
unprintable characters like '\0'. Replace them with '?' on output. */
for (cursor = 0; cursor < size; cursor++)
- if (!isprint(console_c[cursor]) && !isspace(console_c[cursor]))
+ if (!isprint(console_c[cursor]) && !isspace(console_c[cursor])
+ && !BIOS_LOG_IS_MARKER(console_c[cursor]))
console_c[cursor] = '?';
/* We detect the reboot cutoff by looking for a bootblock, romstage or
@@ -822,7 +824,23 @@
cursor = previous;
}
- puts(console_c + cursor);
+ char c;
+ int tty = isatty(fileno(stdout));
+ while ((c = console_c[cursor++])) {
+ if (BIOS_LOG_IS_MARKER(c)) {
+ int lvl = BIOS_LOG_MARKER_TO_LEVEL(c);
+ if (tty)
+ printf(BIOS_LOG_ESCAPE_PATTERN, bios_log_escape[lvl]);
+ printf(BIOS_LOG_PREFIX_PATTERN, bios_log_prefix[lvl]);
+ } else {
+ putchar(c);
+ if (tty && c == '\n')
+ printf(BIOS_LOG_ESCAPE_RESET);
+ }
+ }
+ if (tty)
+ printf(BIOS_LOG_ESCAPE_RESET);
+
free(console_c);
unmap_memory(&console_mapping);
}
10 is the latest approved patch-set.
No files were changed between the latest approved patch-set and the submitted one.
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I86073f48aaf1e0a58e97676fb80e2475ec418ffc
Gerrit-Change-Number: 61308
Gerrit-PatchSet: 12
Gerrit-Owner: Julius Werner <jwerner(a)chromium.org>
Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org>
Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com>
Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de>
Gerrit-Reviewer: Patrick Georgi <patrick(a)coreboot.org>
Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org>
Gerrit-MessageType: merged
Attention is currently required from: Jason Glenesk, Marshall Dawson, Felix Held.
Raul Rangel has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/61690 )
Change subject: soc/amd/cezanne: Add ability to dump Smart Trace Buffer in bootblock
......................................................................
soc/amd/cezanne: Add ability to dump Smart Trace Buffer in bootblock
This will make it easier to inspect the smart trace buffer. This
buffer contains POST codes and other debug data that can be useful to
understand what the system is doing.
This functionality was ported over from the linux amd-pmc driver.
BUG=b:217960752
TEST=Boot guybrush and verify STB is dumped
Signed-off-by: Raul E Rangel <rrangel(a)chromium.org>
Change-Id: Ied3010ba0fc1d7327fe07df562f0483099d6b165
---
M src/soc/amd/cezanne/Kconfig
M src/soc/amd/cezanne/Makefile.inc
M src/soc/amd/cezanne/bootblock.c
3 files changed, 10 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/61690/1
diff --git a/src/soc/amd/cezanne/Kconfig b/src/soc/amd/cezanne/Kconfig
index 620c650..8518588 100644
--- a/src/soc/amd/cezanne/Kconfig
+++ b/src/soc/amd/cezanne/Kconfig
@@ -298,6 +298,11 @@
cores to transition between p-states independently. A vendor may
choose to generate _PSD object to allow cores to transition together.
+config DUMP_SMART_TRACE_BUFFER
+ bool
+ help
+ Dumps the Smart Trace Buffer when entering bootblock.
+
menu "PSP Configuration Options"
config AMD_FWM_POSITION_INDEX
diff --git a/src/soc/amd/cezanne/Makefile.inc b/src/soc/amd/cezanne/Makefile.inc
index 5708baa0..177ba31 100644
--- a/src/soc/amd/cezanne/Makefile.inc
+++ b/src/soc/amd/cezanne/Makefile.inc
@@ -14,6 +14,7 @@
bootblock-y += gpio.c
bootblock-y += i2c.c
bootblock-y += reset.c
+bootblock-y += stb.c
bootblock-y += uart.c
verstage-y += i2c.c
diff --git a/src/soc/amd/cezanne/bootblock.c b/src/soc/amd/cezanne/bootblock.c
index c42ac0a..24c0b7e 100644
--- a/src/soc/amd/cezanne/bootblock.c
+++ b/src/soc/amd/cezanne/bootblock.c
@@ -6,6 +6,7 @@
#include <console/console.h>
#include <cpu/x86/tsc.h>
#include <soc/southbridge.h>
+#include <soc/stb.h>
#include <soc/psp_transfer.h>
#include <stdint.h>
@@ -41,6 +42,9 @@
u32 val = cpuid_eax(1);
printk(BIOS_DEBUG, "Family_Model: %08x\n", val);
+ if (CONFIG(DUMP_SMART_TRACE_BUFFER))
+ dump_stb();
+
if (CONFIG(VBOOT_STARTS_BEFORE_BOOTBLOCK)) {
verify_psp_transfer_buf();
show_psp_transfer_info();
--
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Gerrit-Branch: master
Gerrit-Change-Id: Ied3010ba0fc1d7327fe07df562f0483099d6b165
Gerrit-Change-Number: 61690
Gerrit-PatchSet: 1
Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org>
Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de>
Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com>
Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com>
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Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de>
Gerrit-MessageType: newchange
Julius Werner has submitted this change. ( https://review.coreboot.org/c/coreboot/+/61307 )
Change subject: console: Add ANSI escape sequences for highlighting
......................................................................
console: Add ANSI escape sequences for highlighting
This patch adds ANSI escape sequences to highlight a log line based on
its loglevel to the output of "interactive" consoles that are meant to
be displayed on a terminal (e.g. UART). This should help make errors and
warnings stand out better among the usual spew of debug messages. For
users whose terminal or use case doesn't support these sequences for
some reason (or who simply don't like them), they can be disabled with a
Kconfig.
While ANSI escape sequences can be used to add color, minicom (the
presumably most common terminal emulator for UART endpoints?) doesn't
support color output unless explicitly enabled (via -c command line
flag), and other terminal emulators may have similar restrictions, so in
an effort to make this as widely useful by default as possible I have
chosen not to use color codes and implement this highlighting via
bolding, underlining and inverting alone (which seem to go through in
all cases). If desired, support for separate color highlighting could be
added via Kconfig later.
Signed-off-by: Julius Werner <jwerner(a)chromium.org>
Change-Id: I868f4026918bc0e967c32e14bcf3ac05816415e8
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61307
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Raul Rangel <rrangel(a)chromium.org>
---
M src/commonlib/include/commonlib/loglevel.h
M src/console/Kconfig
M src/console/printk.c
3 files changed, 43 insertions(+), 1 deletion(-)
Approvals:
build bot (Jenkins): Verified
Raul Rangel: Looks good to me, approved
diff --git a/src/commonlib/include/commonlib/loglevel.h b/src/commonlib/include/commonlib/loglevel.h
index 68b2285..1594465 100644
--- a/src/commonlib/include/commonlib/loglevel.h
+++ b/src/commonlib/include/commonlib/loglevel.h
@@ -178,6 +178,29 @@
[BIOS_SPEW] = "SPEW ",
};
+/*
+ * When printing to terminals supporting ANSI escape sequences, the following
+ * escape sequences can be printed to highlight the respective log levels
+ * according to the BIOS_LOG_ESCAPE_PATTERN printf() pattern. At the end of a
+ * line, highlighting should be reset with the BIOS_LOG_ESCAPE_RESET seqence.
+ *
+ * The escape sequences used here set flags with the following meanings:
+ * 1 = bold, 4 = underlined, 5 = blinking, 7 = inverted
+ */
+#define BIOS_LOG_ESCAPE_PATTERN "\x1b[%sm"
+#define BIOS_LOG_ESCAPE_RESET "\x1b[0m"
+static const char bios_log_escape[BIOS_LOG_PREFIX_MAX_LEVEL + 1][8] = {
+ [BIOS_EMERG] = "1;4;5;7",
+ [BIOS_ALERT] = "1;4;7",
+ [BIOS_CRIT] = "1;7",
+ [BIOS_ERR] = "7",
+ [BIOS_WARNING] = "1;4",
+ [BIOS_NOTICE] = "1",
+ [BIOS_INFO] = "0",
+ [BIOS_DEBUG] = "0",
+ [BIOS_SPEW] = "0",
+};
+
#endif /* __ASSEMBLER__ */
#endif /* LOGLEVEL_H */
diff --git a/src/console/Kconfig b/src/console/Kconfig
index f80d2e4..37d8fef 100644
--- a/src/console/Kconfig
+++ b/src/console/Kconfig
@@ -395,6 +395,15 @@
endif
+config CONSOLE_USE_ANSI_ESCAPES
+ bool "Use ANSI escape sequences for console highlighting"
+ default y
+ help
+ If enabled, certain consoles (e.g. UART) that are meant to be read on
+ a terminal will use ANSI escape sequences (like `ESC [1m`) to
+ highlight lines based on their log level. Disable this if your
+ terminal does not support ANSI escape sequences.
+
config NO_POST
bool "Don't show any POST codes"
default n
diff --git a/src/console/printk.c b/src/console/printk.c
index ddd14c0..93aed52 100644
--- a/src/console/printk.c
+++ b/src/console/printk.c
@@ -81,16 +81,26 @@
if (state.speed == CONSOLE_LOG_FAST)
return;
- /* Interactive consoles get a `[DEBUG] ` style readable prefix. */
+ /* Interactive consoles get a `[DEBUG] ` style readable prefix,
+ and potentially an escape sequence for highlighting. */
+ if (CONFIG(CONSOLE_USE_ANSI_ESCAPES))
+ wrap_interactive_printf(BIOS_LOG_ESCAPE_PATTERN, bios_log_escape[state.level]);
wrap_interactive_printf(BIOS_LOG_PREFIX_PATTERN, bios_log_prefix[state.level]);
}
+static void line_end(union log_state state)
+{
+ if (CONFIG(CONSOLE_USE_ANSI_ESCAPES) && state.speed != CONSOLE_LOG_FAST)
+ wrap_interactive_printf(BIOS_LOG_ESCAPE_RESET);
+}
+
static void wrap_putchar(unsigned char byte, void *data)
{
union log_state state = { .as_ptr = data };
static bool line_started = false;
if (byte == '\n') {
+ line_end(state);
line_started = false;
} else if (!line_started) {
line_start(state);
--
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Change subject: util/ifdtool: add PLATFORM_IFD2 to reduce common ifd tool change
......................................................................
Patch Set 3:
(1 comment)
File util/ifdtool/ifdtool.c:
https://review.coreboot.org/c/coreboot/+/61576/comment/d3bbf56f_17ceb420
PS2, Line 1641: pv1
> ifd2 ? […]
I'll update this as ifd2.
For clean up, I think we may need to consider more and it's better to be done in later patch. The main issue is ADL,TGL and other platforms in IFDv2 has different SPI frequence decode values.
_decode_spi_frequency vs _decode_spi_frequency_500_series.
So, either I think we may
1. clean ADL/TGL and use only IFD2
2. Consider removing SPI prequency encode/decode from ifd tool.
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Hello build bot (Jenkins), Subrata Banik, Ethan Tsao, Ravishankar Sarawadi, Stefan Reinauer, Tim Wawrzynczak, Edward O'Callaghan,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/61576
to look at the new patch set (#3).
Change subject: util/ifdtool: add PLATFORM_IFD2 to reduce common ifd tool change
......................................................................
util/ifdtool: add PLATFORM_IFD2 to reduce common ifd tool change
TGL, ADL have same ifd tool and future platforms may also use same tool.
As TGL, ADL use own names for enabling ifd tool, we need to update ifd
tool code for new platforms even if ifd tool is not changed.
For avoid unnessary change, use generic platform name(PLATFORM_IFD2) for
support future platforms without tool changes.
Signed-off-by: Wonkyu Kim <wonkyu.kim(a)intel.com>
Change-Id: I14a71a58c7d51b9c8b92e013b5637c6b35005f22
---
M util/ifdtool/ifdtool.c
M util/ifdtool/ifdtool.h
2 files changed, 7 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/76/61576/3
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Kangheui Won has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61547 )
Change subject: vendorcode/intel/fsp: Add FSP header file for Alder Lake N FSP v2503_00
......................................................................
Patch Set 3:
(1 comment)
Patchset:
PS3:
I still can't find emmc-related parameters in FspsUpd.h.
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