Attention is currently required from: Tracy Wu, Tim Wawrzynczak.
Hello build bot (Jenkins), Tim Wawrzynczak,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/61728
to look at the new patch set (#2).
Change subject: mb/google/brya: Adjust CSE RO and Data partition in the CSE region
......................................................................
mb/google/brya: Adjust CSE RO and Data partition in the CSE region
This reverts commit 19a4247a06 ("mb/google/brya: Adjust CSE RO and Data
partition in the CSE region").
There is an issue for Kano when update from 14474 to 14498 by using
futility tool. For temporarily WA, need to switch back to use cse_serger
stitch method and revert these changes of partition size.
BUG=b:218376385
TEST=use flashrom to downgrade to 14474 then use futility to update to
this generated coreboot.
Signed-off-by: Tracy Wu <tracy.wu(a)intel.corp-partner.google.com>
Change-Id: Ia8bdf6b28d952f6d983b84e39da96e159027a822
---
M src/mainboard/google/brya/chromeos.fmd
1 file changed, 2 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/61728/2
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Gerrit-Change-Id: Ia8bdf6b28d952f6d983b84e39da96e159027a822
Gerrit-Change-Number: 61728
Gerrit-PatchSet: 2
Gerrit-Owner: Tracy Wu <tracy.wu(a)intel.corp-partner.google.com>
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Cliff Huang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/61783 )
Change subject: mb/google/brya: reduce the time for WWAN _ON method delay.
......................................................................
mb/google/brya: reduce the time for WWAN _ON method delay.
During booting to OS, ACPI calls _ON and immediately calls _OFF method.
This delay is to make sure there is some delay in between _ON and _OFF.
Note that this delay will also contribute to boot time.Therefore, only
small amount of time is desired.
TEST:
Check the time difference from the kernel messages at boot:
INFO kernel: [ Â Â 0.189801] ACPI: Power Resource [RTD3] (on)
INFO kernel: [ Â Â 0.206510] ACPI: Power Resource [RTD3] (off)
Signed-off-by: Cliff Huang <cliff.huang(a)intel.com>
Change-Id: I9bc36af6e6c944fcd3de23b7d49640ad9d25642d
---
M src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb
1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/83/61783/1
diff --git a/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb b/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb
index 0c0e8c4..3882332 100644
--- a/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb
+++ b/src/mainboard/google/brya/variants/baseboard/brya/devicetree.cb
@@ -155,7 +155,7 @@
chip soc/intel/common/block/pcie/rtd3
register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_E0)"
register "reset_off_delay_ms" = "20"
- register "reset_delay_ms" = "1000"
+ register "reset_delay_ms" = "10"
register "srcclk_pin" = "5"
register "ext_pm_support" = "ACPI_PCIE_RP_EMIT_ALL"
register "skip_on_off_support" = "true"
--
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Gerrit-Branch: master
Gerrit-Change-Id: I9bc36af6e6c944fcd3de23b7d49640ad9d25642d
Gerrit-Change-Number: 61783
Gerrit-PatchSet: 1
Gerrit-Owner: Cliff Huang <cliff.huang(a)intel.com>
Gerrit-MessageType: newchange
Robert Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61782 )
Change subject: mb/google/zork/var/gumboz: Add fw_config probe for ALC5682-VD & VS
......................................................................
Patch Set 1:
This change is ready for review.
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Gerrit-Change-Id: I0b0231a3ee9c0dad289ffd50607b3ae6201f56a0
Gerrit-Change-Number: 61782
Gerrit-PatchSet: 1
Gerrit-Owner: Robert Chen <robert.chen(a)quanta.corp-partner.google.com>
Gerrit-CC: Kevin Chiu <kevin.chiu.17802(a)gmail.com>
Gerrit-Comment-Date: Thu, 10 Feb 2022 02:03:22 +0000
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Robert Chen has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/61782 )
Change subject: mb/google/zork/var/gumboz: Add fw_config probe for ALC5682-VD & VS
......................................................................
mb/google/zork/var/gumboz: Add fw_config probe for ALC5682-VD & VS
ALC5682-VD/ALC5682I-VS load different kernel driver by different hid
name. Update hid name and machine_dev depending on the AUDIO_CODEC_SOURCE
field of fw_config. Define FW_CONFIG bits 36 - 37 (SSFC bits 4 - 5)
for codec selection.
ALC5682-VD: _HID = "10EC5682"
ALC5682I-VS: _HID = "RTL5682"
BUG=b:
BRANCH=zork
TEST=ALC5682-VD/ALC5682I-VS audio codec can work
Change-Id: I0b0231a3ee9c0dad289ffd50607b3ae6201f56a0
Signed-off-by: = <robert.chen(a)quanta.corp-partner.google.com>
---
M src/mainboard/google/zork/variants/gumboz/overridetree.cb
1 file changed, 87 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/61782/1
diff --git a/src/mainboard/google/zork/variants/gumboz/overridetree.cb b/src/mainboard/google/zork/variants/gumboz/overridetree.cb
index d496de2..90677f5 100644
--- a/src/mainboard/google/zork/variants/gumboz/overridetree.cb
+++ b/src/mainboard/google/zork/variants/gumboz/overridetree.cb
@@ -1,4 +1,11 @@
# SPDX-License-Identifier: GPL-2.0-or-later
+fw_config
+ field AUDIO_CODEC_SOURCE 36 37
+ option AUDIO_CODEC_ALC5682 0
+ option AUDIO_CODEC_ALC5682I_VS 1
+ end
+end
+
chip soc/amd/picasso
# Start : OPN Performance Configuration
@@ -105,6 +112,86 @@
# See AMD 55570-B1 Table 13: PCI Device ID Assignments.
device domain 0 on
subsystemid 0x1022 0x1510 inherit
+ device pci 8.1 on
+ device pci 0.5 on
+ chip drivers/amd/i2s_machine_dev
+ register "hid" = ""AMDI5682""
+ # DMIC select GPIO for ACP machine device
+ # This GPIO is used to select DMIC0 or DMIC1 by the
+ # kernel driver. It does not really have a polarity
+ # since low and high control the selection of DMIC and
+ # hence does not have an active polarity.
+ # Kernel driver does not use the polarity field and
+ # instead treats the GPIO selection as follows:
+ # Set low (0) = Select DMIC0
+ # Set high (1) = Select DMIC1
+ register "dmic_select_gpio" = "ACPI_GPIO_OUTPUT(GPIO_67)"
+ device generic 0.0 on
+ probe AUDIO_CODEC_SOURCE AUDIO_CODEC_ALC5682
+ end
+ end
+ chip drivers/amd/i2s_machine_dev
+ register "hid" = ""10029835""
+ # DMIC select GPIO for ACP machine device
+ # This GPIO is used to select DMIC0 or DMIC1 by the
+ # kernel driver. It does not really have a polarity
+ # since low and high control the selection of DMIC and
+ # hence does not have an active polarity.
+ # Kernel driver does not use the polarity field and
+ # instead treats the GPIO selection as follows:
+ # Set low (0) = Select DMIC0
+ # Set high (1) = Select DMIC1
+ register "dmic_select_gpio" = "ACPI_GPIO_OUTPUT(GPIO_67)"
+ device generic 1.0 on
+ probe AUDIO_CODEC_SOURCE AUDIO_CODEC_ALC5682I_VS
+ end
+ end
+ end # Audio
+ end
+ device pci 14.3 on
+ chip ec/google/chromeec
+ device pnp 0c09.0 on
+ chip ec/google/chromeec/i2c_tunnel
+ device generic 0.0 on
+ chip drivers/i2c/generic
+ register "hid" = ""10EC5682""
+ register "name" = ""RT58""
+ register "uid" = "1"
+ register "desc" = ""Realtek RT5682""
+ register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPIO_84)"
+ register "property_count" = "2"
+ register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER"
+ register "property_list[0].name" = ""realtek,jd-src""
+ register "property_list[0].integer" = "1"
+ register "property_list[1].type" = "ACPI_DP_TYPE_STRING"
+ register "property_list[1].name" = ""realtek,mclk-name""
+ register "property_list[1].string" = ""oscout1""
+ device i2c 1a on end
+ end
+ probe AUDIO_CODEC_SOURCE AUDIO_CODEC_ALC5682
+ end
+ device generic 1.0 on
+ chip drivers/i2c/generic
+ register "hid" = ""RTL5682""
+ register "name" = ""RT58""
+ register "uid" = "1"
+ register "desc" = ""Realtek RT5682""
+ register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPIO_84)"
+ register "property_count" = "2"
+ register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER"
+ register "property_list[0].name" = ""realtek,jd-src""
+ register "property_list[0].integer" = "1"
+ register "property_list[1].type" = "ACPI_DP_TYPE_STRING"
+ register "property_list[1].name" = ""realtek,mclk-name""
+ register "property_list[1].string" = ""oscout1""
+ device i2c 1a on end
+ end
+ probe AUDIO_CODEC_SOURCE AUDIO_CODEC_ALC5682I_VS
+ end
+ end
+ end
+ end
+ end
end # domain
device ref i2c_2 on
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Robert Chen has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/61781 )
Change subject: mb/google/zork/var/dirinboz: Add fw_config probe for ALC5682-VD & VS
......................................................................
mb/google/zork/var/dirinboz: Add fw_config probe for ALC5682-VD & VS
ALC5682-VD/ALC5682I-VS load different kernel driver by different hid
name. Update hid name and machine_dev depending on the AUDIO_CODEC_SOURCE
field of fw_config. Define FW_CONFIG bits 36 - 37 (SSFC bits 4 - 5)
for codec selection.
ALC5682-VD: _HID = "10EC5682"
ALC5682I-VS: _HID = "RTL5682"
BUG=b:
BRANCH=zork
TEST=ALC5682-VD/ALC5682I-VS audio codec can work
Change-Id: Icd4321ec0a284e35511dd4b860a16506f54cf663
---
M src/mainboard/google/zork/variants/dirinboz/overridetree.cb
1 file changed, 87 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/81/61781/1
diff --git a/src/mainboard/google/zork/variants/dirinboz/overridetree.cb b/src/mainboard/google/zork/variants/dirinboz/overridetree.cb
index d496de2..90677f5 100644
--- a/src/mainboard/google/zork/variants/dirinboz/overridetree.cb
+++ b/src/mainboard/google/zork/variants/dirinboz/overridetree.cb
@@ -1,4 +1,11 @@
# SPDX-License-Identifier: GPL-2.0-or-later
+fw_config
+ field AUDIO_CODEC_SOURCE 36 37
+ option AUDIO_CODEC_ALC5682 0
+ option AUDIO_CODEC_ALC5682I_VS 1
+ end
+end
+
chip soc/amd/picasso
# Start : OPN Performance Configuration
@@ -105,6 +112,86 @@
# See AMD 55570-B1 Table 13: PCI Device ID Assignments.
device domain 0 on
subsystemid 0x1022 0x1510 inherit
+ device pci 8.1 on
+ device pci 0.5 on
+ chip drivers/amd/i2s_machine_dev
+ register "hid" = ""AMDI5682""
+ # DMIC select GPIO for ACP machine device
+ # This GPIO is used to select DMIC0 or DMIC1 by the
+ # kernel driver. It does not really have a polarity
+ # since low and high control the selection of DMIC and
+ # hence does not have an active polarity.
+ # Kernel driver does not use the polarity field and
+ # instead treats the GPIO selection as follows:
+ # Set low (0) = Select DMIC0
+ # Set high (1) = Select DMIC1
+ register "dmic_select_gpio" = "ACPI_GPIO_OUTPUT(GPIO_67)"
+ device generic 0.0 on
+ probe AUDIO_CODEC_SOURCE AUDIO_CODEC_ALC5682
+ end
+ end
+ chip drivers/amd/i2s_machine_dev
+ register "hid" = ""10029835""
+ # DMIC select GPIO for ACP machine device
+ # This GPIO is used to select DMIC0 or DMIC1 by the
+ # kernel driver. It does not really have a polarity
+ # since low and high control the selection of DMIC and
+ # hence does not have an active polarity.
+ # Kernel driver does not use the polarity field and
+ # instead treats the GPIO selection as follows:
+ # Set low (0) = Select DMIC0
+ # Set high (1) = Select DMIC1
+ register "dmic_select_gpio" = "ACPI_GPIO_OUTPUT(GPIO_67)"
+ device generic 1.0 on
+ probe AUDIO_CODEC_SOURCE AUDIO_CODEC_ALC5682I_VS
+ end
+ end
+ end # Audio
+ end
+ device pci 14.3 on
+ chip ec/google/chromeec
+ device pnp 0c09.0 on
+ chip ec/google/chromeec/i2c_tunnel
+ device generic 0.0 on
+ chip drivers/i2c/generic
+ register "hid" = ""10EC5682""
+ register "name" = ""RT58""
+ register "uid" = "1"
+ register "desc" = ""Realtek RT5682""
+ register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPIO_84)"
+ register "property_count" = "2"
+ register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER"
+ register "property_list[0].name" = ""realtek,jd-src""
+ register "property_list[0].integer" = "1"
+ register "property_list[1].type" = "ACPI_DP_TYPE_STRING"
+ register "property_list[1].name" = ""realtek,mclk-name""
+ register "property_list[1].string" = ""oscout1""
+ device i2c 1a on end
+ end
+ probe AUDIO_CODEC_SOURCE AUDIO_CODEC_ALC5682
+ end
+ device generic 1.0 on
+ chip drivers/i2c/generic
+ register "hid" = ""RTL5682""
+ register "name" = ""RT58""
+ register "uid" = "1"
+ register "desc" = ""Realtek RT5682""
+ register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPIO_84)"
+ register "property_count" = "2"
+ register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER"
+ register "property_list[0].name" = ""realtek,jd-src""
+ register "property_list[0].integer" = "1"
+ register "property_list[1].type" = "ACPI_DP_TYPE_STRING"
+ register "property_list[1].name" = ""realtek,mclk-name""
+ register "property_list[1].string" = ""oscout1""
+ device i2c 1a on end
+ end
+ probe AUDIO_CODEC_SOURCE AUDIO_CODEC_ALC5682I_VS
+ end
+ end
+ end
+ end
+ end
end # domain
device ref i2c_2 on
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Gerrit-Owner: Robert Chen <robert.chen(a)quanta.corp-partner.google.com>
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Attention is currently required from: Raul Rangel.
Hello Raul Rangel,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/61779
to look at the new patch set (#2).
Change subject: util/cbmem: Add --loglevel option to restrict console printing by level
......................................................................
util/cbmem: Add --loglevel option to restrict console printing by level
This patch adds a new --loglevel option to the CBMEM utility which can
be used either numerically (e.g. `cbmem -1 --loglevel 6`) or by name
(e.g. `cbmem -c --loglevel INFO`) to restrict the lines that will be
printed from the CBMEM console log to a maximum loglevel. By default,
using this option means that lines without a loglevel (which usually
happens when payloads or other non-coreboot components add their own
logs to the CBMEM console) will not be printed. Prefixing a `+`
character to the option value (e.g. `--loglevel +6` or
`--loglevel +INFO`) can be used to change that behavior.
Signed-off-by: Julius Werner <jwerner(a)chromium.org>
Change-Id: I8458027083246df5637dffd3ebfeb4d0a78deadf
---
M util/cbmem/cbmem.c
1 file changed, 46 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/79/61779/2
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Gerrit-Branch: master
Gerrit-Change-Id: I8458027083246df5637dffd3ebfeb4d0a78deadf
Gerrit-Change-Number: 61779
Gerrit-PatchSet: 2
Gerrit-Owner: Julius Werner <jwerner(a)chromium.org>
Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org>
Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org>
Gerrit-MessageType: newpatchset
Attention is currently required from: Raul Rangel.
Hello Raul Rangel,
I'd like you to do a code review. Please visit
https://review.coreboot.org/c/coreboot/+/61779
to review the following change.
Change subject: util/cbmem: Add --loglevel option to restrict console printing by level
......................................................................
util/cbmem: Add --loglevel option to restrict console printing by level
This patch adds a new --loglevel option to the CBMEM utility which can
be used either numerically (e.g. `cbmem -1 --loglevel 6`) or by name
(e.g. `cbmem -c --loglevel INFO`) to restrict the lines that will be
printed from the CBMEM console log to a maximum loglevel. By default,
using this option means that lines without a loglevel (which usually
happens when payloads or other non-coreboot components adds their own
logs to the CBMEM console) will not be printed. Prefixing a `+`
character to the option value (e.g. `--loglevel +6` or
`--loglevel +INFO`) can be used to change that behavior.
Signed-off-by: Julius Werner <jwerner(a)chromium.org>
Change-Id: I8458027083246df5637dffd3ebfeb4d0a78deadf
---
M util/cbmem/cbmem.c
1 file changed, 46 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/79/61779/1
diff --git a/util/cbmem/cbmem.c b/util/cbmem/cbmem.c
index d5a8ae4..a39ef2a 100644
--- a/util/cbmem/cbmem.c
+++ b/util/cbmem/cbmem.c
@@ -729,8 +729,31 @@
CONSOLE_PRINT_PREVIOUS,
};
+static int parse_loglevel(char *arg, int *print_unknown_logs)
+{
+ if (arg[0] == '+') {
+ *print_unknown_logs = 1;
+ arg++;
+ } else {
+ *print_unknown_logs = 0;
+ }
+
+ char *endptr;
+ int loglevel = strtol(arg, &endptr, 0);
+ if (*endptr == '\0' && loglevel >= BIOS_EMERG && loglevel <= BIOS_LOG_PREFIX_MAX_LEVEL)
+ return loglevel;
+
+ /* Only match first 3 characters so `NOTE` and `NOTICE` both match. */
+ for (int i = BIOS_EMERG; i <= BIOS_LOG_PREFIX_MAX_LEVEL; i++)
+ if (!strncasecmp(arg, bios_log_prefix[i], 3))
+ return i;
+
+ *print_unknown_logs = 1;
+ return BIOS_NEVER;
+}
+
/* dump the cbmem console */
-static void dump_console(enum console_print_type type)
+static void dump_console(enum console_print_type type, int max_loglevel, int print_unknown_logs)
{
const struct cbmem_console *console_p;
char *console_c;
@@ -825,17 +848,27 @@
}
char c;
+ int suppressed = 0;
int tty = isatty(fileno(stdout));
while ((c = console_c[cursor++])) {
if (BIOS_LOG_IS_MARKER(c)) {
int lvl = BIOS_LOG_MARKER_TO_LEVEL(c);
+ if (lvl > max_loglevel) {
+ suppressed = 1;
+ continue;
+ }
+ suppressed = 0;
if (tty)
printf(BIOS_LOG_ESCAPE_PATTERN, bios_log_escape[lvl]);
printf(BIOS_LOG_PREFIX_PATTERN, bios_log_prefix[lvl]);
} else {
- putchar(c);
- if (tty && c == '\n')
- printf(BIOS_LOG_ESCAPE_RESET);
+ if (!suppressed)
+ putchar(c);
+ if (c == '\n') {
+ if (tty && !suppressed)
+ printf(BIOS_LOG_ESCAPE_RESET);
+ suppressed = !print_unknown_logs;
+ }
}
}
if (tty)
@@ -1126,6 +1159,7 @@
" -c | --console: print cbmem console\n"
" -1 | --oneboot: print cbmem console for last boot only\n"
" -2 | --2ndtolast: print cbmem console for the boot that came before the last one only\n"
+ " -B | --loglevel: maximum loglevel to print; prefix `+` (e.g. -B +INFO) to also print lines that have no level\n"
" -C | --coverage: dump coverage information\n"
" -l | --list: print cbmem table of contents\n"
" -x | --hexdump: print hexdump of cbmem area\n"
@@ -1268,12 +1302,15 @@
int machine_readable_timestamps = 0;
enum console_print_type console_type = CONSOLE_PRINT_FULL;
unsigned int rawdump_id = 0;
+ int max_loglevel = BIOS_NEVER;
+ int print_unknown_logs = 1;
int opt, option_index = 0;
static struct option long_options[] = {
{"console", 0, 0, 'c'},
{"oneboot", 0, 0, '1'},
{"2ndtolast", 0, 0, '2'},
+ {"loglevel", required_argument, 0, 'B'},
{"coverage", 0, 0, 'C'},
{"list", 0, 0, 'l'},
{"tcpa-log", 0, 0, 'L'},
@@ -1286,7 +1323,7 @@
{"help", 0, 0, 'h'},
{0, 0, 0, 0}
};
- while ((opt = getopt_long(argc, argv, "c12CltTLxVvh?r:",
+ while ((opt = getopt_long(argc, argv, "c12B:CltTLxVvh?r:",
long_options, &option_index)) != EOF) {
switch (opt) {
case 'c':
@@ -1303,6 +1340,9 @@
console_type = CONSOLE_PRINT_PREVIOUS;
print_defaults = 0;
break;
+ case 'B':
+ max_loglevel = parse_loglevel(optarg, &print_unknown_logs);
+ break;
case 'C':
print_coverage = 1;
print_defaults = 0;
@@ -1428,7 +1468,7 @@
die("Table not found.\n");
if (print_console)
- dump_console(console_type);
+ dump_console(console_type, max_loglevel, print_unknown_logs);
if (print_coverage)
dump_coverage();
--
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Gerrit-Project: coreboot
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Gerrit-Change-Id: I8458027083246df5637dffd3ebfeb4d0a78deadf
Gerrit-Change-Number: 61779
Gerrit-PatchSet: 1
Gerrit-Owner: Julius Werner <jwerner(a)chromium.org>
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