coreboot-gerrit November 2022

coreboot-gerrit@coreboot.org

1 participants
7286 discussions

[S] Change in coreboot[master]: mb/google/brya/var/lisbon: Include driver for GL9763E for eMMC boot disk
by 9elements QA (Code Review) 03 Nov '22

03 Nov '22

9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68888 ) Change subject: mb/google/brya/var/lisbon: Include driver for GL9763E for eMMC boot disk ...................................................................... Patch Set 2: Automatic boot test returned (PASS/FAIL/TOTAL): 14 / 2 / 16 PASS: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES_ and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/132914 PASS: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/132913 PASS: x86_32 "ThinkPad T500" , build config LENOVO_T500 and payload SeaBIOS : https://lava.9esec.io/r/132912 PASS: x86_32 "HP Z220 SFF Workstation" , build config HP_Z220_SFF_WORKSTATION and payload LinuxBoot_BB_kexec : https://lava.9esec.io/r/132911 FAIL: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload TianoCore : https://lava.9esec.io/r/132910 PASS: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload SeaBIOS : https://lava.9esec.io/r/132909 PASS: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload TianoCore : https://lava.9esec.io/r/132908 PASS: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload SeaBIOS : https://lava.9esec.io/r/132907 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35_SMM_TSEG and payload TianoCore : https://lava.9esec.io/r/132906 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35_SMM_TSEG and payload SeaBIOS : https://lava.9esec.io/r/132905 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35 and payload TianoCore : https://lava.9esec.io/r/132904 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35 and payload SeaBIOS : https://lava.9esec.io/r/132903 PASS: x86_64 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_X86_64 and payload SeaBIOS : https://lava.9esec.io/r/132902 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ASAN and payload SeaBIOS : https://lava.9esec.io/r/132901 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ and payload SeaBIOS : https://lava.9esec.io/r/132900 FAIL: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX and payload SeaBIOS : https://lava.9esec.io/r/132899 Please note: This test is under development and might not be accurate at all! -- To view, visit https://review.coreboot.org/c/coreboot/+/68888 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibe579a913225b5241412bbb1b8ea995a5102a3bb Gerrit-Change-Number: 68888 Gerrit-PatchSet: 2 Gerrit-Owner: Kevin Chiu <kevin.chiu.17802(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Ricky Chang <rickytlchang(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-Comment-Date: Thu, 03 Nov 2022 02:42:33 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

[M] Change in coreboot[master]: soc/amd/morgana: Add 32M support
by build bot (Jenkins) (Code Review) 03 Nov '22

03 Nov '22

Attention is currently required from: Jason Glenesk, Matt DeVillier, Zheng Bao, Fred Reitberger, Felix Held. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69150 ) Change subject: soc/amd/morgana: Add 32M support ...................................................................... Patch Set 1: (1 comment) Commit Message: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162246): https://review.coreboot.org/c/coreboot/+/69150/comment/994cbf0d_eedbc162 PS1, Line 24: If coreboot need to access bottom 16M, which in fact doesn't seem to 'implimented' may be misspelled - perhaps 'implemented'? -- To view, visit https://review.coreboot.org/c/coreboot/+/69150 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia0b5a75f828033b29c378bed9a939b23d7f19140 Gerrit-Change-Number: 69150 Gerrit-PatchSet: 1 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Zheng Bao Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Zheng Bao Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Thu, 03 Nov 2022 02:38:13 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

[S] Change in coreboot[master]: amdfwtool: Add definition of instance for PSP entry
by build bot (Jenkins) (Code Review) 03 Nov '22

03 Nov '22

Attention is currently required from: Zheng Bao. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69044 ) Change subject: amdfwtool: Add definition of instance for PSP entry ...................................................................... Patch Set 2: Verified+1 (1 comment) File util/amdfwtool/amdfwtool.h: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162243): https://review.coreboot.org/c/coreboot/+/69044/comment/4152cef0_4d7cb2a4 PS2, Line 166: } __attribute__((packed)); Prefer __packed over __attribute__((packed)) -- To view, visit https://review.coreboot.org/c/coreboot/+/69044 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9f6250fd0e26cfae2cc2128ca9413a5621d2df0c Gerrit-Change-Number: 69044 Gerrit-PatchSet: 2 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Zheng Bao Gerrit-Comment-Date: Thu, 03 Nov 2022 02:37:42 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

[S] Change in coreboot[master]: amdfwtool: Add instance 1 for bios image
by Bao Zheng (Code Review) 03 Nov '22

03 Nov '22

Attention is currently required from: Zheng Bao. Hello Zheng Bao, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/69151 to review the following change. Change subject: amdfwtool: Add instance 1 for bios image ...................................................................... amdfwtool: Add instance 1 for bios image Change-Id: Iaa40872b270cf9ff289794c8c51c4d8b448d862d Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com> --- M util/amdfwtool/amdfwtool.c 1 file changed, 13 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/51/69151/1 diff --git a/util/amdfwtool/amdfwtool.c b/util/amdfwtool/amdfwtool.c index 933fb34..367e1cf 100644 --- a/util/amdfwtool/amdfwtool.c +++ b/util/amdfwtool/amdfwtool.c @@ -46,6 +46,8 @@ * */ +// efs header 0x47, 0x48 +// nvram 04 #include <fcntl.h> #include <errno.h> #include <openssl/sha.h> @@ -356,7 +358,7 @@ { .type = AMD_BIOS_APCB_BK, .inst = 15, .level = BDT_BOTH }, { .type = AMD_BIOS_APOB, .level = BDT_BOTH }, { .type = AMD_BIOS_BIN, - .reset = 1, .copy = 1, .zlib = 1, .level = BDT_BOTH }, + .reset = 1, .copy = 1, .zlib = 1, .inst = 0, .level = BDT_BOTH }, { .type = AMD_BIOS_APOB_NV, .level = BDT_LVL2 }, { .type = AMD_BIOS_PMUI, .inst = 1, .subpr = 0, .level = BDT_BOTH }, { .type = AMD_BIOS_PMUD, .inst = 1, .subpr = 0, .level = BDT_BOTH }, -- To view, visit https://review.coreboot.org/c/coreboot/+/69151 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iaa40872b270cf9ff289794c8c51c4d8b448d862d Gerrit-Change-Number: 69151 Gerrit-PatchSet: 1 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Zheng Bao Gerrit-Attention: Zheng Bao Gerrit-MessageType: newchange

1 0

[M] Change in coreboot[master]: soc/amd/morgana: Add 32M support
by Bao Zheng (Code Review) 03 Nov '22

03 Nov '22

Attention is currently required from: Jason Glenesk, Matt DeVillier, Zheng Bao, Fred Reitberger, Felix Held. Hello Zheng Bao, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/69150 to review the following change. Change subject: soc/amd/morgana: Add 32M support ...................................................................... soc/amd/morgana: Add 32M support The 32M has to be divided into 2 16M parts, top and bottom. We can only map one part at one time. By default, the bottom 16M is mapped to 0xFF000000-0xFFFFFFFF. By this default setting, the address in the image is not the actual phyical address. So we need to convert the address, or map the upper 16M instead (the easier way UEFI BIOS does). So we push all the modules with running code, like romstage, ramstage, even the fmap table, to upper 16M. For the bootblock part, which is loaded by bootloader, it is unchanged as a tiny relocatable image in bottom 16M in amdfw.rom. Since the amdfw.rom is not in CFBS, we put it in fmap. We put only EC FWs and PSP FWs in the botttom, where the PSP can load. If coreboot need to access bottom 16M, which in fact doesn't seem to be necessary, can be implimented by SMN command. The bit 15 of soft fuse decides which (top or bottom) 16M is mapped to 4G-16M. BUG=b:255374782 Change-Id: Ia0b5a75f828033b29c378bed9a939b23d7f19140 Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com> --- M src/mainboard/amd/birman/board.fmd M src/soc/amd/morgana/Makefile.inc 2 files changed, 43 insertions(+), 7 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/50/69150/1 diff --git a/src/mainboard/amd/birman/board.fmd b/src/mainboard/amd/birman/board.fmd index 6c6ad92..6eff85c 100644 --- a/src/mainboard/amd/birman/board.fmd +++ b/src/mainboard/amd/birman/board.fmd @@ -1,8 +1,9 @@ -FLASH@0xFF000000 16M { +FLASH@0xFE000000 32M { BIOS { EC 4K + AMDFW @128K 13M + FMAP @16M 4K RW_MRC_CACHE 120K - FMAP 4K COREBOOT(CBFS) } } diff --git a/src/soc/amd/morgana/Makefile.inc b/src/soc/amd/morgana/Makefile.inc index f4243bc..e82f29a 100644 --- a/src/soc/amd/morgana/Makefile.inc +++ b/src/soc/amd/morgana/Makefile.inc @@ -114,6 +114,10 @@ # Use additional Soft Fuse bits specified in Kconfig PSP_SOFTFUSE_BITS += $(call strip_quotes, $(CONFIG_PSP_SOFTFUSE_BITS)) +ifeq ($(CONFIG_COREBOOT_ROMSIZE_KB_32768),y) +PSP_SOFTFUSE_BITS += 15 +endif + # type = 0x3a ifeq ($(CONFIG_HAVE_PSP_WHITELIST_FILE),y) PSP_WHITELIST_FILE=$(CONFIG_PSP_WHITELIST_FILE) @@ -297,11 +301,9 @@ --anywhere \ --output $@ - -cbfs-files-y += apu/amdfw -apu/amdfw-file := $(obj)/amdfw.rom -apu/amdfw-position := $(MORGANA_FWM_POSITION) -apu/amdfw-type := raw +$(call add_intermediate, add_amdfw, $(obj)/amdfw.rom) + printf " DD Adding AMD Firmware\n" + $(CBFSTOOL) $(obj)/coreboot.pre write -r AMDFW -f $(obj)/amdfw.rom --fill-upward ifeq ($(CONFIG_VBOOT_SLOTS_RW_AB)$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK),yy) cbfs-files-y += apu/amdfw_a -- To view, visit https://review.coreboot.org/c/coreboot/+/69150 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia0b5a75f828033b29c378bed9a939b23d7f19140 Gerrit-Change-Number: 69150 Gerrit-PatchSet: 1 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Zheng Bao Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Zheng Bao Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newchange

1 0

[S] Change in coreboot[master]: WIP:amdfwtool: Add support for 32M image size
by Bao Zheng (Code Review) 03 Nov '22

03 Nov '22

Attention is currently required from: Bao Zheng, Zheng Bao. Hello build bot (Jenkins), Zheng Bao, Arthur Heymans, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/69043 to look at the new patch set (#2). Change subject: WIP:amdfwtool: Add support for 32M image size ...................................................................... WIP:amdfwtool: Add support for 32M image size Needs to abandon. Change-Id: Ica050dfecd258fdd6717c308907d7d4d2e85b926 Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com> --- M util/amdfwtool/amdfwtool.c 1 file changed, 13 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/43/69043/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/69043 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ica050dfecd258fdd6717c308907d7d4d2e85b926 Gerrit-Change-Number: 69043 Gerrit-PatchSet: 2 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Attention: Zheng Bao Gerrit-MessageType: newpatchset

1 0

[S] Change in coreboot[master]: WIP:cbfstool: Expand the max size of image to 32M
by Bao Zheng (Code Review) 03 Nov '22

03 Nov '22

Attention is currently required from: Bao Zheng, Zheng Bao. Hello build bot (Jenkins), Julius Werner, Zheng Bao, Arthur Heymans, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/68389 to look at the new patch set (#3). Change subject: WIP:cbfstool: Expand the max size of image to 32M ...................................................................... WIP:cbfstool: Expand the max size of image to 32M Needs to abandon. Change-Id: I91e3488e6bf5748346c249ded723d3aa7b6f11b9 Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com> --- M util/cbfstool/cbfstool.c 1 file changed, 13 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/89/68389/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/68389 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I91e3488e6bf5748346c249ded723d3aa7b6f11b9 Gerrit-Change-Number: 68389 Gerrit-PatchSet: 3 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Attention: Zheng Bao Gerrit-MessageType: newpatchset

1 0

[S] Change in coreboot[master]: mb/google/brya/variants/volmar: Add firmware config field for FP_MCU
by Ren Kuo (Code Review) 03 Nov '22

03 Nov '22

Attention is currently required from: Ofer Fried, Tim Wawrzynczak. Ren Kuo has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68917 ) Change subject: mb/google/brya/variants/volmar: Add firmware config field for FP_MCU ...................................................................... Patch Set 3: (1 comment) Patchset: PS3: > Ofer, does this change need to go into the config. […] Hi Ofer, In config.star, we have already set the FP enable/disable by SKU ID. But from our testing, the "seconds_power_on_to_login" will be improved on the test firmware (close the FP). Suppose that disable FP in config.star can not skip the initial FP process if the ASL code set the FP enable. -- To view, visit https://review.coreboot.org/c/coreboot/+/68917 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I867771904811459697056662d5e29c545a1a9474 Gerrit-Change-Number: 68917 Gerrit-PatchSet: 3 Gerrit-Owner: Ren Kuo <ren.kuo(a)quanta.corp-partner.google.com> Gerrit-Reviewer: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Ofer Fried <oferfried(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paz Zcharya <pazz(a)google.com> Gerrit-Attention: Ofer Fried <oferfried(a)google.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Comment-Date: Thu, 03 Nov 2022 02:28:32 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-MessageType: comment

1 0

[M] Change in coreboot[master]: [test]mb/google/brya/marasov: Add memory config for marasov
by Frank Chu (Code Review) 03 Nov '22

03 Nov '22

Attention is currently required from: Tarun Tuli, Frank Chu. Hello build bot (Jenkins), Tarun Tuli, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/69149 to look at the new patch set (#4). Change subject: [test]mb/google/brya/marasov: Add memory config for marasov ...................................................................... [test]mb/google/brya/marasov: Add memory config for marasov Configure the rcomp, dqs and dq tables based on the schematic. TEST=Built successfully Signed-off-by: Frank Chu <Frank_Chu(a)pegatron.corp-partner.google.com> Change-Id: I8c9541006828deae83e2ae4a860f40d7433662d4 --- A src/mainboard/google/brya/variants/marasov/Makefile.inc A src/mainboard/google/brya/variants/marasov/memory.c 2 files changed, 129 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/69149/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/69149 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8c9541006828deae83e2ae4a860f40d7433662d4 Gerrit-Change-Number: 69149 Gerrit-PatchSet: 4 Gerrit-Owner: Frank Chu <frank_chu(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Ken Lu <ken_lu(a)pegatron.corp-partner.google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Frank Chu <frank_chu(a)pegatron.corp-partner.google.com> Gerrit-MessageType: newpatchset

1 0

[M] Change in coreboot[master]: mb/google/brya/marasov: Add memory config for marasov
by Frank Chu (Code Review) 03 Nov '22

03 Nov '22

Attention is currently required from: Tarun Tuli, Frank Chu. Hello build bot (Jenkins), Tarun Tuli, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/69149 to look at the new patch set (#2). Change subject: mb/google/brya/marasov: Add memory config for marasov ...................................................................... mb/google/brya/marasov: Add memory config for marasov Configure the rcomp, dqs and dq tables based on the schematic. TEST=Built successfully Signed-off-by: Frank Chu <Frank_Chu(a)pegatron.corp-partner.google.com> Change-Id: I8c9541006828deae83e2ae4a860f40d7433662d4 --- A src/mainboard/google/brya/variants/marasov/Makefile.inc A src/mainboard/google/brya/variants/marasov/memory.c 2 files changed, 128 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/69149/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/69149 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8c9541006828deae83e2ae4a860f40d7433662d4 Gerrit-Change-Number: 69149 Gerrit-PatchSet: 2 Gerrit-Owner: Frank Chu <frank_chu(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Ken Lu <ken_lu(a)pegatron.corp-partner.google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Frank Chu <frank_chu(a)pegatron.corp-partner.google.com> Gerrit-MessageType: newpatchset

1 0

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit November 2022