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Change subject: [test]mb/google/var/marasov: Generate SPD ID for supported memory parts
......................................................................
Patch Set 3: Code-Review+1
This change is ready for review.
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Change subject: acpi/acpi.c: Fix einj generation pointer arithmetics
......................................................................
Patch Set 1:
(1 comment)
Commit Message:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162861):
https://review.coreboot.org/c/coreboot/+/69326/comment/0272cd1d_371070d1
PS1, Line 18:
Possible unwrapped commit description (prefer a maximum 72 chars per line)
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Hello Arthur Heymans,
I'd like you to do a code review.
Please visit
https://review.coreboot.org/c/coreboot/+/69326
to review the following change.
Change subject: acpi/acpi.c: Fix einj generation pointer arithmetics
......................................................................
acpi/acpi.c: Fix einj generation pointer arithmetics
Without a cast the aritmetics of
tat = einj + sizeof(acpi_einj_smi_t)
is the same as
tat = (uintptr_t)einj + size(acpi_einj_smi_t) * size(acpi_einj_smi_t)
So it overshoots the intended offset by a lot.
This issue only came apparent because now einj is in the small IMD region
which is close to TSEG. With the wrong aritmetics the tat pointer ended
up inside TSEG which is not accessible from the OS causing exceptions.
TEST: observe that tat pointer is inside the small IBM below
TSEG (0x78000000 on our setup).
"acpi_create_einj trigger_action_table = 0x77ffe89c"
Change-Id: I3ab64b95c33eef01b2048816a21e17855bcb2f54
Signed-off-by: Arthur Heymans <arthur.heymans(a)9elements.com>
Signed-off-by: Jonathan Zhang <jonzhang(a)meta.com>
---
M src/acpi/acpi.c
1 file changed, 31 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/69326/1
diff --git a/src/acpi/acpi.c b/src/acpi/acpi.c
index e211558..4d0c59d 100644
--- a/src/acpi/acpi.c
+++ b/src/acpi/acpi.c
@@ -26,6 +26,7 @@
#include <device/mmio.h>
#include <device/pci.h>
#include <pc80/mc146818rtc.h>
+#include <stdint.h>
#include <string.h>
#include <types.h>
#include <version.h>
@@ -868,7 +869,7 @@
printk(BIOS_DEBUG, "%s einj_smi = %p\n", __func__, einj_smi);
memset(einj_smi, 0, sizeof(acpi_einj_smi_t));
- tat = (acpi_einj_trigger_table_t *)(einj_smi + sizeof(acpi_einj_smi_t));
+ tat = (acpi_einj_trigger_table_t *)((uint8_t *)einj_smi + sizeof(acpi_einj_smi_t));
tat->header_size = 16;
tat->revision = 0;
tat->table_size = sizeof(acpi_einj_trigger_table_t) +
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Change subject: soc/intel/alderlake: Hook up DisableDynamicTccoldHandshake to dev tree
......................................................................
Patch Set 5:
(1 comment)
Patchset:
PS5:
> DisableDynamicTccoldHandshake field is not in the RPL FSP headers.
yes, Bora filed a internal sighting for this issue
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Hello Marc Jones,
I'd like you to do a code review.
Please visit
https://review.coreboot.org/c/coreboot/+/69325
to review the following change.
Change subject: acpi: Update default processor string from decimal to hex
......................................................................
acpi: Update default processor string from decimal to hex
Update the default processor sting from decimal to hex to increase
the default number of Processor NamedObjects from 100 to 256
ie: CP00-CP99 is now CP00-CPFF
This fixes MADT table generation for system up to 256 cores.
Signed-off-by: Marc Jones <marcjones(a)sysproconsulting.com>
Signed-off-by: Jonathan Zhang <jonzhang(a)meta.com>
Change-Id: Id60a39d99fa77d1d89ad655ddecdebcc8a422f74
---
M src/acpi/Kconfig
1 file changed, 18 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/25/69325/1
diff --git a/src/acpi/Kconfig b/src/acpi/Kconfig
index d1051d8..7afff4e 100644
--- a/src/acpi/Kconfig
+++ b/src/acpi/Kconfig
@@ -8,7 +8,7 @@
config ACPI_CPU_STRING
string
- default "\\_SB.CP%02d"
+ default "\\_SB.CP%02X"
depends on HAVE_ACPI_TABLES
help
Sets the ACPI name string in the processor scope as written by
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Change subject: device/device_util: add dev_find_dsn()
......................................................................
Patch Set 9:
(1 comment)
File src/device/device_util.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-162859):
https://review.coreboot.org/c/coreboot/+/54510/comment/5ba2866b_c226a870
PS9, Line 84: * @param serial Serial number of the device.
Possible repeated word: 'serial'
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Hello build bot (Jenkins), Stefan Reinauer, David Hendricks, Subrata Banik, Angel Pons, ron minnich,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/54510
to look at the new patch set (#9).
Change subject: device/device_util: add dev_find_dsn()
......................................................................
device/device_util: add dev_find_dsn()
Add dev_find_dsn() to detect and match PCIe device serial
number. In addition, vendor ID is matched when provided.
Signed-off-by: Jonathan Zhang <jonzhang(a)meta.com>
Change-Id: I54b6dc42c8da47cd7b4447ab23a6a21562c7618
---
M src/device/device_util.c
M src/include/device/device.h
2 files changed, 69 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/10/54510/9
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