coreboot-gerrit November 2022

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[S] Change in coreboot[master]: mb/intel/harcuvar: Fix strict prototype warning
by 9elements QA (Code Review) 09 Nov '22

09 Nov '22

9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69308 ) Change subject: mb/intel/harcuvar: Fix strict prototype warning ...................................................................... Patch Set 3: Automatic boot test returned (PASS/FAIL/TOTAL): 14 / 2 / 16 PASS: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES_ and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/135217 PASS: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/135216 PASS: x86_32 "ThinkPad T500" , build config LENOVO_T500 and payload SeaBIOS : https://lava.9esec.io/r/135215 PASS: x86_32 "HP Z220 SFF Workstation" , build config HP_Z220_SFF_WORKSTATION and payload LinuxBoot_BB_kexec : https://lava.9esec.io/r/135214 FAIL: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload TianoCore : https://lava.9esec.io/r/135213 PASS: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload SeaBIOS : https://lava.9esec.io/r/135212 PASS: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload TianoCore : https://lava.9esec.io/r/135211 PASS: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload SeaBIOS : https://lava.9esec.io/r/135210 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35_SMM_TSEG and payload TianoCore : https://lava.9esec.io/r/135209 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35_SMM_TSEG and payload SeaBIOS : https://lava.9esec.io/r/135208 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35 and payload TianoCore : https://lava.9esec.io/r/135207 FAIL: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35 and payload SeaBIOS : https://lava.9esec.io/r/135206 PASS: x86_64 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_X86_64 and payload SeaBIOS : https://lava.9esec.io/r/135205 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ASAN and payload SeaBIOS : https://lava.9esec.io/r/135204 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ and payload SeaBIOS : https://lava.9esec.io/r/135203 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX and payload SeaBIOS : https://lava.9esec.io/r/135202 Please note: This test is under development and might not be accurate at all! -- To view, visit https://review.coreboot.org/c/coreboot/+/69308 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I94d979fcdbe41349c59248656066615bffd215b6 Gerrit-Change-Number: 69308 Gerrit-PatchSet: 3 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jeff Daly <jeffd(a)silicom-usa.com> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-Comment-Date: Wed, 09 Nov 2022 20:48:13 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[master]: acpi: Add initial support for CEDT
by Marc Jones (Code Review) 09 Nov '22

09 Nov '22

Attention is currently required from: Arthur Heymans, Jonathan Zhang, Tim Wawrzynczak, Paul Menzel. Marc Jones has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/64263 ) Change subject: acpi: Add initial support for CEDT ...................................................................... Patch Set 8: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/64263 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4fbce78efc86ad9f2468c37b4827a6dadbdc6802 Gerrit-Change-Number: 64263 Gerrit-PatchSet: 8 Gerrit-Owner: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Wed, 09 Nov 2022 20:48:05 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: acpi/acpi.c: Fix einj generation pointer arithmetics
by Marc Jones (Code Review) 09 Nov '22

09 Nov '22

Attention is currently required from: Lance Zhao, Arthur Heymans, Jonathan Zhang, Tim Wawrzynczak, Angel Pons, Shuming Chu (Shuming), Elyes Haouas. Marc Jones has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69326 ) Change subject: acpi/acpi.c: Fix einj generation pointer arithmetics ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/69326 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3ab64b95c33eef01b2048816a21e17855bcb2f54 Gerrit-Change-Number: 69326 Gerrit-PatchSet: 2 Gerrit-Owner: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Shuming Chu (Shuming) <s1218944(a)gmail.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Attention: Lance Zhao Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Shuming Chu (Shuming) <s1218944(a)gmail.com> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Comment-Date: Wed, 09 Nov 2022 20:45:54 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[L] Change in coreboot[master]: mb/amd/birman/gpio: Configure birman GPIOs
by Fred Reitberger (Code Review) 09 Nov '22

09 Nov '22

Attention is currently required from: Jason Glenesk, Felix Held. Fred Reitberger has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/69411 ) Change subject: mb/amd/birman/gpio: Configure birman GPIOs ...................................................................... mb/amd/birman/gpio: Configure birman GPIOs Configure birman GPIOs per schematic 105-D67000-00B v0.7 Signed-off-by: Fred Reitberger <reitbergerfred(a)gmail.com> Change-Id: I5459efb38431e568e25405c440b5b9cf1354f02f --- M src/mainboard/amd/birman/early_gpio.c M src/mainboard/amd/birman/gpio.c 2 files changed, 246 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/11/69411/1 diff --git a/src/mainboard/amd/birman/early_gpio.c b/src/mainboard/amd/birman/early_gpio.c index bcdeea7..89f7ef9 100644 --- a/src/mainboard/amd/birman/early_gpio.c +++ b/src/mainboard/amd/birman/early_gpio.c @@ -3,11 +3,69 @@ #include <soc/gpio.h> #include "gpio.h" -/* TODO: Update for birman */ - /* GPIO pins used by coreboot should be initialized in bootblock */ static const struct soc_amd_gpio gpio_set_stage_reset[] = { + /* TPM CS */ + PAD_NF(GPIO_29, SPI_TPM_CS_L, PULL_NONE), + /* ESPI_CS_L */ + PAD_NF(GPIO_30, ESPI_CS_L, PULL_NONE), + /* ESPI_SOC_CLK */ + PAD_NF(GPIO_77, SPI1_CLK, PULL_NONE), + /* ESPI_DATA0 */ + PAD_NF(GPIO_81, SPI1_DAT0, PULL_NONE), + /* ESPI_DATA1 */ + PAD_NF(GPIO_80, SPI1_DAT1, PULL_NONE), + /* ESPI_DATA2 */ + PAD_NF(GPIO_68, SPI1_DAT2, PULL_NONE), + /* ESPI_DATA3 */ + PAD_NF(GPIO_69, SPI1_DAT3, PULL_NONE), + /* ESPI_ALERT_L */ + PAD_NF(GPIO_22, ESPI_ALERT_D1, PULL_NONE), + /* TPM IRQ */ + PAD_SCI(GPIO_130, PULL_UP, EDGE_LOW), + /* SPI_ROM_REQ */ + PAD_NF(GPIO_67, SPI_ROM_REQ, PULL_NONE), + /* SPI_ROM_GNT */ + PAD_NF(GPIO_76, SPI_ROM_GNT, PULL_NONE), + /* KBRST_L */ + PAD_NF(GPIO_21, KBRST_L, PULL_NONE), + + /* Deassert PCIe Reset lines */ + /* PCIE_RST0_L */ + PAD_NFO(GPIO_26, PCIE_RST0_L, HIGH), + /* PCIE_RST1_L */ + PAD_NFO(GPIO_27, PCIE_RST1_L, HIGH), + + /* Enable UART 2 */ + /* UART2_RXD */ + PAD_NF(GPIO_136, UART2_RXD, PULL_NONE), + /* UART2_TXD */ + PAD_NF(GPIO_138, UART2_TXD, PULL_NONE), + /* Enable UART 0 */ + /* UART0_RXD */ + PAD_NF(GPIO_141, UART0_RXD, PULL_NONE), + /* UART0_TXD */ + PAD_NF(GPIO_143, UART0_TXD, PULL_NONE), + /* FANOUT0 */ + PAD_NF(GPIO_85, FANOUT0, PULL_NONE), + + /* I2C0 SCL */ + PAD_NF(GPIO_145, I2C0_SCL, PULL_NONE), + /* I2C0 SDA */ + PAD_NF(GPIO_146, I2C0_SDA, PULL_NONE), + /* I2C1 SCL */ + PAD_NF(GPIO_147, I2C1_SCL, PULL_NONE), + /* I2C1 SDA */ + PAD_NF(GPIO_148, I2C1_SDA, PULL_NONE), + /* I2C2_SCL */ + PAD_NF(GPIO_113, I2C2_SCL, PULL_NONE), + /* I2C2_SDA */ + PAD_NF(GPIO_114, I2C2_SDA, PULL_NONE), + /* I2C3_SCL */ + PAD_NF(GPIO_19, I2C3_SCL, PULL_NONE), + /* I2C3_SDA */ + PAD_NF(GPIO_20, I2C3_SDA, PULL_NONE), }; void mainboard_program_early_gpios(void) diff --git a/src/mainboard/amd/birman/gpio.c b/src/mainboard/amd/birman/gpio.c index 583b1d1..a95bdad 100644 --- a/src/mainboard/amd/birman/gpio.c +++ b/src/mainboard/amd/birman/gpio.c @@ -3,15 +3,186 @@ #include <soc/gpio.h> #include "gpio.h" -/* TODO: Update for birman */ - /* * As a rule of thumb, GPIO pins used by coreboot should be initialized at * bootblock while GPIO pins used only by the OS should be initialized at * ramstage. */ static const struct soc_amd_gpio gpio_set_stage_ram[] = { - + /* PWR_BTN_L */ + PAD_NF(GPIO_0, PWR_BTN_L, PULL_NONE), + /* SYS_RESET_L */ + PAD_NF(GPIO_1, SYS_RESET_L, PULL_NONE), + /* WAKE_L */ + PAD_NF_SCI(GPIO_2, WAKE_L, PULL_NONE, EDGE_LOW), + /* PCIE_SD_WAKE_L */ + PAD_GPI(GPIO_3, PULL_UP), + /* UART_WAKE_L_M2_APU */ + PAD_SCI(GPIO_4, PULL_UP, EDGE_LOW), + /* MPM_EVENT_L, input or OD output */ + PAD_GPI(GPIO_5, PULL_UP), + /* TPNL_INT_L */ + PAD_SCI(GPIO_6, PULL_UP, EDGE_LOW), + /* EC SCI */ + PAD_SCI(GPIO_7, PULL_UP, EDGE_LOW), + /* TPAD_INT_L */ + PAD_SCI(GPIO_8, PULL_UP, EDGE_LOW), + /* SD_CARD_PRSNT_L */ + PAD_SCI(GPIO_9, PULL_UP, EDGE_LOW), + /* VDD_MEM_VID0 */ + PAD_GPO(GPIO_10, HIGH), + /* HP_MIC_DET_L */ + PAD_GPI(GPIO_11, PULL_UP), + /* ALIGN_FLAG_MU_L */ + PAD_GPO(GPIO_12, HIGH), + /* GPIO_13 - GPIO_15: Not available */ + /* USB_OC0_L */ + PAD_NF(GPIO_16, USB_OC0_L, PULL_NONE), + /* WAKE_ON_WAN_L */ + PAD_SCI(GPIO_17, PULL_UP, EDGE_LOW), + /* PCIE_WLAN_WAKE_L */ + PAD_SCI(GPIO_18, PULL_UP, EDGE_LOW), + /* I2C3_SCL */ + PAD_NF(GPIO_19, I2C3_SCL, PULL_NONE), + /* I2C3_SDA */ + PAD_NF(GPIO_20, I2C3_SDA, PULL_NONE), + /* KBRST_L */ + PAD_NF(GPIO_21, KBRST_L, PULL_NONE), + /* ESPI_ALERT_L */ + PAD_NF(GPIO_22, ESPI_ALERT_D1, PULL_NONE), + /* AC_PRES */ + PAD_NF(GPIO_23, AC_PRES, PULL_NONE), + /* PCIE_LOM_WAKE_L */ + PAD_SCI(GPIO_24, PULL_UP, EDGE_LOW), + /* GPIO_25: Not available */ + /* PCIE_RST0_L */ + PAD_NFO(GPIO_26, PCIE_RST0_L, HIGH), + /* PCIE_RST1_L */ + PAD_NFO(GPIO_27, PCIE_RST1_L, HIGH), + /* GPIO_28: Not available */ + /* TPM CS */ + PAD_NF(GPIO_29, SPI_TPM_CS_L, PULL_NONE), + /* ESPI_CS_L */ + PAD_NF(GPIO_30, ESPI_CS_L, PULL_NONE), + /* INT_CLKREQ_L */ + PAD_SCI(GPIO_31, PULL_UP, EDGE_LOW), + /* LPC_RST_L */ + PAD_NF(GPIO_32, LPC_RST_L, PULL_NONE), + /* GPIO_33 - GPIO_37: Not available */ + /* CLK_REQ5_L */ + PAD_NF(GPIO_38, CLK_REQ5_L, PULL_NONE), + /* CLK_REQ6_L */ + PAD_NF(GPIO_39, CLK_REQ6_L, PULL_NONE), + /* USB2_HDR_P0/1_SMI */ + PAD_SCI(GPIO_40, PULL_UP, EDGE_LOW), + /* GPIO_41: Not available */ + /* VDD_MEM_VID1 */ + PAD_GPO(GPIO_42, HIGH), + /* GPIO_43 - GPIO_66: Not available */ + /* SPI_ROM_REQ */ + PAD_NF(GPIO_67, SPI_ROM_REQ, PULL_NONE), + /* ESPI_DATA2 */ + PAD_NF(GPIO_68, SPI1_DAT2, PULL_NONE), + /* ESPI_DATA3 */ + PAD_NF(GPIO_69, SPI1_DAT3, PULL_NONE), + /* SPI2_CLK */ + PAD_NF(GPIO_70, SPI2_CLK, PULL_NONE), + /* GPIO_71 - GPIO_73: Not available */ + /* SPI1_CS1_L */ + PAD_NF(GPIO_74, SPI1_CS1_L, PULL_NONE), + /* SPI2_CS1_L */ + PAD_NF(GPIO_75, SPI2_CS1_L, PULL_NONE), + /* SPI_ROM_GNT */ + PAD_NF(GPIO_76, SPI_ROM_GNT, PULL_NONE), + /* ESPI_SOC_CLK */ + PAD_NF(GPIO_77, SPI1_CLK, PULL_NONE), + /* M2_SSD0_RST_L */ + PAD_GPO(GPIO_78, HIGH), + /* M2_SSD1_RST_L */ + PAD_GPO(GPIO_79, HIGH), + /* ESPI_DATA1 */ + PAD_NF(GPIO_80, SPI1_DAT1, PULL_NONE), + /* ESPI_DATA0 */ + PAD_NF(GPIO_81, SPI1_DAT0, PULL_NONE), + /* GPIO_82 - GPIO_83: Not available */ + /* FANIN0 */ + PAD_NF(GPIO_84, FANIN0, PULL_NONE), + /* FANOUT0 */ + PAD_NF(GPIO_85, FANOUT0, PULL_NONE), + /* GPIO_86 - GPIO_88: Not available */ + /* I2S CODEC INT */ + PAD_SCI(GPIO_89, PULL_UP, EDGE_LOW), + /* ALERT_L_M2_SSD0 */ + PAD_SCI(GPIO_90, PULL_UP, EDGE_LOW), + /* NFC IRQ */ + PAD_SCI(GPIO_91, PULL_UP, EDGE_LOW), + /* CLK_REQ0_L */ + PAD_NF(GPIO_92, CLK_REQ0_L, PULL_NONE), + /* GPIO_93 - GPIO_103: Not available */ + /* SPI2_DAT0 */ + PAD_NF(GPIO_104, SPI2_DAT0, PULL_NONE), + /* SPI2_DAT1 */ + PAD_NF(GPIO_105, SPI2_DAT1, PULL_NONE), + /* SPI2_DAT2 */ + PAD_NF(GPIO_106, SPI2_DAT2, PULL_NONE), + /* SPI2_DAT3 */ + PAD_NF(GPIO_107, SPI2_DAT3, PULL_NONE), + /* GPIO_108 - GPIO_112: Not available */ + /* I2C2_SCL */ + PAD_NF(GPIO_113, I2C2_SCL, PULL_NONE), + /* I2C2_SDA */ + PAD_NF(GPIO_114, I2C2_SDA, PULL_NONE), + /* CLK_REQ1_L */ + PAD_NF(GPIO_115, CLK_REQ1_L, PULL_NONE), + /* CLK_REQ2_L */ + PAD_NF(GPIO_116, CLK_REQ2_L, PULL_NONE), + /* GPIO_117 - GPIO_129: Not available */ + /* TPM IRQ */ + PAD_SCI(GPIO_130, PULL_UP, EDGE_LOW), + /* CLK_REQ3_L */ + PAD_NF(GPIO_131, CLK_REQ3_L, PULL_NONE), + /* CLK_REQ4_L */ + PAD_NF(GPIO_132, CLK_REQ4_L, PULL_NONE), + /* GPIO_133 - GPIO_134: Not available */ + /* UART2_CTS_L */ + PAD_NF(GPIO_135, UART2_CTS_L, PULL_NONE), + /* UART2_RXD */ + PAD_NF(GPIO_136, UART2_RXD, PULL_NONE), + /* UART2_RTS_L */ + PAD_NF(GPIO_137, UART2_RTS_L, PULL_NONE), + /* UART2_TXD */ + PAD_NF(GPIO_138, UART2_TXD, PULL_NONE), + /* M2_SSD2_RST_L */ + PAD_GPO(GPIO_139, HIGH), + /* UART0_CTS_L */ + PAD_NF(GPIO_140, UART0_CTS_L, PULL_NONE), + /* UART0_RXD */ + PAD_NF(GPIO_141, UART0_RXD, PULL_NONE), + /* UART0_RTS_L */ + PAD_NF(GPIO_142, UART0_RTS_L, PULL_NONE), + /* UART0_TXD */ + PAD_NF(GPIO_143, UART0_TXD, PULL_NONE), + /* M2_SSD3_RST_L */ + PAD_GPO(GPIO_144, HIGH), + /* I2C0 SCL */ + PAD_NF(GPIO_145, I2C0_SCL, PULL_NONE), + /* I2C0 SDA */ + PAD_NF(GPIO_146, I2C0_SDA, PULL_NONE), + /* I2C1 SCL */ + PAD_NF(GPIO_147, I2C1_SCL, PULL_NONE), + /* I2C1 SDA */ + PAD_NF(GPIO_148, I2C1_SDA, PULL_NONE), + /* GPIO_149 - GPIO_152: Not available */ + /* UART4_CTS_L */ + PAD_NF(GPIO_153, UART4_CTS_L, PULL_NONE), + /* UART4_RTS_L */ + PAD_NF(GPIO_154, UART4_RTS_L, PULL_NONE), + /* UART4_RXD */ + PAD_NF(GPIO_155, UART4_RXD, PULL_NONE), + /* UART4_TXD */ + PAD_NF(GPIO_156, UART4_TXD, PULL_NONE), + /* M2_SSD4_RST_L */ + PAD_GPO(GPIO_157, HIGH), }; void mainboard_program_gpios(void) -- To view, visit https://review.coreboot.org/c/coreboot/+/69411 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5459efb38431e568e25405c440b5b9cf1354f02f Gerrit-Change-Number: 69411 Gerrit-PatchSet: 1 Gerrit-Owner: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: soc/amd/[glinda|morgana]: Enable override of MAINBOARD_BLOBS_DIR
by Fred Reitberger (Code Review) 09 Nov '22

09 Nov '22

Fred Reitberger has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/69410 ) Change subject: soc/amd/[glinda|morgana]: Enable override of MAINBOARD_BLOBS_DIR ...................................................................... soc/amd/[glinda|morgana]: Enable override of MAINBOARD_BLOBS_DIR When using site-local we need to have the ability to override MAINBOARD_BLOBS_DIR with a different location (presumably somewhere in site-local). Signed-off-by: Fred Reitberger <reitbergerfred(a)gmail.com> Change-Id: I0702fdb97fbc2c73d97994ab4d5161ff0f467518 --- M src/soc/amd/glinda/Makefile.inc M src/soc/amd/morgana/Makefile.inc 2 files changed, 20 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/10/69410/1 diff --git a/src/soc/amd/glinda/Makefile.inc b/src/soc/amd/glinda/Makefile.inc index e00421d..e77a1df 100644 --- a/src/soc/amd/glinda/Makefile.inc +++ b/src/soc/amd/glinda/Makefile.inc @@ -56,7 +56,10 @@ CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/glinda CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/common +# allow site-local Makefile to override blobs location +ifeq ($(MAINBOARD_BLOBS_DIR),) MAINBOARD_BLOBS_DIR:=$(top)/3rdparty/blobs/mainboard/$(MAINBOARDDIR) +endif # ROMSIG Normally At ROMBASE + 0x20000 # Overridden by CONFIG_AMD_FWM_POSITION_INDEX diff --git a/src/soc/amd/morgana/Makefile.inc b/src/soc/amd/morgana/Makefile.inc index a88e1a5..4229ea2 100644 --- a/src/soc/amd/morgana/Makefile.inc +++ b/src/soc/amd/morgana/Makefile.inc @@ -56,7 +56,10 @@ CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/morgana CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/common +# allow site-local Makefile to override blobs location +ifeq ($(MAINBOARD_BLOBS_DIR),) MAINBOARD_BLOBS_DIR:=$(top)/3rdparty/blobs/mainboard/$(MAINBOARDDIR) +endif # ROMSIG Normally At ROMBASE + 0x20000 # Overridden by CONFIG_AMD_FWM_POSITION_INDEX -- To view, visit https://review.coreboot.org/c/coreboot/+/69410 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0702fdb97fbc2c73d97994ab4d5161ff0f467518 Gerrit-Change-Number: 69410 Gerrit-PatchSet: 1 Gerrit-Owner: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: superio/nuvoton/nct6687d: Fix unexpected expression
by 9elements QA (Code Review) 09 Nov '22

09 Nov '22

9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/66265 ) Change subject: superio/nuvoton/nct6687d: Fix unexpected expression ...................................................................... Patch Set 7: Automatic boot test returned (PASS/FAIL/TOTAL): 15 / 1 / 16 PASS: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES_ and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/135201 PASS: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/135200 PASS: x86_32 "ThinkPad T500" , build config LENOVO_T500 and payload SeaBIOS : https://lava.9esec.io/r/135199 PASS: x86_32 "HP Z220 SFF Workstation" , build config HP_Z220_SFF_WORKSTATION and payload LinuxBoot_BB_kexec : https://lava.9esec.io/r/135198 PASS: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload TianoCore : https://lava.9esec.io/r/135197 PASS: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload SeaBIOS : https://lava.9esec.io/r/135196 FAIL: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload TianoCore : https://lava.9esec.io/r/135195 PASS: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload SeaBIOS : https://lava.9esec.io/r/135194 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35_SMM_TSEG and payload TianoCore : https://lava.9esec.io/r/135193 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35_SMM_TSEG and payload SeaBIOS : https://lava.9esec.io/r/135192 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35 and payload TianoCore : https://lava.9esec.io/r/135191 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35 and payload SeaBIOS : https://lava.9esec.io/r/135190 PASS: x86_64 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_X86_64 and payload SeaBIOS : https://lava.9esec.io/r/135189 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ASAN and payload SeaBIOS : https://lava.9esec.io/r/135188 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ and payload SeaBIOS : https://lava.9esec.io/r/135187 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX and payload SeaBIOS : https://lava.9esec.io/r/135186 Please note: This test is under development and might not be accurate at all! -- To view, visit https://review.coreboot.org/c/coreboot/+/66265 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie369454f10b515aa5601a5e78330e12f4b7a5e4c Gerrit-Change-Number: 66265 Gerrit-PatchSet: 7 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Wed, 09 Nov 2022 19:32:09 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[master]: device/device_util: add dev_find_dsn()
by build bot (Jenkins) (Code Review) 09 Nov '22

09 Nov '22

Attention is currently required from: Jonathan Zhang, Stefan Reinauer, David Hendricks, Subrata Banik, Angel Pons, ron minnich. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/54510 ) Change subject: device/device_util: add dev_find_dsn() ...................................................................... Patch Set 11: (1 comment) File src/device/device_util.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-163121): https://review.coreboot.org/c/coreboot/+/54510/comment/515fdd35_6d300ae7 PS11, Line 84: * @param serial Serial number of the device. Possible repeated word: 'serial' -- To view, visit https://review.coreboot.org/c/coreboot/+/54510 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I54b6dc42c8da47cd7b4447ab23a6a21562c7618b Gerrit-Change-Number: 54510 Gerrit-PatchSet: 11 Gerrit-Owner: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Angel Pons <angel.pons(a)9elements.com> Gerrit-Reviewer: David Hendricks Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: ron minnich <rminnich(a)gmail.com> Gerrit-CC: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Attention: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: David Hendricks Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Angel Pons <angel.pons(a)9elements.com> Gerrit-Attention: ron minnich <rminnich(a)gmail.com> Gerrit-Comment-Date: Wed, 09 Nov 2022 18:51:48 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[master]: device/device_util: add dev_find_dsn()
by Jonathan Zhang (Code Review) 09 Nov '22

09 Nov '22

Attention is currently required from: Jonathan Zhang, Stefan Reinauer, David Hendricks, Subrata Banik, Angel Pons, ron minnich. Hello build bot (Jenkins), Stefan Reinauer, David Hendricks, Subrata Banik, Angel Pons, ron minnich, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/54510 to look at the new patch set (#11). Change subject: device/device_util: add dev_find_dsn() ...................................................................... device/device_util: add dev_find_dsn() Add dev_find_dsn() to detect and match PCIe device serial number. In addition, vendor ID is matched when provided. Signed-off-by: Jonathan Zhang <jonzhang(a)meta.com> Change-Id: I54b6dc42c8da47cd7b4447ab23a6a21562c7618 --- M src/device/device_util.c M src/include/device/device.h 2 files changed, 68 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/10/54510/11 -- To view, visit https://review.coreboot.org/c/coreboot/+/54510 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I54b6dc42c8da47cd7b4447ab23a6a21562c7618b Gerrit-Change-Number: 54510 Gerrit-PatchSet: 11 Gerrit-Owner: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Angel Pons <angel.pons(a)9elements.com> Gerrit-Reviewer: David Hendricks Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: ron minnich <rminnich(a)gmail.com> Gerrit-CC: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Attention: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: David Hendricks Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Angel Pons <angel.pons(a)9elements.com> Gerrit-Attention: ron minnich <rminnich(a)gmail.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: cpu/x86/smm/module_loader: Fix ASEG loading
by 9elements QA (Code Review) 09 Nov '22

09 Nov '22

9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69233 ) Change subject: cpu/x86/smm/module_loader: Fix ASEG loading ...................................................................... Patch Set 4: Automatic boot test returned (PASS/FAIL/TOTAL): 15 / 1 / 16 PASS: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES_ and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/135169 PASS: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/135168 PASS: x86_32 "ThinkPad T500" , build config LENOVO_T500 and payload SeaBIOS : https://lava.9esec.io/r/135167 PASS: x86_32 "HP Z220 SFF Workstation" , build config HP_Z220_SFF_WORKSTATION and payload LinuxBoot_BB_kexec : https://lava.9esec.io/r/135166 FAIL: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload TianoCore : https://lava.9esec.io/r/135165 PASS: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload SeaBIOS : https://lava.9esec.io/r/135164 PASS: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload TianoCore : https://lava.9esec.io/r/135163 PASS: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload SeaBIOS : https://lava.9esec.io/r/135162 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35_SMM_TSEG and payload TianoCore : https://lava.9esec.io/r/135161 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35_SMM_TSEG and payload SeaBIOS : https://lava.9esec.io/r/135160 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35 and payload TianoCore : https://lava.9esec.io/r/135159 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35 and payload SeaBIOS : https://lava.9esec.io/r/135158 PASS: x86_64 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_X86_64 and payload SeaBIOS : https://lava.9esec.io/r/135157 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ASAN and payload SeaBIOS : https://lava.9esec.io/r/135156 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ and payload SeaBIOS : https://lava.9esec.io/r/135155 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX and payload SeaBIOS : https://lava.9esec.io/r/135154 Please note: This test is under development and might not be accurate at all! -- To view, visit https://review.coreboot.org/c/coreboot/+/69233 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I45355efb274c6ddd09a6fb57743d2f6a5b53d209 Gerrit-Change-Number: 69233 Gerrit-PatchSet: 4 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-Comment-Date: Wed, 09 Nov 2022 18:35:43 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/intel/xeon_sp: Move SMBIOS type 4 override functions from mainboa...
by Jonathan Zhang (Code Review) 09 Nov '22

09 Nov '22

Attention is currently required from: Johnny Lin, Christian Walter, Shuming Chu (Shuming), Arthur Heymans, Elyes Haouas. Jonathan Zhang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69363 ) Change subject: soc/intel/xeon_sp: Move SMBIOS type 4 override functions from mainboard to soc ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/69363 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I17df8de67bc2f5e89ea04da36efb2480a7e73174 Gerrit-Change-Number: 69363 Gerrit-PatchSet: 2 Gerrit-Owner: Shuming Chu (Shuming) <s1218944(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-CC: Jingle Hsu <jingle_hsu(a)wiwynn.com> Gerrit-CC: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Shuming Chu (Shuming) <s1218944(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Comment-Date: Wed, 09 Nov 2022 18:24:49 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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