coreboot-gerrit November 2022

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[S] Change in coreboot[master]: drivers/intel/fsp2_0: Use cpu_info
by Arthur Heymans (Code Review) 12 Nov '22

12 Nov '22

Arthur Heymans has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/69511 ) Change subject: drivers/intel/fsp2_0: Use cpu_info ...................................................................... Abandoned squashed -- To view, visit https://review.coreboot.org/c/coreboot/+/69511 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic38c1e8e0df6624b5af15c23478ab127ffcbe724 Gerrit-Change-Number: 69511 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-MessageType: abandon

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[M] Change in coreboot[master]: soc/intel/xeon_sp: Don't sort struct device cpus for numa
by Arthur Heymans (Code Review) 12 Nov '22

12 Nov '22

Attention is currently required from: Lance Zhao, Arthur Heymans, Anjaneya "Reddy" Chagam, Johnny Lin, Tim Wawrzynczak, Christian Walter, Angel Pons, Shuming Chu (Shuming), TangYiwei. Hello Lance Zhao, build bot (Jenkins), Anjaneya "Reddy" Chagam, Jonathan Zhang, Johnny Lin, Tim Wawrzynczak, Christian Walter, TangYiwei, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/68912 to look at the new patch set (#14). Change subject: soc/intel/xeon_sp: Don't sort struct device cpus for numa ...................................................................... soc/intel/xeon_sp: Don't sort struct device cpus for numa Currently the xeon_sp code reassigns struct devices apic_id so that srat entries can be added in a certain order. This is not a good idea as it breaks thread local storage which contains a pointer to it's struct device cpu. This moves the sorting of the lapic_ids to the srat table generation and adds the numa node id in each core init entry (now it is done in parallel too as a bonus). Change-Id: I372bcea1932d28e9bf712cc712f19a76fe3199b1 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/soc/intel/xeon_sp/cpx/cpu.c M src/soc/intel/xeon_sp/include/soc/util.h M src/soc/intel/xeon_sp/nb_acpi.c M src/soc/intel/xeon_sp/skx/cpu.c M src/soc/intel/xeon_sp/util.c 5 files changed, 59 insertions(+), 120 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/12/68912/14 -- To view, visit https://review.coreboot.org/c/coreboot/+/68912 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I372bcea1932d28e9bf712cc712f19a76fe3199b1 Gerrit-Change-Number: 68912 Gerrit-PatchSet: 14 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Anjaneya "Reddy" Chagam <anjaneya.chagam(a)intel.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: TangYiwei Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-CC: Shuming Chu (Shuming) <s1218944(a)gmail.com> Gerrit-CC: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Attention: Lance Zhao Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Anjaneya "Reddy" Chagam <anjaneya.chagam(a)intel.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Shuming Chu (Shuming) <s1218944(a)gmail.com> Gerrit-Attention: TangYiwei Gerrit-MessageType: newpatchset

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[M] Change in coreboot[master]: Revert "src/arch/x86: Use core apic id to get cpu_index()"
by Arthur Heymans (Code Review) 12 Nov '22

12 Nov '22

Attention is currently required from: Andrey Petrov. Hello Andrey Petrov, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/69509 to look at the new patch set (#2). Change subject: Revert "src/arch/x86: Use core apic id to get cpu_index()" ...................................................................... Revert "src/arch/x86: Use core apic id to get cpu_index()" This reverts commit 095c931cf12924da9011b47aa64f4a6f11d89f13. Previously cpu_info() was implemented with a struct on top of an aligned stack. As FSP changed the stack value cpu_info() could not be used in FSP context (which PPI is). Now cpu_info() uses GDT segments, which FSP does not touch so it can be used. Change-Id: I3a40156ba275b572d7d1913d8c17c24b4c8f6d78 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/arch/x86/cpu.c M src/arch/x86/include/arch/cpu.h M src/drivers/intel/fsp2_0/ppi/mp_service_ppi.c M src/soc/intel/xeon_sp/cpx/cpu.c M src/soc/intel/xeon_sp/skx/cpu.c 5 files changed, 32 insertions(+), 45 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/09/69509/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/69509 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3a40156ba275b572d7d1913d8c17c24b4c8f6d78 Gerrit-Change-Number: 69509 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[master]: drivers/ocp: add VPD processing framework
by Angel Pons (Code Review) 12 Nov '22

12 Nov '22

Attention is currently required from: Marc Jones, Jonathan Zhang, Johnny Lin, Paul Menzel, Johnny Li, Arthur Heymans, Shuming Chu (Shuming), Angel Pons, Tim Chu. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68784 ) Change subject: drivers/ocp: add VPD processing framework ...................................................................... Patch Set 3: (1 comment) File src/drivers/ocp/vpd/Makefile.inc: https://review.coreboot.org/c/coreboot/+/68784/comment/666a3e81_0fb66c7b PS2, Line 3: smm-$(C > We do need to customize SMI handler behavior based on firmware configuration (in this case, VPD), to […] Arthur, didn't you have some patches to allow passing runtime-configurable settings to the SMI handler? -- To view, visit https://review.coreboot.org/c/coreboot/+/68784 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I705bea348b1611f25ccbd798b77cfee22ec30f0f Gerrit-Change-Number: 68784 Gerrit-PatchSet: 3 Gerrit-Owner: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Angel Pons <angel.pons(a)9elements.com> Gerrit-Reviewer: Johnny Li <johnny_li(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Shuming Chu (Shuming) <s1218944(a)gmail.com> Gerrit-Attention: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Attention: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Johnny Li <johnny_li(a)wistron.corp-partner.google.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Shuming Chu (Shuming) <s1218944(a)gmail.com> Gerrit-Attention: Angel Pons <angel.pons(a)9elements.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Sat, 12 Nov 2022 19:21:49 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Jonathan Zhang <jonzhang(a)fb.com> Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: comment

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[M] Change in coreboot[master]: [WIP]cpu/mp_init: Detect the number of CPUs are runtime
by build bot (Jenkins) (Code Review) 12 Nov '22

12 Nov '22

Attention is currently required from: Arthur Heymans, Kyösti Mälkki. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68893 ) Change subject: [WIP]cpu/mp_init: Detect the number of CPUs are runtime ...................................................................... Patch Set 12: (2 comments) Commit Message: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-163416): https://review.coreboot.org/c/coreboot/+/68893/comment/7909ebbb_b8a68413 PS12, Line 8: Possible repeated word: 'are' File src/cpu/x86/mp_init.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-163416): https://review.coreboot.org/c/coreboot/+/68893/comment/eff77a1d_be0edc64 PS12, Line 494: if (!cpu->enabled) { braces {} are not necessary for any arm of this statement -- To view, visit https://review.coreboot.org/c/coreboot/+/68893 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iafe9d3d4838dad46cd0c7b6d30b905cbd258f17f Gerrit-Change-Number: 68893 Gerrit-PatchSet: 12 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Comment-Date: Sat, 12 Nov 2022 19:15:58 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: cpu/smm_module_loader.c: Fix up CPU index locally
by build bot (Jenkins) (Code Review) 12 Nov '22

12 Nov '22

Attention is currently required from: Arthur Heymans. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/64802 ) Change subject: cpu/smm_module_loader.c: Fix up CPU index locally ...................................................................... Patch Set 14: (1 comment) File src/cpu/x86/smm/smm_module_loader.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-163410): https://review.coreboot.org/c/coreboot/+/64802/comment/5960db98_db16439d PS14, Line 275: printk(BIOS_ERR, "%s: Failed to find BSP struct device\n", __func__); code indent should use tabs where possible -- To view, visit https://review.coreboot.org/c/coreboot/+/64802 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I070bc00ae5e5bceb6c5b90ea833cc057dd41f6cc Gerrit-Change-Number: 64802 Gerrit-PatchSet: 14 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Sat, 12 Nov 2022 19:13:43 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: drivers/intel/fsp2_0: Use cpu_info
by Arthur Heymans (Code Review) 12 Nov '22

12 Nov '22

Attention is currently required from: Andrey Petrov. Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/69511 ) Change subject: drivers/intel/fsp2_0: Use cpu_info ...................................................................... drivers/intel/fsp2_0: Use cpu_info Previously cpu_info() was implemented with a struct on top of an aligned stack. As FSP changed the stack value cpu_info() could not be used in FSP context (which PPI is). Now cpu_info() uses GDT segments, which FSP does not touch so it can be used. Change-Id: Ic38c1e8e0df6624b5af15c23478ab127ffcbe724 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/drivers/intel/fsp2_0/ppi/mp_service_ppi.c 1 file changed, 18 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/11/69511/1 diff --git a/src/drivers/intel/fsp2_0/ppi/mp_service_ppi.c b/src/drivers/intel/fsp2_0/ppi/mp_service_ppi.c index 36dcff5..4151f6a 100644 --- a/src/drivers/intel/fsp2_0/ppi/mp_service_ppi.c +++ b/src/drivers/intel/fsp2_0/ppi/mp_service_ppi.c @@ -31,7 +31,8 @@ int apicid; uint8_t package, core, thread; - if (!cpu_info()) + struct cpu_info *info = cpu_info(); + if (!info) return FSP_DEVICE_ERROR; if (processor_info_buffer == NULL) @@ -40,7 +41,7 @@ if (processor_number >= get_cpu_count()) return FSP_NOT_FOUND; - apicid = cpu_get_apic_id(processor_number); + apicid = info->cpu->path.apic.apic_id; if (apicid < 0) return FSP_DEVICE_ERROR; -- To view, visit https://review.coreboot.org/c/coreboot/+/69511 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic38c1e8e0df6624b5af15c23478ab127ffcbe724 Gerrit-Change-Number: 69511 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: soc/intel/alderlake/acpi.c: Don't look up coreboot CPU index
by Arthur Heymans (Code Review) 12 Nov '22

12 Nov '22

Attention is currently required from: Tarun Tuli, Subrata Banik. Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/69510 ) Change subject: soc/intel/alderlake/acpi.c: Don't look up coreboot CPU index ...................................................................... soc/intel/alderlake/acpi.c: Don't look up coreboot CPU index The coreboot CPU index for a lapic is arbitrary: it depends on which CPU obtains a spinlock first. Simply using an increasing index will result in consistent ACPI tables across each boot. Change-Id: Iaaaef213b32b33e3ec9f4874d576896c2335211c Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/soc/intel/alderlake/acpi.c 1 file changed, 16 insertions(+), 9 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/10/69510/1 diff --git a/src/soc/intel/alderlake/acpi.c b/src/soc/intel/alderlake/acpi.c index 1c820c2..a7c115c 100644 --- a/src/soc/intel/alderlake/acpi.c +++ b/src/soc/intel/alderlake/acpi.c @@ -287,6 +287,7 @@ acpigen_write_package(3); { char path[32] = { 0 }; + static size_t cpu_index; /* Emit the device path */ switch (dev->path.type) { case DEVICE_PATH_PCI: @@ -294,15 +295,7 @@ break; case DEVICE_PATH_APIC: - /* Lookup CPU id */ - for (size_t i = 0; i < CONFIG_MAX_CPUS; i++) { - if (cpu_get_apic_id(i) == dev->path.apic.apic_id) { - snprintf(path, sizeof(path), - CONFIG_ACPI_CPU_STRING, i); - break; - } - } - + snprintf(path, sizeof(path), CONFIG_ACPI_CPU_STRING, cpu_index++); acpigen_emit_namestring(path); break; -- To view, visit https://review.coreboot.org/c/coreboot/+/69510 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iaaaef213b32b33e3ec9f4874d576896c2335211c Gerrit-Change-Number: 69510 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-MessageType: newchange

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[M] Change in coreboot[master]: Revert "src/arch/x86: Use core apic id to get cpu_index()"
by Arthur Heymans (Code Review) 12 Nov '22

12 Nov '22

Attention is currently required from: Andrey Petrov. Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/69509 ) Change subject: Revert "src/arch/x86: Use core apic id to get cpu_index()" ...................................................................... Revert "src/arch/x86: Use core apic id to get cpu_index()" This reverts commit 095c931cf12924da9011b47aa64f4a6f11d89f13. Change-Id: I3a40156ba275b572d7d1913d8c17c24b4c8f6d78 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/arch/x86/cpu.c M src/arch/x86/include/arch/cpu.h M src/drivers/intel/fsp2_0/ppi/mp_service_ppi.c 3 files changed, 23 insertions(+), 42 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/09/69509/1 diff --git a/src/arch/x86/cpu.c b/src/arch/x86/cpu.c index f4cb83a..ecce582 100644 --- a/src/arch/x86/cpu.c +++ b/src/arch/x86/cpu.c @@ -316,27 +316,3 @@ /* APs are waiting for work. Last thing to do is park them. */ mp_park_aps(); } - -/* - * Previously cpu_index() implementation assumes that cpu_index() - * function will always getting called from coreboot context - * (ESP stack pointer will always refer to coreboot). - * - * But with MP_SERVICES_PPI implementation in coreboot this - * assumption might not be true, where FSP context (stack pointer refers - * to FSP) will request to get cpu_index(). - * - * Hence new logic to use cpuid to fetch lapic id and matches with - * cpus_default_apic_id[] variable to return correct cpu_index(). - */ -int cpu_index(void) -{ - int i; - int lapic_id = initial_lapicid(); - - for (i = 0; i < CONFIG_MAX_CPUS; i++) { - if (cpu_get_apic_id(i) == lapic_id) - return i; - } - return -1; -} diff --git a/src/arch/x86/include/arch/cpu.h b/src/arch/x86/include/arch/cpu.h index 0087a79..6ecc41b 100644 --- a/src/arch/x86/include/arch/cpu.h +++ b/src/arch/x86/include/arch/cpu.h @@ -159,6 +159,13 @@ return ci; } +static inline unsigned long cpu_index(void) +{ + struct cpu_info *ci; + ci = cpu_info(); + return ci->index; +} + struct cpuinfo_x86 { uint8_t x86; /* CPU family */ uint8_t x86_vendor; /* CPU vendor */ @@ -210,20 +217,6 @@ */ uint32_t cpu_get_feature_flags_edx(void); -/* - * Previously cpu_index() implementation assumes that cpu_index() - * function will always getting called from coreboot context - * (ESP stack pointer will always refer to coreboot). - * - * But with MP_SERVICES_PPI implementation in coreboot this - * assumption might not be true, where FSP context (stack pointer refers - * to FSP) will request to get cpu_index(). - * - * Hence new logic to use cpuid to fetch lapic id and matches with - * cpus_default_apic_id[] variable to return correct cpu_index(). - */ -int cpu_index(void); - #define DETERMINISTIC_CACHE_PARAMETERS_CPUID_IA 0x04 #define DETERMINISTIC_CACHE_PARAMETERS_CPUID_AMD 0x8000001d diff --git a/src/drivers/intel/fsp2_0/ppi/mp_service_ppi.c b/src/drivers/intel/fsp2_0/ppi/mp_service_ppi.c index 66bbc2f..36dcff5 100644 --- a/src/drivers/intel/fsp2_0/ppi/mp_service_ppi.c +++ b/src/drivers/intel/fsp2_0/ppi/mp_service_ppi.c @@ -31,7 +31,7 @@ int apicid; uint8_t package, core, thread; - if (cpu_index() < 0) + if (!cpu_info()) return FSP_DEVICE_ERROR; if (processor_info_buffer == NULL) @@ -66,7 +66,7 @@ efi_return_status_t mp_startup_all_aps(efi_ap_procedure procedure, bool run_serial, efi_uintn_t timeout_usec, void *argument) { - if (cpu_index() < 0) + if (!cpu_info()) return FSP_DEVICE_ERROR; if (procedure == NULL) @@ -84,7 +84,7 @@ efi_return_status_t mp_startup_all_cpus(efi_ap_procedure procedure, efi_uintn_t timeout_usec, void *argument) { - if (cpu_index() < 0) + if (!cpu_info()) return FSP_DEVICE_ERROR; if (procedure == NULL) @@ -119,7 +119,7 @@ efi_return_status_t mp_startup_this_ap(efi_ap_procedure procedure, efi_uintn_t processor_number, efi_uintn_t timeout_usec, void *argument) { - if (cpu_index() < 0) + if (!cpu_info()) return FSP_DEVICE_ERROR; if (processor_number > get_cpu_count()) -- To view, visit https://review.coreboot.org/c/coreboot/+/69509 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3a40156ba275b572d7d1913d8c17c24b4c8f6d78 Gerrit-Change-Number: 69509 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-MessageType: newchange

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[M] Change in coreboot[master]: [WIP]cpu/mp_init: Detect the number of CPUs are runtime
by Arthur Heymans (Code Review) 12 Nov '22

12 Nov '22

Attention is currently required from: Arthur Heymans, Kyösti Mälkki. Hello build bot (Jenkins), Kyösti Mälkki, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/68893 to look at the new patch set (#12). Change subject: [WIP]cpu/mp_init: Detect the number of CPUs are runtime ...................................................................... [WIP]cpu/mp_init: Detect the number of CPUs are runtime On some systems the only way to find out what CPUs are are present is by in initializing them and seeing which one checks in. TESTED with qemu reporting a too high number of CPUs. Change-Id: Iafe9d3d4838dad46cd0c7b6d30b905cbd258f17f Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/cpu/x86/Kconfig M src/cpu/x86/mp_init.c 2 files changed, 62 insertions(+), 18 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/68893/12 -- To view, visit https://review.coreboot.org/c/coreboot/+/68893 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iafe9d3d4838dad46cd0c7b6d30b905cbd258f17f Gerrit-Change-Number: 68893 Gerrit-PatchSet: 12 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newpatchset

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coreboot-gerrit November 2022