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Change subject: mb/google/brya/var/marasov: use i2c1 for TPM for marasov
......................................................................
Patch Set 6: Code-Review+2
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Hello Zheng Bao,
I'd like you to do a code review.
Please visit
https://review.coreboot.org/c/coreboot/+/69602
to review the following change.
Change subject: amdfwtool: Set NV-copy entry as physical address
......................................................................
amdfwtool: Set NV-copy entry as physical address
Change-Id: Ic869d089632ac3b8c654c7639e8a48ebaa7b3aaf
Signed-off-by: Zheng Bao <fishbaozi(a)gmail.com>
---
M util/amdfwtool/amdfwtool.c
1 file changed, 11 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/69602/1
diff --git a/util/amdfwtool/amdfwtool.c b/util/amdfwtool/amdfwtool.c
index 389be9f..fcbf760 100644
--- a/util/amdfwtool/amdfwtool.c
+++ b/util/amdfwtool/amdfwtool.c
@@ -1526,7 +1526,7 @@
/* If source is given, use that and its size */
biosdir->entries[count].source = fw_table[i].src;
biosdir->entries[count].address_mode =
- SET_ADDR_MODE(biosdir, AMD_ADDR_REL_BIOS);
+ SET_ADDR_MODE(biosdir, AMD_ADDR_PHYSICAL);
biosdir->entries[count].size = fw_table[i].size;
} else {
/* Else reserve size bytes within amdfw.rom */
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Change subject: mb/google/skyrim/var/winterhold: Update DPTC setting for SMT
......................................................................
Patch Set 15: Code-Review+2
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Change subject: mb/google/skyrim: Create crystaldrift variant
......................................................................
Patch Set 1: Code-Review+2
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Change subject: drivers/intel/fsp2_0: add log level parameter to fsp_print_guid
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Patch Set 1: Code-Review+2
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Change subject: common/acpi/dptc: Implement DTTS Proposal
......................................................................
Patch Set 39:
(5 comments)
File src/soc/amd/common/acpi/DTTS.asl:
https://review.coreboot.org/c/coreboot/+/68471/comment/16f62ffe_8fa85dd2
PS39, Line 12: Name(PRTN,7)
Please add a comment indicating the mapping of `0` -> `A`, `1` -> `B`, etc.
https://review.coreboot.org/c/coreboot/+/68471/comment/34d696ce_b8f78b96
PS39, Line 15: /* If _SB.DDEF is not present, DPTC is not enabled so return early. */
: If (!CondRefOf (\_SB.DDEF))
: {
: Return (Zero)
: }
This can be removed once `DTTS()` is called as part of `DPTC()`, which already does this check.
https://review.coreboot.org/c/coreboot/+/68471/comment/7ebe07cd_1dc85405
PS39, Line 21: //Set table A as default table after power on SUT
: If (\_SB.PRTN == 7)
: {
: \_SB.DDEF()
: Store(0,\_SB.PRTN)
: Return (Zero)
: }
Can `PRTN` be initialized to `0` so this can be removed?
https://review.coreboot.org/c/coreboot/+/68471/comment/21a03e6f_8c3bd2ed
PS39, Line 38: 1,\
nit: Various whitespace issues like this, where a space is missing after the `,`.
File src/soc/amd/mendocino/acpi/soc.asl:
https://review.coreboot.org/c/coreboot/+/68471/comment/bb08488d_8e948158
PS39, Line 33: #if CONFIG(FEATURE_DYNAMIC_DPTC)
: #include <soc/amd/common/acpi/DTTS.asl>
: #else
: #include <soc/amd/common/acpi/dptc.asl>
: #endif
This removes support for the low/no battery boot feature. That feature needs to remain supported on all Skyrim devices.
Instead, `dptc.asl` should call `DTTS()` if the device is not in low/no battery mode.
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