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Kapil Porwal has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69324 )
Change subject: soc/intel/alderlake: Check MANUF_LOCK when logging manufacturing mode
......................................................................
Patch Set 3: Code-Review+2
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Attention is currently required from: Tarun Tuli, Jamie Ryu, Subrata Banik, Ravishankar Sarawadi, Sridhar Siricilla.
Hello Tarun Tuli, Jamie Ryu, Subrata Banik, Ravishankar Sarawadi, Kapil Porwal,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/69578
to look at the new patch set (#2).
Change subject: soc/intel/meteorlake: Check MANUF_LOCK when logging manufacturing mode
......................................................................
soc/intel/meteorlake: Check MANUF_LOCK when logging manufacturing mode
As per Intel doc #729124 Section 3.6.1 "Intel CSME Production Machine
Determination", from ADL onwards there are three criteria which
determine whether a device is in production mode:
1. Fuses are programmed
2. SPI descriptor is locked
3. Manufacturing variables are locked
When logging whether the device is in manufacturing mode, 1 and 2 are
already checked. Add a check for 3 as well.
Also add logs for each individual criteria so it's easy to tell why the
overall Manufacturing Mode is set or not.
TEST=Build and boot MTL RVP
Snippet from coreboot log:
[DEBUG] ME: Manufacturing Mode : YES
Signed-off-by: Sridhar Siricilla <sridhar.siricilla(a)intel.com>
Change-Id: I495a7d8730716fc92e8c57b2caef73e8bb44d30b
---
M src/soc/intel/meteorlake/me.c
1 file changed, 42 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/78/69578/2
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Attention is currently required from: Tarun Tuli, Jamie Ryu, Subrata Banik, Ravishankar Sarawadi, Kapil Porwal.
Hello Tarun Tuli, Jamie Ryu, Subrata Banik, Ravishankar Sarawadi, Kapil Porwal,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/69577
to look at the new patch set (#2).
Change subject: soc/intel/meteorlake: Update CSE firmware status registers
......................................................................
soc/intel/meteorlake: Update CSE firmware status registers
The patch updates HFSTS4, HFSTS5 & HFSTS6 register definitions as per
MTL Intel CSME BIOS Specification (doc# 729124). Also, the patch logs
the firmware status details as per the new register definition.
TEST=Build and boot the coreboot on Rex
Snippet from coreboot log with the patch:
[DEBUG] ME: CPU Debug Disabled : NO
[DEBUG] ME: TXT Support : NO
Signed-off-by: Sridhar Siricilla <sridhar.siricilla(a)intel.com>
Change-Id: Ibee9a0955efc22ea0d9fdbba2d09e57d8851e22e
---
M src/soc/intel/meteorlake/me.c
1 file changed, 37 insertions(+), 31 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/69577/2
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Ravishankar Sarawadi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68305 )
Change subject: soc/intel: Add Meteor Lake IGD device id 0x7d45
......................................................................
Patch Set 3:
(3 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/68305/comment/262a7329_9f907358
PS2, Line 7: src/soc/intel/{common,meteorlake}: Add new Meteor Lake device ID
> Maybe: […]
Done
https://review.coreboot.org/c/coreboot/+/68305/comment/e5b2f2b1_234c2cf1
PS2, Line 7: src/
> Please remove.
Done
https://review.coreboot.org/c/coreboot/+/68305/comment/fd5aeada_2701686d
PS2, Line 10:
> Was this id missed in the past? Anyway, just add: Reorder the macros, so the smallest id comes first […]
Macros are based of def which are sorted in ascending order
#define PCI_DID_INTEL_MTL_P_GT2_1 0x7d45
#define PCI_DID_INTEL_MTL_P_GT2_2 0x7d50
#define PCI_DID_INTEL_MTL_P_GT2_3 0x7d55
#define PCI_DID_INTEL_MTL_P_GT2_4 0x7d60
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Dtrain Hsu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68742 )
Change subject: mb/google/skyrim/var/winterhold: Update DPTC setting for SMT
......................................................................
Patch Set 15: Code-Review+2
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