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Change subject: common/acpi/dptc: Implement DTTS Proposal
......................................................................
Patch Set 41:
(2 comments)
File src/soc/amd/common/acpi/DTTS.asl:
https://review.coreboot.org/c/coreboot/+/68471/comment/e7b93f36_6bed0fb8
PS39, Line 12: Name(PRTN,7)
> Please add a comment indicating the mapping of `0` -> `A`, `1` -> `B`, etc.
Done
https://review.coreboot.org/c/coreboot/+/68471/comment/a779e4f8_b5a71848
PS39, Line 21: //Set table A as default table after power on SUT
: If (\_SB.PRTN == 7)
: {
: \_SB.DDEF()
: Store(0,\_SB.PRTN)
: Return (Zero)
: }
> Can `PRTN` be initialized to `0` so this can be removed?
As thermal team's request, table A would be the first table during power on.
If I remove this and set PRTN = 0, it may change to another table by different condition. So I init PRTN = 7 for the first boot and force the first table as table A.
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Hello Tarun Tuli,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/69607
to look at the new patch set (#2).
Change subject: mb/google/dedede/var/xivu: Add fw_config probe for ALC5682-VS/ALC5682-VD
......................................................................
mb/google/dedede/var/xivu: Add fw_config probe for ALC5682-VS/ALC5682-VD
ALC5682-VS/ALC5682-VD use different kernel driver by different hid name.
Update hid name depending on the AUDIO_CODEC_SOURCE field of fw_config.
ALC5682I-VS: _HID = "RTL5682"
ALC5682-VD: _HID = "10EC5682"
BUG=b:246491349
TEST=ALC5682-VD/ALC5682-VS audio codec can work.
Signed-off-by: Ian Feng <ian_feng(a)compal.corp-partner.google.com>
Change-Id: I60d5e0af7e2dabd134c8059eaeac388d40ac2073
---
M src/mainboard/google/brya/variants/xivu/overridetree.cb
1 file changed, 40 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/69607/2
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build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68471 )
Change subject: common/acpi/dptc: Implement DTTS Proposal
......................................................................
Patch Set 40:
(5 comments)
Commit Message:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-163682):
https://review.coreboot.org/c/coreboot/+/68471/comment/763f89c2_cfda770b
PS40, Line 13:
Possible unwrapped commit description (prefer a maximum 72 chars per line)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-163682):
https://review.coreboot.org/c/coreboot/+/68471/comment/3896a44a_f33020ef
PS40, Line 39: switch to C with Lid close event, if temperature is over 55C, EC will
Possible unwrapped commit description (prefer a maximum 72 chars per line)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-163682):
https://review.coreboot.org/c/coreboot/+/68471/comment/5ff9fced_a6a3d9c8
PS40, Line 40: trigger temperature to switch form table C to D.
Possible unwrapped commit description (prefer a maximum 72 chars per line)
File src/soc/amd/common/acpi/DTTS.asl:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-163682):
https://review.coreboot.org/c/coreboot/+/68471/comment/06b3fce3_fb3b73b1
PS40, Line 13: // Table | A | B | C |
trailing whitespace
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-163682):
https://review.coreboot.org/c/coreboot/+/68471/comment/7b022ca5_dc3b70f9
PS40, Line 15: // PRTN | 0 | 1 | 2 | 3 | 4 | 5 | 6|
trailing whitespace
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Change subject: common/acpi/dptc: Implement DTTS Proposal
......................................................................
Patch Set 40:
(1 comment)
File src/soc/amd/common/acpi/DTTS.asl:
https://review.coreboot.org/c/coreboot/+/68471/comment/f9391ad6_d6ce0783
PS39, Line 38: 1,\
> nit: Various whitespace issues like this, where a space is missing after the `,`.
Done
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Change subject: mb/google/brya/var/gaelin: Configure DRIVER_TPM_I2C_BUS
......................................................................
Patch Set 8: Code-Review+2
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Change subject: mb/google/skyrim/var/frostflow: Set DPTC Electrical Parameters
......................................................................
Patch Set 2:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/69565/comment/1cd1b17a_8f0b303e
PS2, Line 7: DPTC
The value that you want to change is the package power parameter but
not for the DPTC.
Suggest removing DPTC and using package power instead.
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Change subject: mb/google/brya/var/gaelin: Configure devicetree settings
......................................................................
Patch Set 6: Code-Review+1
(2 comments)
Patchset:
PS5:
> still issue with code indentation and alignment
Done
Patchset:
PS6:
I have resolved the issue. Please review again.
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Change subject: soc/amd: Use ioapic helper functions
......................................................................
Patch Set 11:
(2 comments)
Patchset:
PS1:
> i'm not sure if fsp still uses the ioapic IDs; asked about this in an internal chat. […]
Thanks, I removed [WIP].
If you could provide testing feedback on CB:69527 would be great.
File src/soc/amd/cezanne/root_complex.c:
https://review.coreboot.org/c/coreboot/+/55571/comment/59e4cd42_0f05b87d
PS1, Line 179: setup_ioapic((u8 *)GNB_IO_APIC_ADDR, GNB_IOAPIC_ID);
> oh, that's a good catch
Mentioned in the commit message, do you want more about this?
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Raymond Chung has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68886 )
Change subject: mb/google/brya/var/gaelin: Configure DRIVER_TPM_I2C_BUS
......................................................................
Patch Set 8: Code-Review+1
(1 comment)
Patchset:
PS8:
I have resolved the merge conflict. Please review again.
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