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build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68471 )
Change subject: soc/amd/common/acpi: Implement DTTS Proposal
......................................................................
Patch Set 43:
(5 comments)
Commit Message:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-163690):
https://review.coreboot.org/c/coreboot/+/68471/comment/55f1d468_0feb7b80
PS43, Line 13:
Possible unwrapped commit description (prefer a maximum 72 chars per line)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-163690):
https://review.coreboot.org/c/coreboot/+/68471/comment/c8aedb82_8a8dd952
PS43, Line 39: switch to C with Lid close event, if temperature is over 55C, EC will
Possible unwrapped commit description (prefer a maximum 72 chars per line)
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-163690):
https://review.coreboot.org/c/coreboot/+/68471/comment/6e0816ad_2800beb2
PS43, Line 40: trigger temperature to switch form table C to D.
Possible unwrapped commit description (prefer a maximum 72 chars per line)
File src/soc/amd/common/acpi/DTTS.asl:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-163690):
https://review.coreboot.org/c/coreboot/+/68471/comment/b5e7346c_79619645
PS43, Line 13: // Table | A | B | C | D | E | F | First boot |
trailing whitespace
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-163690):
https://review.coreboot.org/c/coreboot/+/68471/comment/4e738517_1feebf76
PS43, Line 18:
trailing whitespace
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I'd like you to reexamine a change. Please visit
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Change subject: soc/amd/common/acpi: Implement DTTS Proposal
......................................................................
soc/amd/common/acpi: Implement DTTS Proposal
DTTS indicated Dynamic Thermal Table Switching.The proposal would like
to develop the schematic for switching 6 thermal table by lid status,
machine body mode and temperature. After entering the OS, the thermal table would be table A. If the “Motion” or “Lid-status change” is detected.The thermal table would switch to laptop mode or lid-close
mode.
Once the higher environment temperatures are detected,the thermal
table would switch to the corresponding power throttle table (B, D or
F). Based on these table switching mechanisms, no matter how the
end-user uses Chromebook,they could enjoy more humanized thermal
designs.
Release Over Over Release .
Temp. Temp. Temp. Temp. .
-------------------------------------------------------- .
Desktop mode Table A Table B 50C 45C .
Lid open (Default) .
-------------------------------------------------------- .
Desktop mode Table C Table D 55C 50C .
Lid close .
-------------------------------------------------------- .
Laptop mode Table E Table F 45C 40C .
-------------------------------------------------------- .
On the proposal, the transmission rules are list below:
1. Table A is the default table after booting.
2. A, C, E (Release Temp) can switch to each other.
3. B, D, F (Over Temp) can switch to each other.
4. A and B, C and D, E and F can switch to each other.
5. If Lid open/close or mode switch event trigger, temperature release tables will translation to each other, temperature over tables will translation to each other.After that event trigger, EC will check
the new temperature condition and decide if the temperature need to be trigger.For example, if table A will switch to table D, table A will
switch to C with Lid close event, if temperature is over 55C, EC will
trigger temperature to switch form table C to D.
6. EC will trigger 3 times body-detection events during power on boot
without any body-mode and lid status change. For this case if the
previous table label is on same group, we will based on the temperature
to decide the table.
For example, assume table A is current table. When the temperature
reaches 50C, than the table is switched from A to B. The current table
is B. When the temperature is downgrade below 45C, the table is
switched form B to A. The same rule is for C and D, E and F.
BRANCH=none
BUG=b:232946420
TEST=emerge-skyrim coreboot
Signed-off-by: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com>
Change-Id: I866e5e497e2936984e713029b5f0b6d54cbc9622
---
A src/soc/amd/common/acpi/DTTS.asl
M src/soc/amd/common/acpi/dptc.asl
2 files changed, 191 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/71/68471/43
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Change subject: mb/google/nissa/var/yaviks: Enable ISH driver and firmware name
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
> DRIVERS_INTEL_ISH is selected on BASEBOARD_NISSA
Oh right. I confused with the RPL.
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Change subject: mb/google/nissa/var/yaviks: Enable ISH driver and firmware name
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
> Did yaviks select the ISH in Kconfig as well?
DRIVERS_INTEL_ISH is selected on BASEBOARD_NISSA
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Hello build bot (Jenkins), Raul Rangel, Jason Nien, Matt DeVillier, Martin Roth, Eric Peers, Tim Van Patten, Jason Glenesk, Caveh Jalali, Tim Wawrzynczak, Fred Reitberger, Karthikeyan Ramasubramanian, Boris Mittelberg, Felix Held,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/68471
to look at the new patch set (#42).
Change subject: soc/amd/common/acpi: Implement DTTS Proposal
......................................................................
soc/amd/common/acpi: Implement DTTS Proposal
DTTS indicated Dynamic Thermal Table Switching.The proposal would like
to develop the schematic for switching 6 thermal table by lid status,
machine body mode and temperature. After entering the OS, the thermal table would be table A. If the “Motion” or “Lid-status change” is detected.The thermal table would switch to laptop mode or lid-close
mode.
Once the higher environment temperatures are detected,the thermal
table would switch to the corresponding power throttle table (B, D or
F). Based on these table switching mechanisms, no matter how the
end-user uses Chromebook,they could enjoy more humanized thermal
designs.
Release Over Over Release .
Temp. Temp. Temp. Temp. .
-------------------------------------------------------- .
Desktop mode Table A Table B 50C 45C .
Lid open (Default) .
-------------------------------------------------------- .
Desktop mode Table C Table D 55C 50C .
Lid close .
-------------------------------------------------------- .
Laptop mode Table E Table F 45C 40C .
-------------------------------------------------------- .
On the proposal, the transmission rules are list below:
1. Table A is the default table after booting.
2. A, C, E (Release Temp) can switch to each other.
3. B, D, F (Over Temp) can switch to each other.
4. A and B, C and D, E and F can switch to each other.
5. If Lid open/close or mode switch event trigger, temperature release tables will translation to each other, temperature over tables will translation to each other.After that event trigger, EC will check
the new temperature condition and decide if the temperature need to be trigger.For example, if table A will switch to table D, table A will
switch to C with Lid close event, if temperature is over 55C, EC will
trigger temperature to switch form table C to D.
6. EC will trigger 3 times body-detection events during power on boot
without any body-mode and lid status change. For this case if the
previous table label is on same group, we will based on the temperature
to decide the table.
For example, assume table A is current table. When the temperature
reaches 50C, than the table is switched from A to B. The current table
is B. When the temperature is downgrade below 45C, the table is
switched form B to A. The same rule is for C and D, E and F.
BRANCH=none
BUG=b:232946420
TEST=emerge-skyrim coreboot
Signed-off-by: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com>
Change-Id: I866e5e497e2936984e713029b5f0b6d54cbc9622
---
A src/soc/amd/common/acpi/DTTS.asl
M src/soc/amd/mendocino/acpi/soc.asl
2 files changed, 183 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/71/68471/42
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EricKY Cheng has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68471 )
Change subject: common/acpi/dptc: Implement DTTS Proposal
......................................................................
Patch Set 41:
(2 comments)
File src/soc/amd/common/acpi/DTTS.asl:
https://review.coreboot.org/c/coreboot/+/68471/comment/ed48afb5_246af2c0
PS39, Line 15: /* If _SB.DDEF is not present, DPTC is not enabled so return early. */
: If (!CondRefOf (\_SB.DDEF))
: {
: Return (Zero)
: }
> This can be removed once `DTTS()` is called as part of `DPTC()`, which already does this check.
Based on your suggestion, I need your help to clarify the design thinking as below.
You would like to request the code change as below?
1. Include DTTS.asl in DTPC.asl and separate by FEATURE_DYNAMIC_DPTC.
method(DPTC)
{
/* If _SB.DDEF is not present, DPTC is not enabled so return early. */
If (!CondRefOf (\_SB.DDEF))
{
Return (Zero)
}
No/Low battery ...etc
#if CONFIG(FEATURE_DYNAMIC_DPTC)
#include <soc/amd/common/acpi/DTTS.asl>
#endif
}
File src/soc/amd/mendocino/acpi/soc.asl:
https://review.coreboot.org/c/coreboot/+/68471/comment/bcfe9507_a9a8dc4b
PS39, Line 33: #if CONFIG(FEATURE_DYNAMIC_DPTC)
: #include <soc/amd/common/acpi/DTTS.asl>
: #else
: #include <soc/amd/common/acpi/dptc.asl>
: #endif
> This removes support for the low/no battery boot feature. […]
Follow thermal team's request, DTTS() is designed as customize feature.
Thermal team didn't ask low/no battery mode on the proposal.
DPTC() and DTTS() are independent thermal control methods separate by FEATURE_DYNAMIC_DPTC.
Based on your suggestion, I need your help to clarify the design thinking as below.
You would like to request the code change as below?
1. Include DTTS.asl in DTPC.asl and separate by FEATURE_DYNAMIC_DPTC.
method(DPTC)
{
/* If _SB.DDEF is not present, DPTC is not enabled so return early. */
If (!CondRefOf (\_SB.DDEF))
{
Return (Zero)
}
No/Low battery ...etc
#if CONFIG(FEATURE_DYNAMIC_DPTC)
#include <soc/amd/common/acpi/DTTS.asl>
#endif
}
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Attention is currently required from: Tarun Tuli, Chen Wisley, Wisley Chen.
Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69606 )
Change subject: mb/google/nissa/var/yaviks: Enable ISH driver and firmware name
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Patch Set 1: Code-Review+2
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