Leo Chou has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/69679 )
Change subject: mb/google/nissa/var/pujjo: Tune timing on SD device RTD3
......................................................................
mb/google/nissa/var/pujjo: Tune timing on SD device RTD3
Tune timing between power on and reset on SD device RTD3.
BUG=b:250746988
TEST=Use the value to boot on Pujjo successfully.
Signed-off-by: Leo Chou <leo.chou(a)lcfc.corp-partner.google.com>
Change-Id: I1ea77ec8381000249229653f1c0b9044bdf7866d
---
M src/mainboard/google/brya/variants/pujjo/overridetree.cb
1 file changed, 16 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/79/69679/1
diff --git a/src/mainboard/google/brya/variants/pujjo/overridetree.cb b/src/mainboard/google/brya/variants/pujjo/overridetree.cb
index 0a5624c..4bc96f9 100644
--- a/src/mainboard/google/brya/variants/pujjo/overridetree.cb
+++ b/src/mainboard/google/brya/variants/pujjo/overridetree.cb
@@ -543,6 +543,7 @@
register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_H13)"
register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_H12)"
register "srcclk_pin" = "3"
+ register "enable_delay_ms" = "50"
device generic 0 on end
end
probe SD_CARD SD_PRESENT
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Eric Lai has submitted this change. ( https://review.coreboot.org/c/coreboot/+/68886 )
Change subject: mb/google/brya/var/gaelin: Configure DRIVER_TPM_I2C_BUS
......................................................................
mb/google/brya/var/gaelin: Configure DRIVER_TPM_I2C_BUS
Add TPM I2C bus for gaelin in Kconfig.
BUG=b:249000573
BRANCH=firmware-brya-14505.B
TEST=Build "emerge-brask coreboot" and can boot to OS.
Change-Id: Idaac11111a9ba7df0929267567e4730b2811f5f0
Signed-off-by: Raymond Chung <raymondchung(a)ami.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68886
Reviewed-by: Eric Lai <eric_lai(a)quanta.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Derek Huang <derekhuang(a)google.com>
---
M src/mainboard/google/brya/Kconfig
1 file changed, 21 insertions(+), 0 deletions(-)
Approvals:
build bot (Jenkins): Verified
Raymond Chung: Looks good to me, but someone else must approve
Eric Lai: Looks good to me, approved
Derek Huang: Looks good to me, but someone else must approve
diff --git a/src/mainboard/google/brya/Kconfig b/src/mainboard/google/brya/Kconfig
index 702914d..47cd201 100644
--- a/src/mainboard/google/brya/Kconfig
+++ b/src/mainboard/google/brya/Kconfig
@@ -151,6 +151,7 @@
default 0x1 if BOARD_GOOGLE_LISBON
default 0x1 if BOARD_GOOGLE_GLADIOS
default 0x1 if BOARD_GOOGLE_MARASOV
+ default 0x1 if BOARD_GOOGLE_GAELIN4ADL
config DRIVER_TPM_I2C_ADDR
hex
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Change subject: mb/google/brya/var/gaelin: Configure devicetree settings
......................................................................
Patch Set 6: Code-Review+1
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Change subject: mb/google/brya/var/gaelin: Configure DRIVER_TPM_I2C_BUS
......................................................................
Patch Set 8: Code-Review+1
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Change subject: soc/amd/mendocino: Enhance DPTC_INPUT to support 13 DPTC thermal parameters
......................................................................
Patch Set 22:
(1 comment)
Patchset:
PS22:
Please have a review.
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Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69486 )
Change subject: lib/fmap.c: Show error on fmd flash size mismatch with Kconfig
......................................................................
Patch Set 1: Code-Review+2
(4 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/69486/comment/e419ce53_f9b9b723
PS1, Line 14: in helping to eliminate the confusion.
Not really sure what more there needs to be done, I think this should report the problem reliably?
Patchset:
PS1:
> This needs a few boards fixed apparantly but the change is good.
On Herobrine there's a weird situation where some of the early test boards were built by Qualcomm with a larger flash than intended, but we wanted to have it keep using the same flash layout as the other boards of the family -- so the simple hack was to just keep using the 8MB flash map on the 64MB flash. But I understand that it's probably better not to allow such a configuration to prevent mistakes.
Looks like we're preprocessing .fmd files, so I think it should be as simple as changing the `FLASH@0x0 8M` to `FLASH@0x0 CONFIG_ROM_SIZE` (or do an `#if CONFIG_BOARD_GOOGLE_HOGLIN || CONFIG_BOARD_GOOGLE_PIGLIN`, if we want it to be more explicit).
File src/lib/fmap.c:
https://review.coreboot.org/c/coreboot/+/69486/comment/1188863c_f085ef6b
PS1, Line 23: #ifdef FMAP_SECTION_FLASH_SIZE
Why would this ever not be defined? We rely on FMAP_OFFSET being available below as well, and this comes from the same header, so I think you can assume it is always available.
https://review.coreboot.org/c/coreboot/+/69486/comment/8cceeec2_e3b0cb9e
PS1, Line 25: rom
nit: "ROM"
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Hello build bot (Jenkins), Jason Nien, Matt DeVillier, Chris Wang, Martin Roth, Karthik Ramasubramanian,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/69565
to look at the new patch set (#4).
Change subject: mb/google/skyrim/var/frostflow: Set Package Power Parameters
......................................................................
mb/google/skyrim/var/frostflow: Set Package Power Parameters
Set Package Power Parameters form AMD DevHub document #57316.
"system_configuration" = "4"
"slow_ppt_limit_mW" = "25000"
"fast_ppt_limit_mW" = "30000"
"stapm_time_constant_s" = "200"
"thermctl_limit_degreeC" = "100"
"vrm_current_limit_mA" = "28000"
"vrm_maximum_current_limit_mA" = "50000"
"vrm_soc_current_limit_mA" = "10000"
BRANCH=none
BUG=b:257187831
TEST=emerge-skyrim coreboot
Signed-off-by: John Su <john_su(a)compal.corp-partner.google.com>
Change-Id: I15a69df1436aba05bc19eaffd79394e5ca9bdb3a
---
M src/mainboard/google/skyrim/variants/frostflow/overridetree.cb
1 file changed, 37 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/65/69565/4
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Change subject: acpi/Kconfig: Remove unused ACPI_EINJ config option
......................................................................
Patch Set 2:
(1 comment)
Patchset:
PS2:
This is default n and not the static value, maybe can keep it?
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Change subject: drivers/uart/Kconfig: Drop unused Kconfig symbol
......................................................................
Patch Set 2: Code-Review+2
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Change subject: cpu/x86/Kconfig: Drop unused Kconfig symbol
......................................................................
Patch Set 2: Code-Review+2
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