coreboot-gerrit November 2022

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[S] Change in coreboot[master]: mb/google/nissa/var/pujjo: Tune timing on SD device RTD3
by Reka Norman (Code Review) 15 Nov '22

15 Nov '22

Attention is currently required from: Tarun Tuli, Kangheui Won, Shou-Chieh Hsu, Leo Chou. Reka Norman has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69679 ) Change subject: mb/google/nissa/var/pujjo: Tune timing on SD device RTD3 ...................................................................... Patch Set 1: (1 comment) File src/mainboard/google/brya/variants/pujjo/overridetree.cb: https://review.coreboot.org/c/coreboot/+/69679/comment/653206f7_973e8241 PS1, Line 546: 50 Why 50 ms? The datasheet only says min 10 us. Also do you need reset_off_delay_ms as well to meet TPERST-OFF? -- To view, visit https://review.coreboot.org/c/coreboot/+/69679 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1ea77ec8381000249229653f1c0b9044bdf7866d Gerrit-Change-Number: 69679 Gerrit-PatchSet: 1 Gerrit-Owner: Leo Chou <leo.chou(a)lcfc.corp-partner.google.com> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Joey Peng <joey.peng(a)lcfc.corp-partner.google.com> Gerrit-CC: Jynn Chen <jynn.chen(a)lcfc.corp-partner.google.com> Gerrit-CC: Kevin3 Yang <Kevin3.Yang(a)lcfuturecenter.com> Gerrit-CC: Melo Chuang <melo.chuang(a)lcfc.corp-partner.google.com> Gerrit-CC: Stanley Wu <stanley1.wu(a)lcfc.corp-partner.google.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Kangheui Won <khwon(a)chromium.org> Gerrit-Attention: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Attention: Leo Chou <leo.chou(a)lcfc.corp-partner.google.com> Gerrit-Comment-Date: Wed, 16 Nov 2022 03:11:26 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mg/google/zork: Add functionality to set GPIOs in romstage
by Eric Lai (Code Review) 15 Nov '22

15 Nov '22

Eric Lai has submitted this change. ( https://review.coreboot.org/c/coreboot/+/69482 ) Change subject: mg/google/zork: Add functionality to set GPIOs in romstage ...................................................................... mg/google/zork: Add functionality to set GPIOs in romstage Add (empty) baseboard GPIO tables, getter functions, and call to gpio_configure_pads() in romstage, in preparation for adding touchscreen GPIO configuration/power sequencing. Change-Id: If0f626dbc7e601c2f49759e49a0baf027bf25f96 Signed-off-by: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69482 Reviewed-by: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> --- M src/mainboard/google/zork/romstage.c M src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c M src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c M src/mainboard/google/zork/variants/baseboard/include/baseboard/variants.h 4 files changed, 47 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Eric Lai: Looks good to me, approved Martin Roth: Looks good to me, approved diff --git a/src/mainboard/google/zork/romstage.c b/src/mainboard/google/zork/romstage.c index f72789a..9c70974 100644 --- a/src/mainboard/google/zork/romstage.c +++ b/src/mainboard/google/zork/romstage.c @@ -2,6 +2,7 @@ #include <baseboard/variants.h> #include <soc/fsp.h> +#include <soc/platform_descriptors.h> void __weak variant_updm_update(FSP_M_CONFIG *mcfg) {} @@ -9,3 +10,12 @@ { variant_updm_update(mcfg); } + +void mb_pre_fspm(void) +{ + const struct soc_amd_gpio *gpios; + size_t num_gpios; + + gpios = baseboard_romstage_gpio_table(&num_gpios); + gpio_configure_pads(gpios, num_gpios); +} diff --git a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c index 70e456c..3953a92 100644 --- a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c +++ b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c @@ -353,3 +353,11 @@ *size = ARRAY_SIZE(early_gpio_table); return early_gpio_table; } + +static const struct soc_amd_gpio romstage_gpio_table[] = {}; + +const struct soc_amd_gpio *baseboard_romstage_gpio_table(size_t *size) +{ + *size = ARRAY_SIZE(romstage_gpio_table); + return romstage_gpio_table; +} diff --git a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c index 455684e..17c00db 100644 --- a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c +++ b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c @@ -402,3 +402,11 @@ *size = ARRAY_SIZE(early_gpio_table); return early_gpio_table; } + +static const struct soc_amd_gpio romstage_gpio_table[] = {}; + +const struct soc_amd_gpio *baseboard_romstage_gpio_table(size_t *size) +{ + *size = ARRAY_SIZE(romstage_gpio_table); + return romstage_gpio_table; +} diff --git a/src/mainboard/google/zork/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/zork/variants/baseboard/include/baseboard/variants.h index c76ca02..2e97aab 100644 --- a/src/mainboard/google/zork/variants/baseboard/include/baseboard/variants.h +++ b/src/mainboard/google/zork/variants/baseboard/include/baseboard/variants.h @@ -23,6 +23,9 @@ /* This function provides GPIO init in bootblock. */ const struct soc_amd_gpio *variant_bootblock_gpio_table(size_t *size, int slp_typ); +/* This function provides GPIO settings for romstage. */ +const struct soc_amd_gpio *baseboard_romstage_gpio_table(size_t *size); + /* * This function provides GPIO table for the pads that need to be configured when entering * sleep. -- To view, visit https://review.coreboot.org/c/coreboot/+/69482 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If0f626dbc7e601c2f49759e49a0baf027bf25f96 Gerrit-Change-Number: 69482 Gerrit-PatchSet: 3 Gerrit-Owner: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Martin L Roth <gaumless(a)gmail.com> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: mb/google/kahlee: Implement touchscreen power sequencing
by Eric Lai (Code Review) 15 Nov '22

15 Nov '22

Eric Lai has submitted this change. ( https://review.coreboot.org/c/coreboot/+/69547 ) Change subject: mb/google/kahlee: Implement touchscreen power sequencing ...................................................................... mb/google/kahlee: Implement touchscreen power sequencing As all variants have a touchscreen option, in baseboard table set the enable GPIO high and hold in reset during romstage, then release reset in ramstage. This will allow the touchscreen to make use of the runtime I2C detect feature (enabled in a subsequent commit) so that an ACPI device entry is created only for the touchscreen actually present. This mirrors similar changes made for skyrim, guybrush, and zork. TEST=tested with rest of patch train Change-Id: Id235815904dfc093549a1ed529e19974010977c7 Signed-off-by: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69547 Reviewed-by: Martin L Roth <gaumless(a)gmail.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/google/kahlee/variants/baseboard/gpio.c 1 file changed, 28 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Martin L Roth: Looks good to me, approved diff --git a/src/mainboard/google/kahlee/variants/baseboard/gpio.c b/src/mainboard/google/kahlee/variants/baseboard/gpio.c index d421e7d..8f22835 100644 --- a/src/mainboard/google/kahlee/variants/baseboard/gpio.c +++ b/src/mainboard/google/kahlee/variants/baseboard/gpio.c @@ -69,6 +69,11 @@ }; static const struct soc_amd_gpio gpio_set_stage_rom[] = { + /* Enable touchscreen, hold in reset */ + /* GPIO_76 - EN_PP3300_TOUCHSCREEN */ + PAD_GPO(GPIO_76, HIGH), + /* GPIO_85 - TOUCHSCREEN_RST (Active High) */ + PAD_GPO(GPIO_85, HIGH), /* GPIO_133 - APU_EDP_BKLTEN_L (backlight - Active LOW) */ PAD_GPO(GPIO_133, HIGH), }; -- To view, visit https://review.coreboot.org/c/coreboot/+/69547 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id235815904dfc093549a1ed529e19974010977c7 Gerrit-Change-Number: 69547 Gerrit-PatchSet: 3 Gerrit-Owner: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: mb/google/kahlee: Use detect vs probed flag for touchscreens
by Eric Lai (Code Review) 15 Nov '22

15 Nov '22

Eric Lai has submitted this change. ( https://review.coreboot.org/c/coreboot/+/69548 ) Change subject: mb/google/kahlee: Use detect vs probed flag for touchscreens ...................................................................... mb/google/kahlee: Use detect vs probed flag for touchscreens Now that coreboot performs the necessary power sequencing, switch from using the 'probed' flag to 'detect' for all I2C touchscreens. This alleviates ChromeOS from having to probe to see which touchscreen model is actually present, prevents breaking ACPI spec by generating device entries with status 'enabled and present' which aren't actually present, and improves compatibility with upstream Linux and Windows. BUG=b:121309055 TEST=build/boot ChromeOS and Linux on barla/liara, ensure touchscreen is functional, and ACPI device entry generated for correct touchscreen model. Change-Id: I142a6cdb6e8cef51fd925d34362a19a8736982a5 Signed-off-by: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69548 Reviewed-by: Martin L Roth <gaumless(a)gmail.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/google/kahlee/variants/aleena/overridetree.cb M src/mainboard/google/kahlee/variants/baseboard/devicetree.cb M src/mainboard/google/kahlee/variants/careena/overridetree.cb M src/mainboard/google/kahlee/variants/grunt/overridetree.cb M src/mainboard/google/kahlee/variants/nuwani/overridetree.cb M src/mainboard/google/kahlee/variants/treeya/overridetree.cb 6 files changed, 37 insertions(+), 11 deletions(-) Approvals: build bot (Jenkins): Verified Martin L Roth: Looks good to me, approved diff --git a/src/mainboard/google/kahlee/variants/aleena/overridetree.cb b/src/mainboard/google/kahlee/variants/aleena/overridetree.cb index cdd3158..e0f796e 100644 --- a/src/mainboard/google/kahlee/variants/aleena/overridetree.cb +++ b/src/mainboard/google/kahlee/variants/aleena/overridetree.cb @@ -49,7 +49,7 @@ chip drivers/i2c/generic register "hid" = ""RAYD0001"" register "desc" = ""Raydium Touchscreen"" - register "probed" = "1" + register "detect" = "1" register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_LOW(GPIO_11)" register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_85)" register "reset_delay_ms" = "20" diff --git a/src/mainboard/google/kahlee/variants/baseboard/devicetree.cb b/src/mainboard/google/kahlee/variants/baseboard/devicetree.cb index 48c7928..86f589c 100644 --- a/src/mainboard/google/kahlee/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/kahlee/variants/baseboard/devicetree.cb @@ -87,7 +87,7 @@ chip drivers/i2c/generic register "hid" = ""RAYD0001"" register "desc" = ""Raydium Touchscreen"" - register "probed" = "1" + register "detect" = "1" register "irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPIO_11)" register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_85)" register "reset_delay_ms" = "20" @@ -100,7 +100,7 @@ chip drivers/i2c/generic register "hid" = ""ELAN0001"" register "desc" = ""ELAN Touchscreen"" - register "probed" = "1" + register "detect" = "1" register "irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPIO_11)" register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_85)" register "reset_delay_ms" = "20" diff --git a/src/mainboard/google/kahlee/variants/careena/overridetree.cb b/src/mainboard/google/kahlee/variants/careena/overridetree.cb index 37215ce..2067d38 100644 --- a/src/mainboard/google/kahlee/variants/careena/overridetree.cb +++ b/src/mainboard/google/kahlee/variants/careena/overridetree.cb @@ -59,7 +59,7 @@ chip drivers/i2c/generic register "hid" = ""RAYD0001"" register "desc" = ""Raydium Touchscreen"" - register "probed" = "1" + register "detect" = "1" register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_LOW(GPIO_11)" register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_85)" register "reset_delay_ms" = "20" @@ -72,7 +72,7 @@ chip drivers/i2c/hid register "generic.hid" = ""GTCH7503"" register "generic.desc" = ""G2TOUCH Touchscreen"" - register "generic.probed" = "1" + register "generic.detect" = "1" register "generic.irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPIO_11)" register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_85)" register "generic.reset_delay_ms" = "50" diff --git a/src/mainboard/google/kahlee/variants/grunt/overridetree.cb b/src/mainboard/google/kahlee/variants/grunt/overridetree.cb index 99ab16e..a8e5991 100644 --- a/src/mainboard/google/kahlee/variants/grunt/overridetree.cb +++ b/src/mainboard/google/kahlee/variants/grunt/overridetree.cb @@ -38,7 +38,7 @@ chip drivers/i2c/generic register "hid" = ""RAYD0001"" register "desc" = ""Raydium Touchscreen"" - register "probed" = "1" + register "detect" = "1" register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_LOW(GPIO_11)" register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_85)" register "reset_delay_ms" = "20" diff --git a/src/mainboard/google/kahlee/variants/nuwani/overridetree.cb b/src/mainboard/google/kahlee/variants/nuwani/overridetree.cb index adf94e9b..0de9c98 100644 --- a/src/mainboard/google/kahlee/variants/nuwani/overridetree.cb +++ b/src/mainboard/google/kahlee/variants/nuwani/overridetree.cb @@ -63,7 +63,7 @@ register "generic.hid" = ""ELAN90FC"" register "generic.desc" = ""ELAN Touchscreen"" register "generic.irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPIO_11)" - register "generic.probed" = "1" + register "generic.detect" = "1" register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_85)" register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_76)" register "generic.reset_delay_ms" = "20" @@ -76,7 +76,7 @@ register "generic.hid" = ""SYTS7817"" register "generic.desc" = ""Synaptics Touchscreen"" register "generic.irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPIO_11)" - register "generic.probed" = "1" + register "generic.detect" = "1" register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_85)" register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_76)" register "generic.reset_delay_ms" = "45" @@ -88,7 +88,7 @@ chip drivers/i2c/generic register "hid" = ""RAYD0001"" register "desc" = ""Raydium Touchscreen"" - register "probed" = "1" + register "detect" = "1" register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_LOW(GPIO_11)" register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_85)" register "reset_delay_ms" = "20" diff --git a/src/mainboard/google/kahlee/variants/treeya/overridetree.cb b/src/mainboard/google/kahlee/variants/treeya/overridetree.cb index 7d0c376..69ffca3 100644 --- a/src/mainboard/google/kahlee/variants/treeya/overridetree.cb +++ b/src/mainboard/google/kahlee/variants/treeya/overridetree.cb @@ -80,7 +80,7 @@ register "generic.hid" = ""SYTS7817"" register "generic.desc" = ""Synaptics Touchscreen"" register "generic.irq_gpio" = "ACPI_GPIO_IRQ_LEVEL_LOW(GPIO_11)" - register "generic.probed" = "1" + register "generic.detect" = "1" register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_85)" register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_76)" register "generic.reset_delay_ms" = "45" @@ -92,7 +92,7 @@ chip drivers/i2c/generic register "hid" = ""RAYD0001"" register "desc" = ""Raydium Touchscreen"" - register "probed" = "1" + register "detect" = "1" register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_LOW(GPIO_11)" register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_85)" register "reset_delay_ms" = "20" -- To view, visit https://review.coreboot.org/c/coreboot/+/69548 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I142a6cdb6e8cef51fd925d34362a19a8736982a5 Gerrit-Change-Number: 69548 Gerrit-PatchSet: 3 Gerrit-Owner: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: mb/google/kahlee: rename baseboard GPIO table getter for clarity
by Eric Lai (Code Review) 15 Nov '22

15 Nov '22

Eric Lai has submitted this change. ( https://review.coreboot.org/c/coreboot/+/69546 ) Change subject: mb/google/kahlee: rename baseboard GPIO table getter for clarity ...................................................................... mb/google/kahlee: rename baseboard GPIO table getter for clarity Rename variant_romstage_gpio_table() to baseboard_romstage_gpio_table() since the GPIO table comes from the baseboard (and is not overridden by any variant). Drop the __weak qualifier as this function is not overridden. This mirrors similar changes made for skyrim, guybrush, and zork. Change-Id: I772bd2d74fd6778ffaa1e0809cc53f8d43b153f3 Signed-off-by: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69546 Reviewed-by: Martin L Roth <gaumless(a)gmail.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/google/kahlee/romstage.c M src/mainboard/google/kahlee/variants/baseboard/gpio.c M src/mainboard/google/kahlee/variants/baseboard/include/baseboard/variants.h 3 files changed, 25 insertions(+), 4 deletions(-) Approvals: build bot (Jenkins): Verified Martin L Roth: Looks good to me, approved diff --git a/src/mainboard/google/kahlee/romstage.c b/src/mainboard/google/kahlee/romstage.c index c16b1d2..4b2fc9a 100644 --- a/src/mainboard/google/kahlee/romstage.c +++ b/src/mainboard/google/kahlee/romstage.c @@ -20,7 +20,7 @@ size_t num_gpios; const struct soc_amd_gpio *gpios; - gpios = variant_romstage_gpio_table(&num_gpios); + gpios = baseboard_romstage_gpio_table(&num_gpios); gpio_configure_pads(gpios, num_gpios); variant_romstage_entry(); diff --git a/src/mainboard/google/kahlee/variants/baseboard/gpio.c b/src/mainboard/google/kahlee/variants/baseboard/gpio.c index 3acf70f..d421e7d 100644 --- a/src/mainboard/google/kahlee/variants/baseboard/gpio.c +++ b/src/mainboard/google/kahlee/variants/baseboard/gpio.c @@ -254,8 +254,8 @@ return gpio_wlan_rst_early_reset; } -const __weak -struct soc_amd_gpio *variant_romstage_gpio_table(size_t *size) +const +struct soc_amd_gpio *baseboard_romstage_gpio_table(size_t *size) { *size = ARRAY_SIZE(gpio_set_stage_rom); return gpio_set_stage_rom; diff --git a/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/variants.h index 22cc9e0..648698d 100644 --- a/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/variants.h +++ b/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/variants.h @@ -14,7 +14,7 @@ int variant_get_ehci_oc_map(uint16_t *usb_oc_map); const struct soc_amd_gpio *variant_early_gpio_table(size_t *size); const struct soc_amd_gpio *variant_wlan_rst_early_gpio_table(size_t *size); -const struct soc_amd_gpio *variant_romstage_gpio_table(size_t *size); +const struct soc_amd_gpio *baseboard_romstage_gpio_table(size_t *size); const struct soc_amd_gpio *variant_gpio_table(size_t *size); void variant_romstage_entry(void); void variant_mainboard_suspend_resume(void); -- To view, visit https://review.coreboot.org/c/coreboot/+/69546 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I772bd2d74fd6778ffaa1e0809cc53f8d43b153f3 Gerrit-Change-Number: 69546 Gerrit-PatchSet: 3 Gerrit-Owner: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: mb/google/kahlee: Disable touchscreen GPIO export in CRS
by Eric Lai (Code Review) 15 Nov '22

15 Nov '22

Eric Lai has submitted this change. ( https://review.coreboot.org/c/coreboot/+/69549 ) Change subject: mb/google/kahlee: Disable touchscreen GPIO export in CRS ...................................................................... mb/google/kahlee: Disable touchscreen GPIO export in CRS Disable GPIO export in ACPI _CRS for touchscreens which set the register "have_power_resource." This eliminates the error: [ERROR] I2C: <bus:addr>: Exposing GPIOs in Power Resource and _CRS TEST=build/boot barla/liara, verify touchscreen functional, no error in cbmem log. Change-Id: Ifa8248755f346df37faf7a3182651bf190b0c33d Signed-off-by: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69549 Reviewed-by: Martin L Roth <gaumless(a)gmail.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/google/kahlee/variants/aleena/overridetree.cb M src/mainboard/google/kahlee/variants/baseboard/devicetree.cb M src/mainboard/google/kahlee/variants/careena/overridetree.cb M src/mainboard/google/kahlee/variants/grunt/overridetree.cb M src/mainboard/google/kahlee/variants/nuwani/overridetree.cb M src/mainboard/google/kahlee/variants/treeya/overridetree.cb 6 files changed, 27 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Martin L Roth: Looks good to me, approved diff --git a/src/mainboard/google/kahlee/variants/aleena/overridetree.cb b/src/mainboard/google/kahlee/variants/aleena/overridetree.cb index 357cbdcd..cdd3158 100644 --- a/src/mainboard/google/kahlee/variants/aleena/overridetree.cb +++ b/src/mainboard/google/kahlee/variants/aleena/overridetree.cb @@ -56,6 +56,7 @@ register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_76)" register "enable_delay_ms" = "1" register "has_power_resource" = "1" + register "disable_gpio_export_in_crs" = "1" device i2c 39 on end end end diff --git a/src/mainboard/google/kahlee/variants/baseboard/devicetree.cb b/src/mainboard/google/kahlee/variants/baseboard/devicetree.cb index fc74d77..48c7928 100644 --- a/src/mainboard/google/kahlee/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/kahlee/variants/baseboard/devicetree.cb @@ -94,6 +94,7 @@ register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_76)" register "enable_delay_ms" = "1" register "has_power_resource" = "1" + register "disable_gpio_export_in_crs" = "1" device i2c 39 on end end chip drivers/i2c/generic @@ -106,6 +107,7 @@ register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_76)" register "enable_delay_ms" = "1" register "has_power_resource" = "1" + register "disable_gpio_export_in_crs" = "1" device i2c 10 on end end end diff --git a/src/mainboard/google/kahlee/variants/careena/overridetree.cb b/src/mainboard/google/kahlee/variants/careena/overridetree.cb index 9e74990..37215ce 100644 --- a/src/mainboard/google/kahlee/variants/careena/overridetree.cb +++ b/src/mainboard/google/kahlee/variants/careena/overridetree.cb @@ -66,6 +66,7 @@ register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_76)" register "enable_delay_ms" = "1" register "has_power_resource" = "1" + register "disable_gpio_export_in_crs" = "1" device i2c 39 on end end chip drivers/i2c/hid diff --git a/src/mainboard/google/kahlee/variants/grunt/overridetree.cb b/src/mainboard/google/kahlee/variants/grunt/overridetree.cb index d1e6c3e..99ab16e 100644 --- a/src/mainboard/google/kahlee/variants/grunt/overridetree.cb +++ b/src/mainboard/google/kahlee/variants/grunt/overridetree.cb @@ -45,6 +45,7 @@ register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_76)" register "enable_delay_ms" = "1" register "has_power_resource" = "1" + register "disable_gpio_export_in_crs" = "1" device i2c 39 on end end end diff --git a/src/mainboard/google/kahlee/variants/nuwani/overridetree.cb b/src/mainboard/google/kahlee/variants/nuwani/overridetree.cb index 9ca19a0..adf94e9b 100644 --- a/src/mainboard/google/kahlee/variants/nuwani/overridetree.cb +++ b/src/mainboard/google/kahlee/variants/nuwani/overridetree.cb @@ -95,6 +95,7 @@ register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_76)" register "enable_delay_ms" = "1" register "has_power_resource" = "1" + register "disable_gpio_export_in_crs" = "1" device i2c 39 on end end end diff --git a/src/mainboard/google/kahlee/variants/treeya/overridetree.cb b/src/mainboard/google/kahlee/variants/treeya/overridetree.cb index a6f7a1d..7d0c376 100644 --- a/src/mainboard/google/kahlee/variants/treeya/overridetree.cb +++ b/src/mainboard/google/kahlee/variants/treeya/overridetree.cb @@ -99,6 +99,7 @@ register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_76)" register "enable_delay_ms" = "1" register "has_power_resource" = "1" + register "disable_gpio_export_in_crs" = "1" device i2c 39 on end end end -- To view, visit https://review.coreboot.org/c/coreboot/+/69549 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifa8248755f346df37faf7a3182651bf190b0c33d Gerrit-Change-Number: 69549 Gerrit-PatchSet: 3 Gerrit-Owner: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: mb/google/brya/var/agah: Set GPP_H13 to reset on PLTRST
by Eric Lai (Code Review) 15 Nov '22

15 Nov '22

Eric Lai has submitted this change. ( https://review.coreboot.org/c/coreboot/+/69340 ) ( 2 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: mb/google/brya/var/agah: Set GPP_H13 to reset on PLTRST ...................................................................... mb/google/brya/var/agah: Set GPP_H13 to reset on PLTRST GPP_H13 should be reset when going to S5. Update it to do so on PLTRST BUG=b:240617195 TEST=Measured on Agah that PP3300_SD_X goes off in S5. Change-Id: I959f92f2c486e0ca5cb4269b271c163b4c4925d4 Signed-off-by: Tarun Tuli <taruntuli(a)google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69340 Reviewed-by: Subrata Banik <subratabanik(a)google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/google/brya/variants/agah/gpio.c 1 file changed, 21 insertions(+), 2 deletions(-) Approvals: build bot (Jenkins): Verified Subrata Banik: Looks good to me, approved diff --git a/src/mainboard/google/brya/variants/agah/gpio.c b/src/mainboard/google/brya/variants/agah/gpio.c index b496843..02ed698 100644 --- a/src/mainboard/google/brya/variants/agah/gpio.c +++ b/src/mainboard/google/brya/variants/agah/gpio.c @@ -132,7 +132,7 @@ /* H9 : I2C4_SCL ==> NC */ PAD_NC(GPP_H9, NONE), /* H13 : I2C7_SCL ==> EN_PP3300_SD */ - PAD_CFG_GPO(GPP_H13, 1, DEEP), + PAD_CFG_GPO(GPP_H13, 1, PLTRST), /* H19 : SRCCLKREQ4# ==> LAN_CLKREQ_ODL */ PAD_CFG_NF(GPP_H19, NONE, DEEP, NF1), /* H21 : IMGCLKOUT2 ==> NC */ @@ -190,7 +190,7 @@ * then deassert PERST# in romstage */ /* H13 : I2C7_SCL ==> EN_PP3300_SD */ - PAD_CFG_GPO(GPP_H13, 1, DEEP), + PAD_CFG_GPO(GPP_H13, 1, PLTRST), /* B4 : PROC_GP3 ==> SSD_PERST_L */ PAD_CFG_GPO(GPP_B4, 0, DEEP), -- To view, visit https://review.coreboot.org/c/coreboot/+/69340 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I959f92f2c486e0ca5cb4269b271c163b4c4925d4 Gerrit-Change-Number: 69340 Gerrit-PatchSet: 4 Gerrit-Owner: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: arch/{arm64,riscv}: Remove "CRIT: " from log messages
by Eric Lai (Code Review) 15 Nov '22

15 Nov '22

Attention is currently required from: Philipp Hug, Julius Werner, ron minnich, Elyes Haouas. Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69497 ) Change subject: arch/{arm64,riscv}: Remove "CRIT: " from log messages ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/69497 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I506c1d278960c91d1283e9b1936c9c1678a10e17 Gerrit-Change-Number: 69497 Gerrit-PatchSet: 3 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Philipp Hug <philipp(a)hug.cx> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: ron minnich <rminnich(a)gmail.com> Gerrit-Attention: Philipp Hug <philipp(a)hug.cx> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: ron minnich <rminnich(a)gmail.com> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Comment-Date: Wed, 16 Nov 2022 02:58:42 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: commonlib/storage/sdhci.c: Remove "ERROR: " from log message
by Eric Lai (Code Review) 15 Nov '22

15 Nov '22

Attention is currently required from: Elyes Haouas. Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69622 ) Change subject: commonlib/storage/sdhci.c: Remove "ERROR: " from log message ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/69622 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I36e2785ae567d82339212140c1bde0876dfd450d Gerrit-Change-Number: 69622 Gerrit-PatchSet: 1 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Comment-Date: Wed, 16 Nov 2022 02:56:21 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: lib/malloc.c: Fix log messages
by Eric Lai (Code Review) 15 Nov '22

15 Nov '22

Attention is currently required from: Elyes Haouas. Eric Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69624 ) Change subject: lib/malloc.c: Fix log messages ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/69624 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6e4341555a3b03a531bd94ba5e36cbcadda9c663 Gerrit-Change-Number: 69624 Gerrit-PatchSet: 1 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Comment-Date: Wed, 16 Nov 2022 02:56:12 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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