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Change subject: soc/intel/meteorlake: Skip setting D0I3 bit for HECI devices
......................................................................
Patch Set 1:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/69680/comment/d827e5ed_9d44f813
PS1, Line 9: This patch skips setting D0I3 bit for all HECI devices by FSP.
> >@Sridhar, this is the backporting of the ADL CL, please take a look into the original CL for the reasoning.
>
> May I know concern sharing the reason here as well?
what is the point of sharing the reason when you have provided the original CL and clearly telling `it's a backport` ?
>
> >TL;DR: This is to ensure FSP can skip setting D0i3 bit for CSE and coreboot is able to sent EOP and put the HECI devices into the D0i3.
>
> Please add the message to commit message. Thanks
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Change subject: mb/google/rex: Add `disable_gpio_export_in_crs` for rex
......................................................................
Patch Set 2:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/69612/comment/f995d05d_16d48fef
PS1, Line 9: None of the touchscreens used in the rex program should require
: exporting of GPIOs in the ACPI _CRS method for any i2c
: device.
> Sentence rephrase is required. You may use "Since Rex designs doesn't use touch screens,
I don't understand why you think that Rex doesn't have touch screen?
> exporting GPIOs in the ACPI _CRS method for any i2c device".
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Hello build bot (Jenkins), Tarun Tuli, Kapil Porwal, Ivy Jian,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/69612
to look at the new patch set (#2).
Change subject: mb/google/rex: Add `disable_gpio_export_in_crs` for rex
......................................................................
mb/google/rex: Add `disable_gpio_export_in_crs` for rex
None of the touchscreens (over I2C) used in the rex program requires
exporting GPIOs in the ACPI _CRS method.
This can cause i2c devices to malfunction or cause timing
sequence violations if ACPI exports a PowerResource for the
device that uses GPIOs that are also exported in _CRS.
BUG=none
TEST=Able to build and boot Google, Rex platform.
Without this patch:
[ERROR] I2C: 00:10: Exposing GPIOs in Power Resource and _CRS
With this patch:
None
Signed-off-by: Subrata Banik <subratabanik(a)google.com>
Change-Id: I578a60eff27f94d6dc94b900604bc7560337d60b
---
M src/mainboard/google/rex/variants/rex0/overridetree.cb
1 file changed, 29 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/12/69612/2
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Change subject: acpi/Kconfig: Remove unused ACPI_EINJ config option
......................................................................
Patch Set 2: Code-Review+1
(1 comment)
Patchset:
PS2:
This is not about the code feature but the dead Kconfig. If there is code
around the Kconfig downstream, the Kconfig should stay with the downstream
code.
Nobody has suggested to remove the code. However, I would be careful with
linked binaries. The GPL might force you to publish your sensitive code.
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Change subject: util/testing: Move check of intel-sec-tool to separate target
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Patch Set 1: Code-Review+2
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Change subject: soc/intel/meteorlake: Skip setting D0I3 bit for HECI devices
......................................................................
Patch Set 1:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/69680/comment/492e84fb_d8ba6480
PS1, Line 9: This patch skips setting D0I3 bit for all HECI devices by FSP.
> > Can you please add reason for it? […]
>@Sridhar, this is the backporting of the ADL CL, please take a look into the original CL for the reasoning.
May I know concern sharing the reason here as well?
>TL;DR: This is to ensure FSP can skip setting D0i3 bit for CSE and coreboot is able to sent EOP and put the HECI devices into the D0i3.
Please add the message to commit message. Thanks
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