coreboot-gerrit November 2022

coreboot-gerrit@coreboot.org

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[S] Change in coreboot[master]: ec/google/chromec: Add DPTC support for host event 1/2/9
by build bot (Jenkins) (Code Review) 16 Nov '22

16 Nov '22

Attention is currently required from: Raul Rangel, Jason Nien, Dtrain Hsu, Caveh Jalali, Isaac Lee, Tim Wawrzynczak, Jon Murphy, Martin Roth, Eric Peers, Moises Garcia, Karthik Ramasubramanian. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/67793 ) Change subject: ec/google/chromec: Add DPTC support for host event 1/2/9 ...................................................................... Patch Set 26: (1 comment) Commit Message: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-163825): https://review.coreboot.org/c/coreboot/+/67793/comment/b89211bb_eeaed52b PS26, Line 8: Possible unwrapped commit description (prefer a maximum 72 chars per line) -- To view, visit https://review.coreboot.org/c/coreboot/+/67793 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I156a9d138ccac7f75cc0dd0d827f7a721fcbc782 Gerrit-Change-Number: 67793 Gerrit-PatchSet: 26 Gerrit-Owner: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Gerrit-Reviewer: Boris Mittelberg <bmbm(a)google.com> Gerrit-Reviewer: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Eric Peers <epeers(a)google.com> Gerrit-Reviewer: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Gerrit-Reviewer: Isaac Lee <isaaclee(a)google.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Moises Garcia <moisesgarcia(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Attention: Caveh Jalali <caveh(a)chromium.org> Gerrit-Attention: Isaac Lee <isaaclee(a)google.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Jon Murphy <jpmurphy(a)google.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Eric Peers <epeers(a)google.com> Gerrit-Attention: Moises Garcia <moisesgarcia(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Wed, 16 Nov 2022 21:12:00 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[master]: Makefile.inc: Remove workaround ACPI warnings
by Elyes Haouas (Code Review) 16 Nov '22

16 Nov '22

Attention is currently required from: Martin L Roth, Angel Pons, Arthur Heymans. Elyes Haouas has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69514 ) Change subject: Makefile.inc: Remove workaround ACPI warnings ...................................................................... Patch Set 5: Code-Review+2 (1 comment) File Makefile.inc: https://review.coreboot.org/c/coreboot/+/69514/comment/bc7883d5_698f773e PS1, Line 275: IASL_MISSING_DEPENDENCY = 3141 > it still necessary. […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/69514 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I787f6aa588175ba620a068918c42edc9d257c3ef Gerrit-Change-Number: 69514 Gerrit-PatchSet: 5 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Wed, 16 Nov 2022 21:11:11 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-MessageType: comment

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[M] Change in coreboot[master]: soc/amd/common/acpi: Implement DTTS Proposal
by build bot (Jenkins) (Code Review) 16 Nov '22

16 Nov '22

1 0

[S] Change in coreboot[master]: mb/google/skyrim/var/winterhold: Define Dynamic DPTC config
by EricKY Cheng (Code Review) 16 Nov '22

16 Nov '22

Attention is currently required from: Raul Rangel, Jason Nien, Isaac Lee, Jon Murphy, Martin Roth, Moises Garcia, Eric Peers, Karthikeyan Ramasubramanian. EricKY Cheng has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68942 ) Change subject: mb/google/skyrim/var/winterhold: Define Dynamic DPTC config ...................................................................... Patch Set 8: (1 comment) File src/mainboard/google/skyrim/Kconfig: https://review.coreboot.org/c/coreboot/+/68942/comment/4bbe6871_c0828900 PS8, Line 146: FEATURE_DYNAMIC_DPTC > If this CL was merged into another one, then I would abandon this CL. move it to https://review.coreboot.org/c/coreboot/+/68649 -- To view, visit https://review.coreboot.org/c/coreboot/+/68942 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3db70c151f962184e0475a8d11a51568f4b8ced3 Gerrit-Change-Number: 68942 Gerrit-PatchSet: 8 Gerrit-Owner: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Gerrit-Reviewer: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Eric Peers <epeers(a)google.com> Gerrit-Reviewer: Isaac Lee <isaaclee(a)google.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Karthikeyan Ramasubramanian <kramasub(a)chromium.org> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Moises Garcia <moisesgarcia(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: Isaac Lee <isaaclee(a)google.com> Gerrit-Attention: Jon Murphy <jpmurphy(a)google.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Moises Garcia <moisesgarcia(a)google.com> Gerrit-Attention: Eric Peers <epeers(a)google.com> Gerrit-Attention: Karthikeyan Ramasubramanian <kramasub(a)chromium.org> Gerrit-Comment-Date: Wed, 16 Nov 2022 21:02:54 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Raul Rangel <rrangel(a)chromium.org> Comment-In-Reply-To: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Gerrit-MessageType: comment

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[M] Change in coreboot[master]: soc/amd/mendocino: Enhance DPTC_INPUT to support 13 DPTC thermal para...
by EricKY Cheng (Code Review) 16 Nov '22

16 Nov '22

Attention is currently required from: Jason Glenesk, Raul Rangel, Jason Nien, Matt DeVillier, Tim Van Patten, Fred Reitberger, Felix Held. Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, Jason Nien, Matt DeVillier, Chris Wang, Fred Reitberger, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/68649 to look at the new patch set (#23). Change subject: soc/amd/mendocino: Enhance DPTC_INPUT to support 13 DPTC thermal parameters ...................................................................... soc/amd/mendocino: Enhance DPTC_INPUT to support 13 DPTC thermal parameters Expand DPTC_INPUT macro to supoort 13 DPTC thermal table parameters for dynamic table switching support. BRANCH=none BUG=b:232946420 TEST=emerge-skyrim coreboot Signed-off-by: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Change-Id: I6d6a00f0eca0b0941860b9bc75da41d7a10d60e8 --- M src/mainboard/google/skyrim/Kconfig M src/soc/amd/mendocino/root_complex.c 2 files changed, 162 insertions(+), 7 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/68649/23 -- To view, visit https://review.coreboot.org/c/coreboot/+/68649 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6d6a00f0eca0b0941860b9bc75da41d7a10d60e8 Gerrit-Change-Number: 68649 Gerrit-PatchSet: 23 Gerrit-Owner: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Gerrit-Reviewer: Chris Wang <chris.wang(a)amd.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Tim Van Patten <timvp(a)google.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Tim Van Patten <timvp(a)google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: mb/google/nissa/var/yaviks: Enable ISH driver and firmware name
by Felix Held (Code Review) 16 Nov '22

16 Nov '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/69606 ) Change subject: mb/google/nissa/var/yaviks: Enable ISH driver and firmware name ...................................................................... mb/google/nissa/var/yaviks: Enable ISH driver and firmware name Enable ISH driver and set firmware name as "adl_ish_lite.bin" BUG=b:242291814 TEST=boot into kernel, and check dmesg "ISH firmware intel/adl_ish_lite.bin loaded" Change-Id: I4badabba1a0cfceb77fc91f21953496152f19615 Signed-off-by: Wisley Chen <wisley.chen(a)quanta.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/69606 Reviewed-by: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Reviewed-by: Kangheui Won <khwon(a)chromium.org> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/google/brya/variants/yaviks/overridetree.cb 1 file changed, 26 insertions(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Kangheui Won: Looks good to me, approved Eric Lai: Looks good to me, approved diff --git a/src/mainboard/google/brya/variants/yaviks/overridetree.cb b/src/mainboard/google/brya/variants/yaviks/overridetree.cb index 6b57ada..c3b98b5 100644 --- a/src/mainboard/google/brya/variants/yaviks/overridetree.cb +++ b/src/mainboard/google/brya/variants/yaviks/overridetree.cb @@ -212,7 +212,12 @@ end end device ref emmc on end - device ref ish on end + device ref ish on + chip drivers/intel/ish + register "firmware_name" = ""adl_ish_lite.bin"" + device generic 0 on end + end + end device ref ufs on end device ref pch_espi on chip ec/google/chromeec -- To view, visit https://review.coreboot.org/c/coreboot/+/69606 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4badabba1a0cfceb77fc91f21953496152f19615 Gerrit-Change-Number: 69606 Gerrit-PatchSet: 2 Gerrit-Owner: Chen Wisley <wisley.chen%quantatw.com(a)gtempaccount.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Reka Norman <rekanorman(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Wisley Chen <wisley.chen(a)quanta.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[M] Change in coreboot[master]: soc/amd/common/acpi: Implement DTTS Proposal
by build bot (Jenkins) (Code Review) 16 Nov '22

16 Nov '22

1 0

[M] Change in coreboot[master]: soc/amd/common/acpi: Implement DTTS Proposal
by EricKY Cheng (Code Review) 16 Nov '22

16 Nov '22

Attention is currently required from: Raul Rangel, Jason Nien, EricKY Cheng, Matt DeVillier, Paul Menzel, Eric Lai, Martin Roth, Tim Van Patten, Eric Peers, LeilaCY Lin, Jason Glenesk, Caveh Jalali, Tim Wawrzynczak, Fred Reitberger, Karthikeyan Ramasubramanian, Boris Mittelberg, Felix Held. Hello build bot (Jenkins), Raul Rangel, Jason Nien, Matt DeVillier, Martin Roth, Eric Peers, Tim Van Patten, Jason Glenesk, Caveh Jalali, Tim Wawrzynczak, Fred Reitberger, Karthikeyan Ramasubramanian, Boris Mittelberg, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/68471 to look at the new patch set (#51). Change subject: soc/amd/common/acpi: Implement DTTS Proposal ...................................................................... soc/amd/common/acpi: Implement DTTS Proposal DTTS indicated Dynamic Thermal Table Switching.The proposal would like to develop the schematic for switching 6 thermal table by lid status, machine body mode and temperature. After entering the OS, the thermal table would be table A. If the “Motion” or “Lid-status change” is detected.The thermal table would switch to laptop mode or lid-close mode. Once the higher environment temperatures are detected,the thermal table would switch to the corresponding power throttle table (B, D or F). Based on these table switching mechanisms, no matter how the end-user uses Chromebook,they could enjoy more humanized thermal designs. Release Over Over Release . Temp. Temp. Temp. Temp. . -------------------------------------------------------- . Desktop mode Table A Table B 50C 45C . Lid open (Default) . -------------------------------------------------------- . Desktop mode Table C Table D 55C 50C . Lid close . -------------------------------------------------------- . Laptop mode Table E Table F 45C 40C . -------------------------------------------------------- . On the proposal, the transmission rules are list below: 1. Table A is the default table after booting. 2. A, C, E (Release Temp) can switch to each other. 3. B, D, F (Over Temp) can switch to each other. 4. A and B, C and D, E and F can switch to each other. 5. If Lid open/close or mode switch event trigger, temperature release tables will translation to each other, temperature over tables will translation to each other.After that event trigger, EC will check the new temperature condition and decide if the temperature need to be trigger.For example, if table A will switch to table D, table A will switch to C with Lid close event, if temperature is over 55C, EC will trigger temperature to switch form table C to D. 6. EC will trigger 3 times body-detection events during power on boot without any body-mode and lid status change. For this case if the previous table label is on same group, we will based on the temperature to decide the table. For example, assume table A is current table. When the temperature reaches 50C, than the table is switched from A to B. The current table is B. When the temperature is downgrade below 45C, the table is switched form B to A. The same rule is for C and D, E and F. BRANCH=none BUG=b:232946420 TEST=emerge-skyrim coreboot Signed-off-by: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Change-Id: I866e5e497e2936984e713029b5f0b6d54cbc9622 --- A src/soc/amd/common/acpi/DTTS.asl M src/soc/amd/common/acpi/dptc.asl 2 files changed, 181 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/71/68471/51 -- To view, visit https://review.coreboot.org/c/coreboot/+/68471 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I866e5e497e2936984e713029b5f0b6d54cbc9622 Gerrit-Change-Number: 68471 Gerrit-PatchSet: 51 Gerrit-Owner: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Gerrit-Reviewer: Boris Mittelberg <bmbm(a)google.com> Gerrit-Reviewer: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Eric Peers <epeers(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Karthikeyan Ramasubramanian <kramasub(a)chromium.org> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-CC: LeilaCY Lin <leilacy_lin(a)compal.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Tim Van Patten <timvp(a)google.com> Gerrit-Attention: Eric Peers <epeers(a)google.com> Gerrit-Attention: LeilaCY Lin <leilacy_lin(a)compal.corp-partner.google.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Caveh Jalali <caveh(a)chromium.org> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Karthikeyan Ramasubramanian <kramasub(a)chromium.org> Gerrit-Attention: Boris Mittelberg <bmbm(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[master]: soc/amd/common/acpi: Implement DTTS Proposal
by build bot (Jenkins) (Code Review) 16 Nov '22

16 Nov '22

1 0

[M] Change in coreboot[master]: soc/amd/common/acpi: Implement DTTS Proposal
by EricKY Cheng (Code Review) 16 Nov '22

16 Nov '22

Attention is currently required from: Raul Rangel, Jason Nien, EricKY Cheng, Matt DeVillier, Paul Menzel, Eric Lai, Martin Roth, Tim Van Patten, Eric Peers, LeilaCY Lin, Jason Glenesk, Caveh Jalali, Tim Wawrzynczak, Fred Reitberger, Karthikeyan Ramasubramanian, Boris Mittelberg, Felix Held. Hello build bot (Jenkins), Raul Rangel, Jason Nien, Matt DeVillier, Martin Roth, Eric Peers, Tim Van Patten, Jason Glenesk, Caveh Jalali, Tim Wawrzynczak, Fred Reitberger, Karthikeyan Ramasubramanian, Boris Mittelberg, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/68471 to look at the new patch set (#50). Change subject: soc/amd/common/acpi: Implement DTTS Proposal ...................................................................... soc/amd/common/acpi: Implement DTTS Proposal DTTS indicated Dynamic Thermal Table Switching.The proposal would like to develop the schematic for switching 6 thermal table by lid status, machine body mode and temperature. After entering the OS, the thermal table would be table A. If the “Motion” or “Lid-status change” is detected.The thermal table would switch to laptop mode or lid-close mode. Once the higher environment temperatures are detected,the thermal table would switch to the corresponding power throttle table (B, D or F). Based on these table switching mechanisms, no matter how the end-user uses Chromebook,they could enjoy more humanized thermal designs. Release Over Over Release . Temp. Temp. Temp. Temp. . -------------------------------------------------------- . Desktop mode Table A Table B 50C 45C . Lid open (Default) . -------------------------------------------------------- . Desktop mode Table C Table D 55C 50C . Lid close . -------------------------------------------------------- . Laptop mode Table E Table F 45C 40C . -------------------------------------------------------- . On the proposal, the transmission rules are list below: 1. Table A is the default table after booting. 2. A, C, E (Release Temp) can switch to each other. 3. B, D, F (Over Temp) can switch to each other. 4. A and B, C and D, E and F can switch to each other. 5. If Lid open/close or mode switch event trigger, temperature release tables will translation to each other, temperature over tables will translation to each other.After that event trigger, EC will check the new temperature condition and decide if the temperature need to be trigger.For example, if table A will switch to table D, table A will switch to C with Lid close event, if temperature is over 55C, EC will trigger temperature to switch form table C to D. 6. EC will trigger 3 times body-detection events during power on boot without any body-mode and lid status change. For this case if the previous table label is on same group, we will based on the temperature to decide the table. For example, assume table A is current table. When the temperature reaches 50C, than the table is switched from A to B. The current table is B. When the temperature is downgrade below 45C, the table is switched form B to A. The same rule is for C and D, E and F. BRANCH=none BUG=b:232946420 TEST=emerge-skyrim coreboot Signed-off-by: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Change-Id: I866e5e497e2936984e713029b5f0b6d54cbc9622 --- M src/mainboard/google/skyrim/Kconfig A src/soc/amd/common/acpi/DTTS.asl M src/soc/amd/common/acpi/dptc.asl 3 files changed, 189 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/71/68471/50 -- To view, visit https://review.coreboot.org/c/coreboot/+/68471 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I866e5e497e2936984e713029b5f0b6d54cbc9622 Gerrit-Change-Number: 68471 Gerrit-PatchSet: 50 Gerrit-Owner: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Gerrit-Reviewer: Boris Mittelberg <bmbm(a)google.com> Gerrit-Reviewer: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Eric Peers <epeers(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Karthikeyan Ramasubramanian <kramasub(a)chromium.org> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-CC: LeilaCY Lin <leilacy_lin(a)compal.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Tim Van Patten <timvp(a)google.com> Gerrit-Attention: Eric Peers <epeers(a)google.com> Gerrit-Attention: LeilaCY Lin <leilacy_lin(a)compal.corp-partner.google.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Caveh Jalali <caveh(a)chromium.org> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Karthikeyan Ramasubramanian <kramasub(a)chromium.org> Gerrit-Attention: Boris Mittelberg <bmbm(a)google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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coreboot-gerrit November 2022