coreboot-gerrit November 2022

coreboot-gerrit@coreboot.org

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[S] Change in coreboot[master]: Makefile.inc: fix multiple jobs build issue
by Paul Menzel (Code Review) 21 Nov '22

21 Nov '22

Attention is currently required from: Nico Huber, Michał Żygowski, Martin L Roth. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69819 ) Change subject: Makefile.inc: fix multiple jobs build issue ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/69819/comment/bc59727f_2074e56e PS2, Line 12: Workaround Work around -- To view, visit https://review.coreboot.org/c/coreboot/+/69819 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3a70beedf2eb1c018c5ff98163904253f9a87a61 Gerrit-Change-Number: 69819 Gerrit-PatchSet: 2 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Comment-Date: Mon, 21 Nov 2022 14:45:17 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/intel/meteorlake: Select X86_INIT_NEED_1_SIPI Kconfig
by Subrata Banik (Code Review) 21 Nov '22

21 Nov '22

Attention is currently required from: Tarun Tuli, Paul Menzel, Kapil Porwal, Arthur Heymans. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69851 ) Change subject: soc/intel/meteorlake: Select X86_INIT_NEED_1_SIPI Kconfig ...................................................................... Patch Set 3: (3 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/69851/comment/63f2fea5_11ccee94 PS3, Line 8: > Please fix. Ack https://review.coreboot.org/c/coreboot/+/69851/comment/3b85a5f6_65de5acb PS3, Line 9: This patch backport from commit > Port the Alder Lake commit … also to Meteor Lake. Ack https://review.coreboot.org/c/coreboot/+/69851/comment/28516526_1b0ffcf3 PS3, Line 11: > Please summarize the problem and solution nevertheless. Ack -- To view, visit https://review.coreboot.org/c/coreboot/+/69851 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iec21470b9b34514169789c39bdc3be4e4ff6c7b5 Gerrit-Change-Number: 69851 Gerrit-PatchSet: 3 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Mon, 21 Nov 2022 14:45:12 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/intel/meteorlake: Select X86_INIT_NEED_1_SIPI Kconfig
by Subrata Banik (Code Review) 21 Nov '22

21 Nov '22

Attention is currently required from: Tarun Tuli, Kapil Porwal, Arthur Heymans. Hello Tarun Tuli, Kapil Porwal, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/69851 to look at the new patch set (#4). Change subject: soc/intel/meteorlake: Select X86_INIT_NEED_1_SIPI Kconfig ...................................................................... soc/intel/meteorlake: Select X86_INIT_NEED_1_SIPI Kconfig This patch helps to save 10.200ms of booting time without any issue seen during MP Init. All cores are out from reset and alive. Port the Alder Lake commit'commit 6526e7896727 ("soc/intel/alderlake: Select X86_INIT_NEED_1_SIPI Kconfig for RPL")' also to Meteor Lake. Additionally, no performance degradation is observed while running benchmarks. BUG=b:211770003 TEST=Able to boot Google, Rex to ChromeOS with all cores enabled. Without this patch: 30:device enumeration 1,480,217 (28,232) With this patch: 30:device enumeration 1,472,466 (18,334) Signed-off-by: Subrata Banik <subratabanik(a)google.com> Change-Id: Iec21470b9b34514169789c39bdc3be4e4ff6c7b5 --- M src/soc/intel/meteorlake/Kconfig 1 file changed, 28 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/51/69851/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/69851 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iec21470b9b34514169789c39bdc3be4e4ff6c7b5 Gerrit-Change-Number: 69851 Gerrit-PatchSet: 4 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: soc/intel/meteorlake: Select X86_INIT_NEED_1_SIPI Kconfig
by Paul Menzel (Code Review) 21 Nov '22

21 Nov '22

Attention is currently required from: Tarun Tuli, Kapil Porwal, Arthur Heymans. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69851 ) Change subject: soc/intel/meteorlake: Select X86_INIT_NEED_1_SIPI Kconfig ...................................................................... Patch Set 3: (3 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/69851/comment/c6f803b3_4348596f PS3, Line 8: Please fix. https://review.coreboot.org/c/coreboot/+/69851/comment/f5264180_9945691d PS3, Line 9: This patch backport from commit Port the Alder Lake commit … also to Meteor Lake. https://review.coreboot.org/c/coreboot/+/69851/comment/07c35218_72f42db8 PS3, Line 11: Please summarize the problem and solution nevertheless. -- To view, visit https://review.coreboot.org/c/coreboot/+/69851 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iec21470b9b34514169789c39bdc3be4e4ff6c7b5 Gerrit-Change-Number: 69851 Gerrit-PatchSet: 3 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Mon, 21 Nov 2022 14:34:56 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/intel/meteorlake: Select X86_INIT_NEED_1_SIPI Kconfig
by Subrata Banik (Code Review) 21 Nov '22

21 Nov '22

Attention is currently required from: Tarun Tuli, Kapil Porwal, Arthur Heymans. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69851 ) Change subject: soc/intel/meteorlake: Select X86_INIT_NEED_1_SIPI Kconfig ...................................................................... Patch Set 3: (1 comment) Patchset: PS3: > Those benefits come entirely from skipping that "Waiting for 10ms after sending INIT.", not from skipping a SIPI init. Intel 64 and IA-32 architecture software developers' manual specifies this in Table 8-1. Is there any spec saying this is not needed? On Linux it's for instance always done. You can refer to the Intel Technical White Paper number:751003 for more details. Intel will update the SDM going forward to reflect the same going forward (this is what I heard from Intel). -- To view, visit https://review.coreboot.org/c/coreboot/+/69851 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iec21470b9b34514169789c39bdc3be4e4ff6c7b5 Gerrit-Change-Number: 69851 Gerrit-PatchSet: 3 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Mon, 21 Nov 2022 14:33:19 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/intel/meteorlake: Select X86_INIT_NEED_1_SIPI Kconfig
by Arthur Heymans (Code Review) 21 Nov '22

21 Nov '22

Attention is currently required from: Tarun Tuli, Subrata Banik, Kapil Porwal. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69851 ) Change subject: soc/intel/meteorlake: Select X86_INIT_NEED_1_SIPI Kconfig ...................................................................... Patch Set 3: (1 comment) Patchset: PS3: Those benefits come entirely from skipping that "Waiting for 10ms after sending INIT.", not from skipping a SIPI init. Intel 64 and IA-32 architecture software developers' manual specifies this in Table 8-1. Is there any spec saying this is not needed? On Linux it's for instance always done. -- To view, visit https://review.coreboot.org/c/coreboot/+/69851 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iec21470b9b34514169789c39bdc3be4e4ff6c7b5 Gerrit-Change-Number: 69851 Gerrit-PatchSet: 3 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Comment-Date: Mon, 21 Nov 2022 14:26:23 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[master]: Add basic support for Rapto Lake S CPUs on Alder Lake PCH (#640555) T...
by Michał Żygowski (Code Review) 21 Nov '22

21 Nov '22

Attention is currently required from: Tarun Tuli, Subrata Banik, Name of user not set #1004406, Michal Zygowski. Michał Żygowski has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69798 ) Change subject: Add basic support for Rapto Lake S CPUs on Alder Lake PCH (#640555) This was tested on a MSI PRO Z690-A (ms7d25) with Ubuntu 22.10 and LinuxBoot. TODOS are Intel VBT. ...................................................................... Patch Set 3: (14 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/69798/comment/99dfe230_bc9a7fae PS3, Line 7: 640555 I see this is an EDS. What revision it was? https://review.coreboot.org/c/coreboot/+/69798/comment/c2822de6_cc35d94f PS3, Line 8: This was tested on a MSI PRO Z690-A (ms7d25) with Ubuntu 22.10 and LinuxBoot. Move this sentence just above Change-ID in the commit message liek this: TEST=Tested on a MSI PRO Z690-A (ms7d25) with Ubuntu 22.10 and LinuxBoot. File src/include/cpu/intel/cpu_ids.h: https://review.coreboot.org/c/coreboot/+/69798/comment/0d3b7962_e601cc1e PS3, Line 67: #define CPUID_RAPTORLAKE_S_S0 0xb0671 CPUID_RAPTORLAKE_S_B0 it is B0 stepping according to the datasheet. And if so, I would also add: #define CPUID_RAPTORLAKE_S_A0 0xb0670 Because it will automatically be A0 stepping which we can also report (but unlikely to be found on production systems). File src/include/device/pci_ids.h: https://review.coreboot.org/c/coreboot/+/69798/comment/f7d8be98_b0291f33 PS3, Line 4009: #define PCI_DID_INTEL_RPL_S_GT2 0xa782 : #define PCI_DID_INTEL_RPL_S_GT3 0xa783 I didn't find them in the public datasheet here https://edc.intel.com/content/www/us/en/design/products/platforms/details/r… Where do these come from? https://review.coreboot.org/c/coreboot/+/69798/comment/346dc856_e785442c PS3, Line 4141: #define PCI_DID_INTEL_RPL_S_ID_4 0xa705 : #define PCI_DID_INTEL_RPL_S_ID_5 0x4692 I also can;t find these in public datasheet. Any reference for those? File src/soc/intel/alderlake/bootblock/report_platform.c: https://review.coreboot.org/c/coreboot/+/69798/comment/f751fa19_8382d7de PS3, Line 37: { CPUID_RAPTORLAKE_S_S0, "Raptorlake-S S0 Platform" }, { CPUID_RAPTORLAKE_S_B0, "Raptorlake-S B0 Platform" }, https://review.coreboot.org/c/coreboot/+/69798/comment/5ba8cb6d_b76cfdf2 PS3, Line 207: { PCI_DID_INTEL_RPL_S_GT1, "Raptorlake S GT1(32EU)" }, : { PCI_DID_INTEL_RPL_S_GT2, "Raptorlake S GT2(24EU)" }, : { PCI_DID_INTEL_RPL_S_GT3, "Raptorlake S GT3(16EU)" }, Let's stick with previous convention and omit execution units. File src/soc/intel/alderlake/fsp_params.c: https://review.coreboot.org/c/coreboot/+/69798/comment/d2aa7c32_8987f29d PS3, Line 544: return ICC_MAX_ADL_S; Isn't it 36A for RPL-S? File src/soc/intel/alderlake/include/soc/cpu.h: https://review.coreboot.org/c/coreboot/+/69798/comment/45f3ba9a_66c04554 PS3, Line 28: RPL_S, Please add it as a last item in the enum File src/soc/intel/alderlake/vr_config.c: https://review.coreboot.org/c/coreboot/+/69798/comment/8944a762_d888a64c PS3, Line 174: { PCI_DID_INTEL_RPL_S_ID_1, 125, VR_CFG_ALL_DOMAINS_ICC(280, 30) }, : { PCI_DID_INTEL_RPL_S_ID_2, 125, VR_CFG_ALL_DOMAINS_ICC(280, 30) }, RPL-S 8+16 and 8+8 have 307A ICCmax for IA domain. https://review.coreboot.org/c/coreboot/+/69798/comment/9dedb1ad_ec5c7c12 PS3, Line 176: { PCI_DID_INTEL_RPL_S_ID_3, 125, VR_CFG_ALL_DOMAINS_ICC(280, 30) }, RPL-S 6+8 has 200A ICCmax for IA domain https://review.coreboot.org/c/coreboot/+/69798/comment/523dc5fa_b888cd9e PS3, Line 177: { PCI_DID_INTEL_RPL_S_ID_4, 125, VR_CFG_ALL_DOMAINS_ICC(280, 30) }, Not sure what is this ID and what ICCmax values it should have. https://review.coreboot.org/c/coreboot/+/69798/comment/a142ac83_7a7826bc PS3, Line 256: { PCI_DID_INTEL_RPL_S_ID_1, 125, VR_CFG_ALL_DOMAINS_TDC_CURRENT(132, 132) }, : { PCI_DID_INTEL_RPL_S_ID_2, 125, VR_CFG_ALL_DOMAINS_TDC_CURRENT(132, 132) }, : { PCI_DID_INTEL_RPL_S_ID_3, 125, VR_CFG_ALL_DOMAINS_TDC_CURRENT(132, 132) }, : { PCI_DID_INTEL_RPL_S_ID_4, 125, VR_CFG_ALL_DOMAINS_TDC_CURRENT(132, 132) }, No info in public datasheets about those values. Any references? Also nto all RSP-S IDs in this table have to have TPD 125W, so some values would not be used at all. File src/soc/intel/common/block/cpu/mp_init.c: https://review.coreboot.org/c/coreboot/+/69798/comment/533357a2_26063880 PS3, Line 84: { X86_VENDOR_INTEL, CPUID_RAPTORLAKE_S_S0 }, { X86_VENDOR_INTEL, CPUID_RAPTORLAKE_S_B0 }, -- To view, visit https://review.coreboot.org/c/coreboot/+/69798 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I767dd08a169a6af59188d9ecd73520b916f69155 Gerrit-Change-Number: 69798 Gerrit-PatchSet: 3 Gerrit-Owner: Name of user not set #1004406 Gerrit-Reviewer: Michal Zygowski <miczyg94(a)gmail.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Name of user not set #1004406 Gerrit-Attention: Michal Zygowski <miczyg94(a)gmail.com> Gerrit-Comment-Date: Mon, 21 Nov 2022 14:19:27 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[L] Change in coreboot[master]: util/amdfwtool: Deal with psp position in flash offset directly
by build bot (Jenkins) (Code Review) 21 Nov '22

21 Nov '22

Attention is currently required from: Jason Glenesk, Raul Rangel, Jason Nien, Matt DeVillier, Martin Roth, Fred Reitberger, Felix Held. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69852 ) Change subject: util/amdfwtool: Deal with psp position in flash offset directly ...................................................................... Patch Set 3: (7 comments) Commit Message: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-164180): https://review.coreboot.org/c/coreboot/+/69852/comment/2966ec8b_a3ba71c0 PS3, Line 15: depending on stack stack usage. Possible repeated word: 'stack' File util/amdfwtool/amdfwtool.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-164180): https://review.coreboot.org/c/coreboot/+/69852/comment/3cacb8e4_5c44842c PS3, Line 2328: case 0xFA0000: /* Fall through */ Prefer 'fallthrough;' over fallthrough comment Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-164180): https://review.coreboot.org/c/coreboot/+/69852/comment/07153a28_67dce807 PS3, Line 2329: case 0xF20000: /* Fall through */ Prefer 'fallthrough;' over fallthrough comment Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-164180): https://review.coreboot.org/c/coreboot/+/69852/comment/1666c5d0_6ccb50fe PS3, Line 2330: case 0xE20000: /* Fall through */ Prefer 'fallthrough;' over fallthrough comment Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-164180): https://review.coreboot.org/c/coreboot/+/69852/comment/0a12620b_4c8de40c PS3, Line 2331: case 0xC20000: /* Fall through */ Prefer 'fallthrough;' over fallthrough comment Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-164180): https://review.coreboot.org/c/coreboot/+/69852/comment/b7a90d6f_d6d00853 PS3, Line 2332: case 0x820000: /* Fall through */ Prefer 'fallthrough;' over fallthrough comment Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-164180): https://review.coreboot.org/c/coreboot/+/69852/comment/1bc92671_0457b8e0 PS3, Line 2333: case 0x20000: /* Fall through */ Prefer 'fallthrough;' over fallthrough comment -- To view, visit https://review.coreboot.org/c/coreboot/+/69852 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I89c9e73e7db748379c97e3c0ad69af3faedc8d66 Gerrit-Change-Number: 69852 Gerrit-PatchSet: 3 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Mon, 21 Nov 2022 14:10:40 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[L] Change in coreboot[master]: util/amdfwtool: Deal with psp position in flash offset directly
by Arthur Heymans (Code Review) 21 Nov '22

21 Nov '22

Attention is currently required from: Jason Glenesk, Raul Rangel, Jason Nien, Matt DeVillier, Martin Roth, Fred Reitberger, Felix Held. Hello Jason Glenesk, Raul Rangel, Jason Nien, Matt DeVillier, Martin Roth, Fred Reitberger, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/69852 to look at the new patch set (#3). Change subject: util/amdfwtool: Deal with psp position in flash offset directly ...................................................................... util/amdfwtool: Deal with psp position in flash offset directly Using a memory mapped offset is simply wrong to specify the PSP base as it depends on the flash size. Setting the flash offset directly in Kconfig allows to remove a lot of unnecessary aritmetics in both amdfwtool and Makefile. It also gets rid of the weird index semantics. This does not result in identical files as amdfwutil images differ depending on stack stack usage. TESTED: google/vilboz still boots. Change-Id: I89c9e73e7db748379c97e3c0ad69af3faedc8d66 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/mainboard/amd/birman/Kconfig M src/mainboard/amd/chausie/Kconfig M src/mainboard/amd/majolica/Kconfig M src/mainboard/amd/mandolin/Kconfig M src/mainboard/google/guybrush/Kconfig M src/mainboard/google/kahlee/Kconfig M src/mainboard/google/skyrim/Kconfig M src/mainboard/google/zork/Kconfig M src/soc/amd/cezanne/Kconfig M src/soc/amd/cezanne/Makefile.inc M src/soc/amd/common/Makefile.inc M src/soc/amd/common/block/include/amdblocks/psp_efs.h M src/soc/amd/common/block/psp/Kconfig M src/soc/amd/glinda/Kconfig M src/soc/amd/glinda/Makefile.inc M src/soc/amd/mendocino/Kconfig M src/soc/amd/mendocino/Makefile.inc M src/soc/amd/morgana/Kconfig M src/soc/amd/morgana/Makefile.inc M src/soc/amd/picasso/Kconfig M src/soc/amd/picasso/Makefile.inc M src/soc/amd/stoneyridge/Kconfig M src/soc/amd/stoneyridge/Makefile.inc M src/soc/amd/stoneyridge/fch.c M util/amdfwtool/amdfwtool.c 25 files changed, 109 insertions(+), 324 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/69852/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/69852 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I89c9e73e7db748379c97e3c0ad69af3faedc8d66 Gerrit-Change-Number: 69852 Gerrit-PatchSet: 3 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: include/memlayout.h: update comment about VBOOT2 work buffer size
by Felix Held (Code Review) 21 Nov '22

21 Nov '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/69797 ) Change subject: include/memlayout.h: update comment about VBOOT2 work buffer size ...................................................................... include/memlayout.h: update comment about VBOOT2 work buffer size VB2_FIRMWARE_WORKBUF_RECOMMENDED_SIZE is nowadays defined in vboot/firmware/2lib/include/2constants.h, so update the comment. Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: Ia7c9a5476ae06d4bac762da1729aff878b7d0965 Reviewed-on: https://review.coreboot.org/c/coreboot/+/69797 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Elyes Haouas <ehaouas(a)noos.fr> --- M src/include/memlayout.h 1 file changed, 17 insertions(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Elyes Haouas: Looks good to me, approved diff --git a/src/include/memlayout.h b/src/include/memlayout.h index 1e9fca8..7b6cfb6 100644 --- a/src/include/memlayout.h +++ b/src/include/memlayout.h @@ -161,7 +161,7 @@ #endif /* VBOOT2_WORK must always use VB2_FIRMWARE_WORKBUF_RECOMMENDED_SIZE for its - * size argument. The constant is imported via vb2_workbuf_size.h. */ + * size argument. The constant is imported via 2constants.h. */ #define VBOOT2_WORK(addr, sz) \ REGION(vboot2_work, addr, sz, 16) \ _ = ASSERT(sz == VB2_FIRMWARE_WORKBUF_RECOMMENDED_SIZE, \ -- To view, visit https://review.coreboot.org/c/coreboot/+/69797 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia7c9a5476ae06d4bac762da1729aff878b7d0965 Gerrit-Change-Number: 69797 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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