coreboot-gerrit November 2022

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[M] Change in coreboot[master]: mb/intel/mtlrvp: Add MTL-P RVP board ids
by build bot (Jenkins) (Code Review) 25 Nov '22

25 Nov '22

Attention is currently required from: Tarun Tuli, Jamie Ryu, Wonkyu Kim, Ravishankar Sarawadi, Kapil Porwal, Angel Pons, Nick Vaccaro, Tim Wawrzynczak, Raj Astekar. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/66102 ) Change subject: mb/intel/mtlrvp: Add MTL-P RVP board ids ...................................................................... Patch Set 5: (4 comments) File src/mainboard/intel/mtlrvp/board_id.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-164519): https://review.coreboot.org/c/coreboot/+/66102/comment/04efd8d6_f063f536 PS5, Line 28: printk(BIOS_INFO, "id from Chrome EC 0x%x\n",(unsigned int)id); space required after that ',' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-164519): https://review.coreboot.org/c/coreboot/+/66102/comment/b19a11cf_e4e47e31 PS5, Line 36: if ((id == 0)||(id == BOARD_ID_UNKNOWN)) { spaces required around that '||' (ctx:VxV) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-164519): https://review.coreboot.org/c/coreboot/+/66102/comment/93c8a691_c4186c30 PS5, Line 37: for(int i = 0; i < 100; i++) space required before the open parenthesis '(' Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-164519): https://review.coreboot.org/c/coreboot/+/66102/comment/fbc77878_f9c9cf26 PS5, Line 38: printk(BIOS_ERR, "Invalid board_id(0x%d). Please check" Prefixing 0x with decimal output is defective -- To view, visit https://review.coreboot.org/c/coreboot/+/66102 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I90b0543d5db208f696d2c2c2dc3d2581514a845b Gerrit-Change-Number: 66102 Gerrit-PatchSet: 5 Gerrit-Owner: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Attention: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Comment-Date: Fri, 25 Nov 2022 10:28:35 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[master]: mb/intel/mtlrvp: Add MTL-P RVP board ids
by Harsha B R (Code Review) 25 Nov '22

25 Nov '22

Attention is currently required from: Tarun Tuli, Jamie Ryu, Wonkyu Kim, Ravishankar Sarawadi, Kapil Porwal, Angel Pons, Nick Vaccaro, Tim Wawrzynczak, Raj Astekar. Harsha B R has uploaded a new patch set (#5) to the change originally created by Jamie Ryu. ( https://review.coreboot.org/c/coreboot/+/66102 ) Change subject: mb/intel/mtlrvp: Add MTL-P RVP board ids ...................................................................... mb/intel/mtlrvp: Add MTL-P RVP board ids This adds MTL-P board id definition. Change include, 1. Add new board_id.c 2. Add new board_id.h 3. Add board_id config in variants.h 4. Makefile changes BUG=b:224325352 TEST=FW_NAME=mtlrvp_p emerge-rex coreboot chromeos-bootimage Signed-off-by: Jamie Ryu <jamie.m.ryu(a)intel.com> Change-Id: I90b0543d5db208f696d2c2c2dc3d2581514a845b --- M src/mainboard/intel/mtlrvp/Kconfig M src/mainboard/intel/mtlrvp/Makefile.inc A src/mainboard/intel/mtlrvp/board_id.c A src/mainboard/intel/mtlrvp/board_id.h A src/mainboard/intel/mtlrvp/variants/baseboard/include/baseboard/variants.h 5 files changed, 118 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/66102/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/66102 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I90b0543d5db208f696d2c2c2dc3d2581514a845b Gerrit-Change-Number: 66102 Gerrit-PatchSet: 5 Gerrit-Owner: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)google.com> Gerrit-Attention: Raj Astekar <raj.astekar(a)intel.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: mb/intel/mtlrvp: Create baseboard structure for mtlrvp
by Ronak Kanabar (Code Review) 25 Nov '22

25 Nov '22

Attention is currently required from: Harsha B R, Sridhar Siricilla, Krishna P Bhat D, Usha P. Ronak Kanabar has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69971 ) Change subject: mb/intel/mtlrvp: Create baseboard structure for mtlrvp ...................................................................... Patch Set 6: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/69971 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I82acb6879fecb242014258f2c358804d5abbbd48 Gerrit-Change-Number: 69971 Gerrit-PatchSet: 6 Gerrit-Owner: Harsha B R <harsha.b.r(a)intel.com> Gerrit-Reviewer: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Usha P <usha.p(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-CC: Haribalaraman Ramasubramanian <haribalaraman.r(a)intel.com> Gerrit-Attention: Harsha B R <harsha.b.r(a)intel.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Attention: Usha P <usha.p(a)intel.com> Gerrit-Comment-Date: Fri, 25 Nov 2022 10:10:25 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[L] Change in coreboot[master]: profiler: Add basic profiler with cbmem support
by Paul Menzel (Code Review) 25 Nov '22

25 Nov '22

Attention is currently required from: Tarun Tuli, Martin L Roth, Jakub Czapiga, Tim Wawrzynczak, Reka Norman. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/65606 ) Change subject: profiler: Add basic profiler with cbmem support ...................................................................... Patch Set 10: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/65606/comment/6af07727_75e6fea9 PS10, Line 14: 4. `flamegraph.pl collapsed.txt > graph.svg` Too much indentation. -- To view, visit https://review.coreboot.org/c/coreboot/+/65606 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5665922b1109ee9305274294c93de577f1bf9ae2 Gerrit-Change-Number: 65606 Gerrit-PatchSet: 10 Gerrit-Owner: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Alex Levin <levinale(a)google.com> Gerrit-CC: Jan Dabros <jsd(a)semihalf.com> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Subrata Banik <subratabanik(a)google.com> Gerrit-CC: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Reka Norman <rekanorman(a)chromium.org> Gerrit-Comment-Date: Fri, 25 Nov 2022 10:05:25 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/siemens/mc_ehl2: Disable GSPI2 controller
by Paul Menzel (Code Review) 25 Nov '22

25 Nov '22

Attention is currently required from: Mario Scheithauer. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69972 ) Change subject: mb/siemens/mc_ehl2: Disable GSPI2 controller ...................................................................... Patch Set 2: (1 comment) File src/mainboard/siemens/mc_ehl/variants/mc_ehl2/devicetree.cb: https://review.coreboot.org/c/coreboot/+/69972/comment/081d490b_6c270ff1 PS2, Line 145: device pci 12.0 on end # GSPI2 Why is setting it to `off` not enough, so it’s clear it could theoretically be enabled? -- To view, visit https://review.coreboot.org/c/coreboot/+/69972 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6e7462312953d50385ca7bb2f2e0abb8fc3a5886 Gerrit-Change-Number: 69972 Gerrit-PatchSet: 2 Gerrit-Owner: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Comment-Date: Fri, 25 Nov 2022 10:03:33 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[L] Change in coreboot[master]: profiler: Add basic profiler with cbmem support
by Jan Dabros (Code Review) 25 Nov '22

25 Nov '22

Attention is currently required from: Tarun Tuli, Martin L Roth, Jakub Czapiga, Tim Wawrzynczak, Reka Norman. Jan Dabros has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/65606 ) Change subject: profiler: Add basic profiler with cbmem support ...................................................................... Patch Set 10: (15 comments) File Makefile.inc: https://review.coreboot.org/c/coreboot/+/65606/comment/6f97e96e_ece6ad24 PS10, Line 515: CFLAGS_common += -Os For CONFIG_PROFILER-enabled build we will get both -Os & -Og. Are we OK with this? File src/arch/arm64/armv8/exception.c: https://review.coreboot.org/c/coreboot/+/65606/comment/eb58b671_87474337 PS10, Line 160: profiler_handle_exit_scope(); `profiler_handle_exit/entry_scope` pair functionality is not clear at first glance (although you did a great job with comments in `/src/commonlib/bsd/include/commonlib/bsd/profiler.h`. What about some more descriptive naming, e.g. `non-profiled-section_entry()` and `non-profiled-section-exit()`? File src/arch/arm64/transition.c: https://review.coreboot.org/c/coreboot/+/65606/comment/b25d4e14_f96f45ed PS10, Line 22: profiler_handle_entry_scope(); Why we cannot profile exception handlers? Add a comment in commit msg. File src/commonlib/bsd/include/commonlib/bsd/profiler.h: https://review.coreboot.org/c/coreboot/+/65606/comment/53ae9c85_e4818ef9 PS10, Line 8: uint32_t function_addr; /*< Address of function related to entry */ Don't we need 64bits for address? This will increase memory footprint, but wonder if there are cases where coreboot code is placed higher in memory map. https://review.coreboot.org/c/coreboot/+/65606/comment/8cc7a370_3ff4740f PS10, Line 16: uint32_t entries_num; Should we introduce "version" field in case of some format changes in the future? In this case footprint is small, but we can avoid some problems. Actually with version field being there, we may keep `function_addr` as 32bit for now and modify (and bump version) if needed. https://review.coreboot.org/c/coreboot/+/65606/comment/c4c2c45c_82848e12 PS10, Line 34: __attribute__((no_instrument_function)) void profiler_handle_entry_scope(void); I wrote a comment about naming above. File src/lib/profiler.c: https://review.coreboot.org/c/coreboot/+/65606/comment/895b775a_bce62a98 PS10, Line 26: = {0}; Not necessary. https://review.coreboot.org/c/coreboot/+/65606/comment/e99a8323_056b8151 PS10, Line 37: printk, vprintk, vtxprintf, die, do_putchar Can't we use `-finstrument-functions-exclude-function-list` to handle these at compilation level? If I got the logic correct, we just don't want to profile functions from `exclude_scope[]`, right? https://review.coreboot.org/c/coreboot/+/65606/comment/e46df929_af47e094 PS10, Line 37: profiler_mock_exclude_symbol See my comment about using `profiler_enabled` below. If this is the case, we can completely get rid of `exclude_scope[]` table. https://review.coreboot.org/c/coreboot/+/65606/comment/501bda80_95cb96c0 PS10, Line 37: profiler_mock_exclude_symbol Even if `profiler_enabled` cannot be used, we should rewrite the algorithm to simply check for value of `profiler_mock_exclude_symbol`. https://review.coreboot.org/c/coreboot/+/65606/comment/5ec5c93e_a6ff550e PS10, Line 59: const uint32_t fn_addr = (uint32_t)(this_fn - (void *)_text); : : struct profiler_entry *const current = : &profiler_header->entries[profiler_header->entries_num] Put variables definition at the top of function. https://review.coreboot.org/c/coreboot/+/65606/comment/6907926b_50d22123 PS10, Line 86: profiler_mock_exclude_symbol Can't we just use `profiler_enabled` variable? https://review.coreboot.org/c/coreboot/+/65606/comment/ec8174d8_dad58c85 PS10, Line 101: return !initial_lapicid(); I propose to add is_main_cpu() in per-arch C files. This way, we can get rid of #ifdefs. https://review.coreboot.org/c/coreboot/+/65606/comment/3b264e6d_61001cf3 PS10, Line 114: atomic_read(&profiler_enabled) Let's split this if and first check for `if(atomic_read..)` and get out immediately if profiler is disabled. https://review.coreboot.org/c/coreboot/+/65606/comment/61d523c0_b94d48bf PS10, Line 115: handle_scope(this_fn, 1); I have many comments requiring your answer, so probably it will be easier for me to add this suggestion in v2/after your reply - but if we can simplify algorithm, we may get rid of `handle_scope()` completely and just check if `this_fn` is within text secion here. -- To view, visit https://review.coreboot.org/c/coreboot/+/65606 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5665922b1109ee9305274294c93de577f1bf9ae2 Gerrit-Change-Number: 65606 Gerrit-PatchSet: 10 Gerrit-Owner: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Reka Norman <rekanorman(a)chromium.org> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Alex Levin <levinale(a)google.com> Gerrit-CC: Jan Dabros <jsd(a)semihalf.com> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Subrata Banik <subratabanik(a)google.com> Gerrit-CC: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Tarun Tuli <taruntuli(a)google.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Reka Norman <rekanorman(a)chromium.org> Gerrit-Comment-Date: Fri, 25 Nov 2022 10:00:25 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: crossgcc: Upgrade IASL from 20220331 to 20221020
by Felix Singer (Code Review) 25 Nov '22

25 Nov '22

Felix Singer has submitted this change. ( https://review.coreboot.org/c/coreboot/+/68929 ) Change subject: crossgcc: Upgrade IASL from 20220331 to 20221020 ...................................................................... crossgcc: Upgrade IASL from 20220331 to 20221020 Changes: https://acpica.org/node/201 Change-Id: I386a6757a318336bc616091afe0c4ed88cd89583 Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/68929 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Felix Singer <felixsinger(a)posteo.net> --- M util/crossgcc/buildgcc R util/crossgcc/patches/acpica-unix2-20221020_iasl.patch D util/crossgcc/sum/acpica-unix2-20220331.tar.gz.cksum A util/crossgcc/sum/acpica-unix2-20221020.tar.gz.cksum 4 files changed, 17 insertions(+), 2 deletions(-) Approvals: build bot (Jenkins): Verified Felix Singer: Looks good to me, approved diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc index faf6c18..0d349f2 100755 --- a/util/crossgcc/buildgcc +++ b/util/crossgcc/buildgcc @@ -37,7 +37,7 @@ MPC_VERSION=1.2.1 GCC_VERSION=11.2.0 BINUTILS_VERSION=2.37 -IASL_VERSION=20220331 +IASL_VERSION=20221020 # CLANG version number CLANG_VERSION=15.0.0 CMAKE_VERSION=3.24.2 diff --git a/util/crossgcc/patches/acpica-unix2-20220331_iasl.patch b/util/crossgcc/patches/acpica-unix2-20221020_iasl.patch similarity index 100% rename from util/crossgcc/patches/acpica-unix2-20220331_iasl.patch rename to util/crossgcc/patches/acpica-unix2-20221020_iasl.patch diff --git a/util/crossgcc/sum/acpica-unix2-20220331.tar.gz.cksum b/util/crossgcc/sum/acpica-unix2-20220331.tar.gz.cksum deleted file mode 100644 index 7ad2b68..0000000 --- a/util/crossgcc/sum/acpica-unix2-20220331.tar.gz.cksum +++ /dev/null @@ -1 +0,0 @@ -bf8a86addc7fbfa819f1ed2897a0890c42cdcf62 tarballs/acpica-unix2-20220331.tar.gz diff --git a/util/crossgcc/sum/acpica-unix2-20221020.tar.gz.cksum b/util/crossgcc/sum/acpica-unix2-20221020.tar.gz.cksum new file mode 100644 index 0000000..1b2b580 --- /dev/null +++ b/util/crossgcc/sum/acpica-unix2-20221020.tar.gz.cksum @@ -0,0 +1 @@ +bb175ba614e68d43a7a863335e83d3f832d3b41c tarballs/acpica-unix2-20221020.tar.gz -- To view, visit https://review.coreboot.org/c/coreboot/+/68929 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I386a6757a318336bc616091afe0c4ed88cd89583 Gerrit-Change-Number: 68929 Gerrit-PatchSet: 12 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: util/cbmem: Provide a way to override coreboot path
by Werner Zeh (Code Review) 25 Nov '22

25 Nov '22

Attention is currently required from: Martin L Roth, Patrick Georgi, Arthur Heymans. Werner Zeh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69686 ) Change subject: util/cbmem: Provide a way to override coreboot path ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: > Maybe also look inside the tool directory for a commonlib directory so that it could just be packaged together for a single build? Do you mean we should have a look in adding a 'commonlib' directory into cbmem and copy relevant files into it to enable a stand-alone build completely without the coreboot tree reference? -- To view, visit https://review.coreboot.org/c/coreboot/+/69686 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2732f75310e10716e5aa74e094e0bf628ad22f0b Gerrit-Change-Number: 69686 Gerrit-PatchSet: 1 Gerrit-Owner: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Fri, 25 Nov 2022 09:52:09 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Martin L Roth <gaumless(a)gmail.com> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: crossgcc: Upgrade IASL from 20220331 to 20221020
by Felix Singer (Code Review) 25 Nov '22

25 Nov '22

Attention is currently required from: Martin L Roth, Paul Menzel, Arthur Heymans, Elyes Haouas, Felix Held. Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68929 ) Change subject: crossgcc: Upgrade IASL from 20220331 to 20221020 ...................................................................... Patch Set 11: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/68929 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I386a6757a318336bc616091afe0c4ed88cd89583 Gerrit-Change-Number: 68929 Gerrit-PatchSet: 11 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 25 Nov 2022 09:51:46 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: crossgcc: Upgrade IASL from 20220331 to 20221020
by Elyes Haouas (Code Review) 25 Nov '22

25 Nov '22

Attention is currently required from: Felix Singer, Martin L Roth, Paul Menzel, Arthur Heymans, Felix Held. Elyes Haouas has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68929 ) Change subject: crossgcc: Upgrade IASL from 20220331 to 20221020 ...................................................................... Patch Set 11: (1 comment) Patchset: PS11: > Did they fix this regression https://github. […] Yes. This version fix it -- To view, visit https://review.coreboot.org/c/coreboot/+/68929 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I386a6757a318336bc616091afe0c4ed88cd89583 Gerrit-Change-Number: 68929 Gerrit-PatchSet: 11 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 25 Nov 2022 09:51:18 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Singer <felixsinger(a)posteo.net> Gerrit-MessageType: comment

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coreboot-gerrit November 2022