coreboot-gerrit November 2022

coreboot-gerrit@coreboot.org

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[S] Change in coreboot[master]: nb/intel/sandybridge: Hook up CPU bus and PCI domain ops to devicetree
by Kyösti Mälkki (Code Review) 25 Nov '22

25 Nov '22

Attention is currently required from: Angel Pons, Arthur Heymans, Alexander Couzens, Evgeny Zinoviev. Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69291 ) Change subject: nb/intel/sandybridge: Hook up CPU bus and PCI domain ops to devicetree ...................................................................... Patch Set 11: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/69291 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I718d9dbc184c8bca38f452efea3202901018cb04 Gerrit-Change-Number: 69291 Gerrit-PatchSet: 11 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Evgeny Zinoviev <me(a)ch1p.io> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Attention: Evgeny Zinoviev <me(a)ch1p.io> Gerrit-Comment-Date: Fri, 25 Nov 2022 13:33:40 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/intel/mtlrvp: Create baseboard structure for mtlrvp
by Harsha B R (Code Review) 25 Nov '22

25 Nov '22

Attention is currently required from: Sridhar Siricilla, Krishna P Bhat D, Usha P. Harsha B R has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69971 ) Change subject: mb/intel/mtlrvp: Create baseboard structure for mtlrvp ...................................................................... Patch Set 6: Code-Review-1 (1 comment) Patchset: PS6: Holding this patch until we have EC and ChromeOS dependency gets merged -- To view, visit https://review.coreboot.org/c/coreboot/+/69971 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I82acb6879fecb242014258f2c358804d5abbbd48 Gerrit-Change-Number: 69971 Gerrit-PatchSet: 6 Gerrit-Owner: Harsha B R <harsha.b.r(a)intel.com> Gerrit-Reviewer: Harsha B R <harsha.b.r(a)intel.com> Gerrit-Reviewer: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Usha P <usha.p(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-CC: Haribalaraman Ramasubramanian <haribalaraman.r(a)intel.com> Gerrit-Attention: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Attention: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-Attention: Usha P <usha.p(a)intel.com> Gerrit-Comment-Date: Fri, 25 Nov 2022 13:33:16 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[L] Change in coreboot[master]: nb/intel/sandybridge: Add a chipset devicetree
by Kyösti Mälkki (Code Review) 25 Nov '22

25 Nov '22

Attention is currently required from: Arthur Heymans, Martin L Roth, Angel Pons, Evgeny Zinoviev, Alexander Couzens, Patrick Rudolph. Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56912 ) Change subject: nb/intel/sandybridge: Add a chipset devicetree ...................................................................... Patch Set 4: (2 comments) File src/mainboard/dell/snb_ivb_workstations/variants/baseboard/devicetree.cb: https://review.coreboot.org/c/coreboot/+/56912/comment/f7ca45b2_ed0ef790 PS4, Line 7: register "tcc_offset" = "5" # TCC of 95C Where did this go? File src/mainboard/google/stout/devicetree.cb: https://review.coreboot.org/c/coreboot/+/56912/comment/bec3e121_725b46d8 PS4, Line 28: register "tcc_offset" = "5" # TCC of 95C ? -- To view, visit https://review.coreboot.org/c/coreboot/+/56912 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9c5b6f25b779e28b6719cf70455ff0f1a916ad87 Gerrit-Change-Number: 56912 Gerrit-PatchSet: 4 Gerrit-Owner: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Evgeny Zinoviev <me(a)ch1p.io> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Evgeny Zinoviev <me(a)ch1p.io> Gerrit-Attention: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Fri, 25 Nov 2022 13:31:15 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[master]: cpu/intel/model_2065x: Don't use a magic APIC
by Kyösti Mälkki (Code Review) 25 Nov '22

25 Nov '22

Attention is currently required from: Arthur Heymans, Stefan Ott, Martin L Roth, Angel Pons, Alexander Couzens, Patrick Rudolph. Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59315 ) Change subject: cpu/intel/model_2065x: Don't use a magic APIC ...................................................................... Patch Set 14: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/59315 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I296631511b0e31b0ed43ca8193552483bdab4482 Gerrit-Change-Number: 59315 Gerrit-PatchSet: 14 Gerrit-Owner: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Stefan Ott <coreboot(a)desire.ch> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Stefan Ott <coreboot(a)desire.ch> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Fri, 25 Nov 2022 13:26:14 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[master]: cpu/intel/haswell: Move chip_ops to cpu cluster
by Kyösti Mälkki (Code Review) 25 Nov '22

25 Nov '22

Attention is currently required from: Arthur Heymans, Raul Rangel, Martin L Roth, Tristan Corrick, Tim Wawrzynczak, Alexander Couzens, Patrick Rudolph. Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59314 ) Change subject: cpu/intel/haswell: Move chip_ops to cpu cluster ...................................................................... Patch Set 15: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/59314 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic449b2df8036e8c02b5559cca6b2e7479a70a786 Gerrit-Change-Number: 59314 Gerrit-PatchSet: 15 Gerrit-Owner: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Jonathon Hall <jonathon.hall(a)puri.sm> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: Tristan Corrick <tristan(a)corrick.kiwi> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Tristan Corrick <tristan(a)corrick.kiwi> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Fri, 25 Nov 2022 13:25:17 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[XL] Change in coreboot[master]: payloads/cbflashrom: Add new payload CBFlashrom
by Iman Bingi (Code Review) 25 Nov '22

25 Nov '22

Attention is currently required from: Iman Bingi. Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/69328 to look at the new patch set (#14). Change subject: payloads/cbflashrom: Add new payload CBFlashrom ...................................................................... payloads/cbflashrom: Add new payload CBFlashrom Flashrom with Graphical User Interface. Depends on libpayload and nuklear. Features: * Graphical menus with scrolling. * Text rendering engine (atm only bitmap font) * Support for keyboard and mouse * Support for USB and PS/2 devices * Support for FAT32 file system (USB drives) * Works as ELF payload * Works as Seabios secondary payload * Runs in qemu and on real hardware Shortcomings: * Doesn't work in VGA text mode * Untested TODO: * Test on as many hardware/platforms as possible Change-Id: Ib523ae9eb002f14749942137e53add4986098314 Signed-off-by: Ben Adu-Boahen <imanbingy(a)gmail.com> --- M payloads/Kconfig A payloads/cbflashrom/.gitignore A payloads/cbflashrom/.lp.config A payloads/cbflashrom/Kconfig A payloads/cbflashrom/Makefile A payloads/cbflashrom/NuklearUI/NuklearCBFlashrom.c A payloads/cbflashrom/NuklearUI/NuklearCBFlashrom.h A payloads/cbflashrom/NuklearUI/NuklearCheckbox.c A payloads/cbflashrom/NuklearUI/NuklearCheckbox.h A payloads/cbflashrom/NuklearUI/NuklearCommon.h A payloads/cbflashrom/NuklearUI/NuklearDataGrid.c A payloads/cbflashrom/NuklearUI/NuklearDataGrid.h A payloads/cbflashrom/NuklearUI/NuklearFieldFile.c A payloads/cbflashrom/NuklearUI/NuklearFieldFile.h A payloads/cbflashrom/NuklearUI/NuklearFieldHex.c A payloads/cbflashrom/NuklearUI/NuklearFieldHex.h A payloads/cbflashrom/NuklearUI/NuklearFileChooser.c A payloads/cbflashrom/NuklearUI/NuklearFileChooser.h A payloads/cbflashrom/NuklearUI/NuklearHex.c A payloads/cbflashrom/NuklearUI/NuklearHex.h A payloads/cbflashrom/NuklearUI/NuklearInput.c A payloads/cbflashrom/NuklearUI/NuklearInput.h A payloads/cbflashrom/NuklearUI/NuklearObject.c A payloads/cbflashrom/NuklearUI/NuklearObject.h A payloads/cbflashrom/NuklearUI/NuklearStyle.c A payloads/cbflashrom/NuklearUI/NuklearStyle.h A payloads/cbflashrom/NuklearUI/NuklearUI.h A payloads/cbflashrom/arch/x86/cpuid.c A payloads/cbflashrom/arch/x86/cpuid.h A payloads/cbflashrom/arch/x86/memcpy.c A payloads/cbflashrom/arch/x86/memcpy.h A payloads/cbflashrom/cbflashrom.c A payloads/cbflashrom/cbflashrom.h A payloads/cbflashrom/flashrom/82802ab.c A payloads/cbflashrom/flashrom/COPYING A payloads/cbflashrom/flashrom/Doxyfile A payloads/cbflashrom/flashrom/MAINTAINERS A payloads/cbflashrom/flashrom/Makefile A payloads/cbflashrom/flashrom/Makefile.include A payloads/cbflashrom/flashrom/README A payloads/cbflashrom/flashrom/amd_imc.c A payloads/cbflashrom/flashrom/at45db.c A payloads/cbflashrom/flashrom/atahpt.c A payloads/cbflashrom/flashrom/atavia.c A payloads/cbflashrom/flashrom/bitbang_spi.c A payloads/cbflashrom/flashrom/board_enable.c A payloads/cbflashrom/flashrom/buspirate_spi.c A payloads/cbflashrom/flashrom/cbtable.c A payloads/cbflashrom/flashrom/ch341a_spi.c A payloads/cbflashrom/flashrom/chipset_enable.c A payloads/cbflashrom/flashrom/cli_common.c A payloads/cbflashrom/flashrom/cli_output.c A payloads/cbflashrom/flashrom/custom_baud.c A payloads/cbflashrom/flashrom/dediprog.c A payloads/cbflashrom/flashrom/developerbox_spi.c A payloads/cbflashrom/flashrom/digilent_spi.c A payloads/cbflashrom/flashrom/dirtyjtag_spi.c A payloads/cbflashrom/flashrom/dmi.c A payloads/cbflashrom/flashrom/drkaiser.c A payloads/cbflashrom/flashrom/edi.c A payloads/cbflashrom/flashrom/en29lv640b.c A payloads/cbflashrom/flashrom/flashchips.c A payloads/cbflashrom/flashrom/flashrom.8.tmpl A payloads/cbflashrom/flashrom/flashrom.c A payloads/cbflashrom/flashrom/fmap.c A payloads/cbflashrom/flashrom/ft2232_spi.c A payloads/cbflashrom/flashrom/gfxnvidia.c A payloads/cbflashrom/flashrom/helpers.c A payloads/cbflashrom/flashrom/helpers_fileio.c A payloads/cbflashrom/flashrom/hwaccess_physmap.c A payloads/cbflashrom/flashrom/hwaccess_x86_io.c A payloads/cbflashrom/flashrom/hwaccess_x86_msr.c A payloads/cbflashrom/flashrom/ich_descriptors.c A payloads/cbflashrom/flashrom/ichspi.c A payloads/cbflashrom/flashrom/include/chipdrivers.h A payloads/cbflashrom/flashrom/include/coreboot_tables.h A payloads/cbflashrom/flashrom/include/custom_baud.h A payloads/cbflashrom/flashrom/include/edi.h A payloads/cbflashrom/flashrom/include/ene.h A payloads/cbflashrom/flashrom/include/flash.h A payloads/cbflashrom/flashrom/include/flashchips.h A payloads/cbflashrom/flashrom/include/fmap.h A payloads/cbflashrom/flashrom/include/hwaccess_physmap.h A payloads/cbflashrom/flashrom/include/hwaccess_x86_io.h A payloads/cbflashrom/flashrom/include/hwaccess_x86_msr.h A payloads/cbflashrom/flashrom/include/i2c_helper.h A payloads/cbflashrom/flashrom/include/ich_descriptors.h A payloads/cbflashrom/flashrom/include/layout.h A payloads/cbflashrom/flashrom/include/libflashrom.h A payloads/cbflashrom/flashrom/include/platform.h A payloads/cbflashrom/flashrom/include/platform/pci.h A payloads/cbflashrom/flashrom/include/platform/swap.h A payloads/cbflashrom/flashrom/include/programmer.h A payloads/cbflashrom/flashrom/include/spi.h A payloads/cbflashrom/flashrom/include/usb_device.h A payloads/cbflashrom/flashrom/include/writeprotect.h A payloads/cbflashrom/flashrom/internal.c A payloads/cbflashrom/flashrom/internal.h A payloads/cbflashrom/flashrom/it8212.c A payloads/cbflashrom/flashrom/it87spi.c A payloads/cbflashrom/flashrom/jedec.c A payloads/cbflashrom/flashrom/jlink_spi.c A payloads/cbflashrom/flashrom/known_boards.c A payloads/cbflashrom/flashrom/layout.c A payloads/cbflashrom/flashrom/libflashrom.c A payloads/cbflashrom/flashrom/libflashrom.map A payloads/cbflashrom/flashrom/mcp6x_spi.c A payloads/cbflashrom/flashrom/meson.build A payloads/cbflashrom/flashrom/meson_options.txt A payloads/cbflashrom/flashrom/mstarddc_spi.c A payloads/cbflashrom/flashrom/nic3com.c A payloads/cbflashrom/flashrom/nicintel.c A payloads/cbflashrom/flashrom/nicintel_eeprom.c A payloads/cbflashrom/flashrom/nicintel_spi.c A payloads/cbflashrom/flashrom/nicnatsemi.c A payloads/cbflashrom/flashrom/nicrealtek.c A payloads/cbflashrom/flashrom/ogp_spi.c A payloads/cbflashrom/flashrom/opaque.c A payloads/cbflashrom/flashrom/parade_lspcon.c A payloads/cbflashrom/flashrom/parallel.c A payloads/cbflashrom/flashrom/pcidev.c A payloads/cbflashrom/flashrom/pickit2_spi.c A payloads/cbflashrom/flashrom/platform/endian_big.c A payloads/cbflashrom/flashrom/platform/endian_little.c A payloads/cbflashrom/flashrom/platform/memaccess.c A payloads/cbflashrom/flashrom/platform/meson.build A payloads/cbflashrom/flashrom/pony_spi.c A payloads/cbflashrom/flashrom/processor_enable.c A payloads/cbflashrom/flashrom/programmer.c A payloads/cbflashrom/flashrom/programmer_table.c A payloads/cbflashrom/flashrom/raiden_debug_spi.c A payloads/cbflashrom/flashrom/rayer_spi.c A payloads/cbflashrom/flashrom/realtek_mst_i2c_spi.c A payloads/cbflashrom/flashrom/s25f.c A payloads/cbflashrom/flashrom/satamv.c A payloads/cbflashrom/flashrom/satasii.c A payloads/cbflashrom/flashrom/sb600spi.c A payloads/cbflashrom/flashrom/serprog.c A payloads/cbflashrom/flashrom/sfdp.c A payloads/cbflashrom/flashrom/spi.c A payloads/cbflashrom/flashrom/spi25.c A payloads/cbflashrom/flashrom/spi25_statusreg.c A payloads/cbflashrom/flashrom/spi95.c A payloads/cbflashrom/flashrom/sst28sf040.c A payloads/cbflashrom/flashrom/sst49lfxxxc.c A payloads/cbflashrom/flashrom/sst_fwhub.c A payloads/cbflashrom/flashrom/stlinkv3_spi.c A payloads/cbflashrom/flashrom/stm50.c A payloads/cbflashrom/flashrom/test_build.sh A payloads/cbflashrom/flashrom/udelay.c A payloads/cbflashrom/flashrom/usb_device.c A payloads/cbflashrom/flashrom/usbblaster_spi.c A payloads/cbflashrom/flashrom/usbdev.c A payloads/cbflashrom/flashrom/w29ee011.c A payloads/cbflashrom/flashrom/w39.c A payloads/cbflashrom/flashrom/wbsio_spi.c A payloads/cbflashrom/flashrom/writeprotect.c A payloads/cbflashrom/flashrom/writeprotect_ranges.c A payloads/cbflashrom/fsys/usbstorage.c A payloads/cbflashrom/fsys/usbstorage.h A payloads/cbflashrom/gfx/gfx.c A payloads/cbflashrom/gfx/gfx.h A payloads/cbflashrom/gfx/splash.c A payloads/cbflashrom/gfx/splash.h A payloads/cbflashrom/lang/en.c A payloads/cbflashrom/lang/lang.c A payloads/cbflashrom/lang/lang.h A payloads/cbflashrom/libftdi/LICENSE A payloads/cbflashrom/libftdi/src/ftdi.c A payloads/cbflashrom/libftdi/src/ftdi.h A payloads/cbflashrom/libftdi/src/ftdi_i.h A payloads/cbflashrom/libftdi/src/ftdi_stream.c A payloads/cbflashrom/libjaylink/buffer.c A payloads/cbflashrom/libjaylink/core.c A payloads/cbflashrom/libjaylink/device.c A payloads/cbflashrom/libjaylink/discovery.c A payloads/cbflashrom/libjaylink/discovery_usb.c A payloads/cbflashrom/libjaylink/emucom.c A payloads/cbflashrom/libjaylink/error.c A payloads/cbflashrom/libjaylink/fileio.c A payloads/cbflashrom/libjaylink/jtag.c A payloads/cbflashrom/libjaylink/libjaylink-internal.h A payloads/cbflashrom/libjaylink/libjaylink.h A payloads/cbflashrom/libjaylink/list.c A payloads/cbflashrom/libjaylink/log.c A payloads/cbflashrom/libjaylink/strutil.c A payloads/cbflashrom/libjaylink/swd.c A payloads/cbflashrom/libjaylink/swo.c A payloads/cbflashrom/libjaylink/target.c A payloads/cbflashrom/libjaylink/transport.c A payloads/cbflashrom/libjaylink/transport_usb.c A payloads/cbflashrom/libjaylink/util.c A payloads/cbflashrom/libusb/libusb.c A payloads/cbflashrom/libusb/libusb.h A payloads/cbflashrom/logo/cbui.png A payloads/cbflashrom/lp.config A payloads/cbflashrom/util/buffers.c A payloads/cbflashrom/util/buffers.h A payloads/cbflashrom/util/vector.c A payloads/cbflashrom/util/vector.h 200 files changed, 92,048 insertions(+), 11 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/69328/14 -- To view, visit https://review.coreboot.org/c/coreboot/+/69328 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib523ae9eb002f14749942137e53add4986098314 Gerrit-Change-Number: 69328 Gerrit-PatchSet: 14 Gerrit-Owner: Iman Bingi <imanbingy(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Iman Bingi <imanbingy(a)gmail.com> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[master]: ACPI: Use common code for MADT LAPIC NMIs
by Kyösti Mälkki (Code Review) 25 Nov '22

25 Nov '22

Attention is currently required from: Lance Zhao, Jason Glenesk, Raul Rangel, Matt DeVillier, Tim Wawrzynczak, Fred Reitberger. Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/69527 ) Change subject: ACPI: Use common code for MADT LAPIC NMIs ...................................................................... Patch Set 5: (1 comment) File src/include/acpi/acpi.h: https://review.coreboot.org/c/coreboot/+/69527/comment/c5b2f7c4_fe17293b PS3, Line 628: #define ACPI_MADT_LX2APIC_NMI_ALL_PROCESSORS (-1UL) > https://qa.coreboot. […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/69527 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iaf714d8c2aabd16c59c3bcebc4a207406fc85ca9 Gerrit-Change-Number: 69527 Gerrit-PatchSet: 5 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Lance Zhao Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Comment-Date: Fri, 25 Nov 2022 12:47:29 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: comment

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[M] Change in coreboot[master]: [WIP]cpu/mp_init: Detect the number of CPUs are runtime
by build bot (Jenkins) (Code Review) 25 Nov '22

25 Nov '22

Attention is currently required from: Arthur Heymans, Kyösti Mälkki. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68893 ) Change subject: [WIP]cpu/mp_init: Detect the number of CPUs are runtime ...................................................................... Patch Set 18: (2 comments) Commit Message: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-164533): https://review.coreboot.org/c/coreboot/+/68893/comment/3cc40bac_b90a5b08 PS18, Line 8: Possible repeated word: 'are' File src/cpu/x86/mp_init.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-164533): https://review.coreboot.org/c/coreboot/+/68893/comment/e915fcc4_6a5fe496 PS18, Line 499: if (!cpu->enabled) { braces {} are not necessary for any arm of this statement -- To view, visit https://review.coreboot.org/c/coreboot/+/68893 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iafe9d3d4838dad46cd0c7b6d30b905cbd258f17f Gerrit-Change-Number: 68893 Gerrit-PatchSet: 18 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Comment-Date: Fri, 25 Nov 2022 12:40:14 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: cpu/x86/mp_init.c: Improve AP entry point
by Arthur Heymans (Code Review) 25 Nov '22

25 Nov '22

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/70011 ) Change subject: cpu/x86/mp_init.c: Improve AP entry point ...................................................................... cpu/x86/mp_init.c: Improve AP entry point Make sure that a pointer exists before dereferencing it. Change-Id: I1a9833bb9686451224249efe599346f64dc37874 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/cpu/x86/mp_init.c 1 file changed, 22 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/11/70011/1 diff --git a/src/cpu/x86/mp_init.c b/src/cpu/x86/mp_init.c index 758550c..5c89ff3 100644 --- a/src/cpu/x86/mp_init.c +++ b/src/cpu/x86/mp_init.c @@ -182,9 +182,16 @@ enable_lapic(); setup_lapic_interrupts(); - struct device *dev = g_cpu_bus->children; - for (unsigned int i = index; i > 0; i--) - dev = dev->sibling; + struct device *dev; + int i = 0; + for (dev = g_cpu_bus->children; dev; dev = dev->sibling) + if (i++ == index) + break; + + if (!dev) { + printk(BIOS_ERR, "Could not find allocated device for index %u\n", index); + return; + } set_cpu_info(index, dev); -- To view, visit https://review.coreboot.org/c/coreboot/+/70011 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1a9833bb9686451224249efe599346f64dc37874 Gerrit-Change-Number: 70011 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newchange

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[M] Change in coreboot[master]: cpu/x86/mp_init.c: Keep track of initial lapic ID inside device_path
by Arthur Heymans (Code Review) 25 Nov '22

25 Nov '22

Attention is currently required from: Arthur Heymans, Angel Pons, Kyösti Mälkki. Hello build bot (Jenkins), Angel Pons, Elyes Haouas, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/64342 to look at the new patch set (#18). Change subject: cpu/x86/mp_init.c: Keep track of initial lapic ID inside device_path ...................................................................... cpu/x86/mp_init.c: Keep track of initial lapic ID inside device_path It's quite confusing to keep track of lapic ID inside the device struct and initial lapic ID inside an array. Change-Id: I4d9f8d23c0b0e5c142f6907593428d8509e4e7bb Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/arch/x86/cpu.c M src/cpu/x86/mp_init.c M src/device/cpu_device.c M src/include/cpu/cpu.h M src/include/device/path.h 5 files changed, 26 insertions(+), 36 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/42/64342/18 -- To view, visit https://review.coreboot.org/c/coreboot/+/64342 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4d9f8d23c0b0e5c142f6907593428d8509e4e7bb Gerrit-Change-Number: 64342 Gerrit-PatchSet: 18 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newpatchset

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