coreboot-gerrit October 2022

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[S] Change in coreboot[master]: util/amdfwutil: Add some types to both LVL
by Angel Pons (Code Review) 10 Oct '22

10 Oct '22

Attention is currently required from: Arthur Heymans. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68120 ) Change subject: util/amdfwutil: Add some types to both LVL ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/68120 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icb838396baf79f32823ca271f55456570ba40c20 Gerrit-Change-Number: 68120 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Mon, 10 Oct 2022 10:52:48 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: util/amdfwtool: Add more instances some types in BDT
by Marvin Drees (Code Review) 10 Oct '22

10 Oct '22

Attention is currently required from: Arthur Heymans. Marvin Drees has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68121 ) Change subject: util/amdfwtool: Add more instances some types in BDT ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/68121 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie4ed2ce0d077013b450df99a88e904c8658cfc2d Gerrit-Change-Number: 68121 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Marvin Drees <marvin.drees(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Mon, 10 Oct 2022 10:52:43 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[master]: util/amdfwtool: Add new types
by Angel Pons (Code Review) 10 Oct '22

10 Oct '22

Attention is currently required from: Arthur Heymans. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68119 ) Change subject: util/amdfwtool: Add new types ...................................................................... Patch Set 1: Code-Review+1 (1 comment) File util/amdfwtool/data_parse.c: https://review.coreboot.org/c/coreboot/+/68119/comment/d0db97a9_eb554424 PS1, Line 365: fw_type =AMD_TOKEN_UNLOCK; > spaces required around that '=' (ctx:WxV) Please fix. -- To view, visit https://review.coreboot.org/c/coreboot/+/68119 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I20dc77fb6f83dc813e3da5fe30f8f52068fc4662 Gerrit-Change-Number: 68119 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Mon, 10 Oct 2022 10:52:35 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[master]: util/amdfwutil: Order enum and use hex consistently
by Angel Pons (Code Review) 10 Oct '22

10 Oct '22

Attention is currently required from: ritul guru, Kangheui Won, Arthur Heymans, Felix Held. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68118 ) Change subject: util/amdfwutil: Order enum and use hex consistently ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/68118 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1c959a0fbbf16cc65be34b79f68ec7f92fd4368f Gerrit-Change-Number: 68118 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: ritul guru <ritul.bits(a)gmail.com> Gerrit-Attention: ritul guru <ritul.bits(a)gmail.com> Gerrit-Attention: Kangheui Won <khwon(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Mon, 10 Oct 2022 10:52:16 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[master]: {payloads,src}: Get rid of ALIGN(x, a)
by Elyes Haouas (Code Review) 10 Oct '22

10 Oct '22

Attention is currently required from: Jeff Daly, Raul Rangel, Mariusz Szafrański, Matt DeVillier, Jonathan Zhang, Julius Werner, Arthur Heymans, Jason Glenesk, Anjaneya "Reddy" Chagam, Johnny Lin, Christian Walter, Suresh Bellampalli, Vanessa Eusebio, Fred Reitberger, Tim Chu, Felix Held. Hello Jeff Daly, Raul Rangel, Mariusz Szafrański, Jonathan Zhang, Matt DeVillier, Julius Werner, Arthur Heymans, Jason Glenesk, Anjaneya "Reddy" Chagam, Johnny Lin, Christian Walter, Suresh Bellampalli, Vanessa Eusebio, Fred Reitberger, Felix Held, Tim Chu, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/68255 to look at the new patch set (#3). Change subject: {payloads,src}: Get rid of ALIGN(x, a) ...................................................................... {payloads,src}: Get rid of ALIGN(x, a) Use ALIGN_UP(x, a) for clarity. Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> Change-Id: I80f3d2c90c58daa62651f6fd635c043b1ce38b84 --- M payloads/coreinfo/cbfs_module.c M src/arch/x86/car.ld M src/lib/bootmem.c M src/lib/gcov-glue.c M src/lib/malloc.c M src/lib/rmodule.c M src/mainboard/emulation/qemu-i440fx/fw_cfg.c M src/northbridge/amd/agesa/family14/northbridge.c M src/northbridge/amd/agesa/family15tn/northbridge.c M src/northbridge/amd/agesa/family16kb/northbridge.c M src/northbridge/amd/pi/00730F01/northbridge.c M src/soc/amd/cezanne/agesa_acpi.c M src/soc/amd/mendocino/agesa_acpi.c M src/soc/amd/picasso/agesa_acpi.c M src/soc/amd/stoneyridge/northbridge.c M src/soc/intel/common/mma.c M src/soc/intel/denverton_ns/acpi.c M src/soc/intel/quark/memmap.c M src/soc/intel/xeon_sp/nb_acpi.c M src/soc/intel/xeon_sp/ras/hest.c M src/soc/samsung/exynos5250/fb.c 21 files changed, 63 insertions(+), 51 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/55/68255/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/68255 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I80f3d2c90c58daa62651f6fd635c043b1ce38b84 Gerrit-Change-Number: 68255 Gerrit-PatchSet: 3 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Anjaneya "Reddy" Chagam <anjaneya.chagam(a)intel.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Jeff Daly <jeffd(a)silicom-usa.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Mariusz Szafrański <mariuszx.szafranski(a)intel.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Suresh Bellampalli <suresh.bellampalli(a)intel.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Attention: Jeff Daly <jeffd(a)silicom-usa.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Mariusz Szafrański <mariuszx.szafranski(a)intel.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Anjaneya "Reddy" Chagam <anjaneya.chagam(a)intel.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Suresh Bellampalli <suresh.bellampalli(a)intel.com> Gerrit-Attention: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[master]: {payloads,src}: Get rid of ALIGN(x, a)
by Elyes Haouas (Code Review) 10 Oct '22

10 Oct '22

Attention is currently required from: Jeff Daly, Raul Rangel, Mariusz Szafrański, Matt DeVillier, Jonathan Zhang, Arthur Heymans, Jason Glenesk, Anjaneya "Reddy" Chagam, Johnny Lin, Christian Walter, Suresh Bellampalli, Vanessa Eusebio, Fred Reitberger, Tim Chu, Felix Held. Hello Jeff Daly, Raul Rangel, Mariusz Szafrański, Jonathan Zhang, Matt DeVillier, Arthur Heymans, Jason Glenesk, Anjaneya "Reddy" Chagam, Johnny Lin, Christian Walter, Suresh Bellampalli, Vanessa Eusebio, Fred Reitberger, Felix Held, Tim Chu, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/68255 to look at the new patch set (#2). Change subject: {payloads,src}: Get rid of ALIGN(x, a) ...................................................................... {payloads,src}: Get rid of ALIGN(x, a) Use ALIGN_UP(x, a) for clarity Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> Change-Id: I80f3d2c90c58daa62651f6fd635c043b1ce38b84 --- M payloads/coreinfo/cbfs_module.c M src/arch/x86/car.ld M src/lib/bootmem.c M src/lib/gcov-glue.c M src/lib/malloc.c M src/lib/rmodule.c M src/mainboard/emulation/qemu-i440fx/fw_cfg.c M src/northbridge/amd/agesa/family14/northbridge.c M src/northbridge/amd/agesa/family15tn/northbridge.c M src/northbridge/amd/agesa/family16kb/northbridge.c M src/northbridge/amd/pi/00730F01/northbridge.c M src/soc/amd/cezanne/agesa_acpi.c M src/soc/amd/mendocino/agesa_acpi.c M src/soc/amd/picasso/agesa_acpi.c M src/soc/amd/stoneyridge/northbridge.c M src/soc/intel/common/mma.c M src/soc/intel/denverton_ns/acpi.c M src/soc/intel/quark/memmap.c M src/soc/intel/xeon_sp/nb_acpi.c M src/soc/intel/xeon_sp/ras/hest.c M src/soc/samsung/exynos5250/fb.c 21 files changed, 63 insertions(+), 51 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/55/68255/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/68255 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I80f3d2c90c58daa62651f6fd635c043b1ce38b84 Gerrit-Change-Number: 68255 Gerrit-PatchSet: 2 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Anjaneya "Reddy" Chagam <anjaneya.chagam(a)intel.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Jeff Daly <jeffd(a)silicom-usa.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Mariusz Szafrański <mariuszx.szafranski(a)intel.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Suresh Bellampalli <suresh.bellampalli(a)intel.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Attention: Jeff Daly <jeffd(a)silicom-usa.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Mariusz Szafrański <mariuszx.szafranski(a)intel.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Anjaneya "Reddy" Chagam <anjaneya.chagam(a)intel.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Suresh Bellampalli <suresh.bellampalli(a)intel.com> Gerrit-Attention: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[master]: {payloads,src}: Get rid of ALIGN(x, a)
by Elyes Haouas (Code Review) 10 Oct '22

10 Oct '22

Elyes Haouas has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/68255 ) Change subject: {payloads,src}: Get rid of ALIGN(x, a) ...................................................................... {payloads,src}: Get rid of ALIGN(x, a) Use ALIGN_UP() for clarity Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> Change-Id: I80f3d2c90c58daa62651f6fd635c043b1ce38b84 --- M payloads/coreinfo/cbfs_module.c M src/arch/x86/car.ld M src/lib/bootmem.c M src/lib/gcov-glue.c M src/lib/malloc.c M src/lib/rmodule.c M src/mainboard/emulation/qemu-i440fx/fw_cfg.c M src/northbridge/amd/agesa/family14/northbridge.c M src/northbridge/amd/agesa/family15tn/northbridge.c M src/northbridge/amd/agesa/family16kb/northbridge.c M src/northbridge/amd/pi/00730F01/northbridge.c M src/soc/amd/cezanne/agesa_acpi.c M src/soc/amd/mendocino/agesa_acpi.c M src/soc/amd/picasso/agesa_acpi.c M src/soc/amd/stoneyridge/northbridge.c M src/soc/intel/common/mma.c M src/soc/intel/denverton_ns/acpi.c M src/soc/intel/quark/memmap.c M src/soc/intel/xeon_sp/nb_acpi.c M src/soc/intel/xeon_sp/ras/hest.c M src/soc/samsung/exynos5250/fb.c 21 files changed, 63 insertions(+), 51 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/55/68255/1 diff --git a/payloads/coreinfo/cbfs_module.c b/payloads/coreinfo/cbfs_module.c index adbe277..93c90e7 100644 --- a/payloads/coreinfo/cbfs_module.c +++ b/payloads/coreinfo/cbfs_module.c @@ -68,7 +68,7 @@ static struct cbfile *nextfile(struct cbfile *f) { - f = (struct cbfile *)((u8 *)f + ALIGN(ntohl(f->len) + ntohl(f->offset), + f = (struct cbfile *)((u8 *)f + ALIGN_UP(ntohl(f->len) + ntohl(f->offset), ntohl(header->align))); return getfile(f); } diff --git a/src/arch/x86/car.ld b/src/arch/x86/car.ld index 132937f..5886dbc 100644 --- a/src/arch/x86/car.ld +++ b/src/arch/x86/car.ld @@ -122,7 +122,7 @@ _bogus = ASSERT((CONFIG_DCACHE_RAM_SIZE == 0) || (SIZEOF(.car.data) <= CONFIG_DCACHE_RAM_SIZE), "Cache as RAM area is too full"); #if CONFIG(PAGING_IN_CACHE_AS_RAM) -_bogus2 = ASSERT(_pagetables == ALIGN(_pagetables, 4096), "_pagetables aren't 4KiB aligned"); +_bogus2 = ASSERT(_pagetables == ALIGN_UP(_pagetables, 4096), "_pagetables aren't 4KiB aligned"); #endif _bogus3 = ASSERT(CONFIG_DCACHE_BSP_STACK_SIZE > 0x0, "BSP stack size not configured"); #if CONFIG(NO_XIP_EARLY_STAGES) && (ENV_ROMSTAGE || ENV_VERSTAGE) diff --git a/src/lib/bootmem.c b/src/lib/bootmem.c index 078f9609..ea971b6 100644 --- a/src/lib/bootmem.c +++ b/src/lib/bootmem.c @@ -228,7 +228,7 @@ } /* 4KiB alignment. */ - size = ALIGN(size, 4096); + size = ALIGN_UP(size, 4096); region = NULL; memranges_each_entry(r, &bootmem) { if (range_entry_base(r) >= max_addr) diff --git a/src/lib/gcov-glue.c b/src/lib/gcov-glue.c index 14f3e3e..6bdb870 100644 --- a/src/lib/gcov-glue.c +++ b/src/lib/gcov-glue.c @@ -37,7 +37,7 @@ } else { previous_file = current_file; current_file = - (FILE *)(ALIGN(((unsigned long)previous_file->data + (FILE *)(ALIGN_UP(((unsigned long)previous_file->data + previous_file->len), 16)); } @@ -50,7 +50,7 @@ current_file->filename = (char *)&current_file[1]; strcpy(current_file->filename, path); current_file->data = - (char *)ALIGN(((unsigned long)current_file->filename + (char *)ALIGN_UP(((unsigned long)current_file->filename + strlen(path) + 1), 16); current_file->offset = 0; current_file->len = 0; diff --git a/src/lib/malloc.c b/src/lib/malloc.c index 57a72c2..8ad038a 100644 --- a/src/lib/malloc.c +++ b/src/lib/malloc.c @@ -26,7 +26,7 @@ MALLOCDBG("%s Enter, boundary %zu, size %zu, free_mem_ptr %p\n", __func__, boundary, size, free_mem_ptr); - free_mem_ptr = (void *)ALIGN((unsigned long)free_mem_ptr, boundary); + free_mem_ptr = (void *)ALIGN_UP((unsigned long)free_mem_ptr, boundary); p = free_mem_ptr; free_mem_ptr += size; diff --git a/src/lib/rmodule.c b/src/lib/rmodule.c index bee71d8..1446440 100644 --- a/src/lib/rmodule.c +++ b/src/lib/rmodule.c @@ -222,7 +222,7 @@ * to place the rmodule so that the program falls on the aligned * address with the header just before it. Therefore, we need at least * a page to account for the size of the header. */ - size_t region_size = ALIGN(memlen + region_alignment, 4096); + size_t region_size = ALIGN_UP(memlen + region_alignment, 4096); /* The program starts immediately after the header. However, * it needs to be aligned to a 4KiB boundary. Therefore, adjust the * program location so that the program lands on a page boundary. The diff --git a/src/mainboard/emulation/qemu-i440fx/fw_cfg.c b/src/mainboard/emulation/qemu-i440fx/fw_cfg.c index 3206e4c..5c23988 100644 --- a/src/mainboard/emulation/qemu-i440fx/fw_cfg.c +++ b/src/mainboard/emulation/qemu-i440fx/fw_cfg.c @@ -249,7 +249,7 @@ uint64_t addr8; switch (s[i].command) { case BIOS_LINKER_LOADER_COMMAND_ALLOCATE: - current = ALIGN(current, s[i].alloc.align); + current = ALIGN_UP(current, s[i].alloc.align); if (fw_cfg_check_file(&f, s[i].alloc.file)) goto err; @@ -329,7 +329,7 @@ printk(BIOS_DEBUG, "QEMU: loaded ACPI tables from fw_cfg.\n"); free(s); free(addrs); - return ALIGN(current, 16); + return ALIGN_UP(current, 16); err: printk(BIOS_DEBUG, "QEMU: loading ACPI tables from fw_cfg failed.\n"); diff --git a/src/northbridge/amd/agesa/family14/northbridge.c b/src/northbridge/amd/agesa/family14/northbridge.c index 7a46bd4..6237a7f 100644 --- a/src/northbridge/amd/agesa/family14/northbridge.c +++ b/src/northbridge/amd/agesa/family14/northbridge.c @@ -709,14 +709,14 @@ acpi_hest_t *hest; /* HEST */ - current = ALIGN(current, 8); + current = ALIGN_UP(current, 8); hest = (acpi_hest_t *)current; acpi_write_hest(hest, acpi_fill_hest); acpi_add_table(rsdp, hest); current += hest->header.length; /* SRAT */ - current = ALIGN(current, 8); + current = ALIGN_UP(current, 8); printk(BIOS_DEBUG, "ACPI: * SRAT at %lx\n", current); srat = (acpi_srat_t *)agesawrapper_getlateinitptr(PICK_SRAT); if (srat != NULL) { @@ -730,7 +730,7 @@ } /* SLIT */ - current = ALIGN(current, 8); + current = ALIGN_UP(current, 8); printk(BIOS_DEBUG, "ACPI: * SLIT at %lx\n", current); slit = (acpi_slit_t *)agesawrapper_getlateinitptr(PICK_SLIT); if (slit != NULL) { @@ -744,7 +744,7 @@ } /* SSDT */ - current = ALIGN(current, 16); + current = ALIGN_UP(current, 16); printk(BIOS_DEBUG, "ACPI: * AGESA ALIB SSDT at %lx\n", current); alib = (acpi_header_t *)agesawrapper_getlateinitptr(PICK_ALIB); if (alib != NULL) { @@ -758,7 +758,7 @@ /* The DSDT needs additional work for the AGESA SSDT Pstate table */ /* Keep the comment for a while. */ - current = ALIGN(current, 16); + current = ALIGN_UP(current, 16); printk(BIOS_DEBUG, "ACPI: * AGESA SSDT Pstate at %lx\n", current); ssdt = (acpi_header_t *)agesawrapper_getlateinitptr(PICK_PSTATE); if (ssdt != NULL) { diff --git a/src/northbridge/amd/agesa/family15tn/northbridge.c b/src/northbridge/amd/agesa/family15tn/northbridge.c index caacce9..9cacb79 100644 --- a/src/northbridge/amd/agesa/family15tn/northbridge.c +++ b/src/northbridge/amd/agesa/family15tn/northbridge.c @@ -473,13 +473,13 @@ acpi_hest_t *hest; /* HEST */ - current = ALIGN(current, 8); + current = ALIGN_UP(current, 8); hest = (acpi_hest_t *)current; acpi_write_hest(hest, acpi_fill_hest); acpi_add_table(rsdp, hest); current += hest->header.length; - current = ALIGN(current, 8); + current = ALIGN_UP(current, 8); printk(BIOS_DEBUG, "ACPI: * IVRS at %lx\n", current); ivrs = agesawrapper_getlateinitptr(PICK_IVRS); if (ivrs != NULL) { @@ -492,7 +492,7 @@ } /* SRAT */ - current = ALIGN(current, 8); + current = ALIGN_UP(current, 8); printk(BIOS_DEBUG, "ACPI: * SRAT at %lx\n", current); srat = (acpi_srat_t *)agesawrapper_getlateinitptr(PICK_SRAT); if (srat != NULL) { @@ -505,7 +505,7 @@ } /* SLIT */ - current = ALIGN(current, 8); + current = ALIGN_UP(current, 8); printk(BIOS_DEBUG, "ACPI: * SLIT at %lx\n", current); slit = (acpi_slit_t *)agesawrapper_getlateinitptr(PICK_SLIT); if (slit != NULL) { @@ -518,7 +518,7 @@ } /* ALIB */ - current = ALIGN(current, 16); + current = ALIGN_UP(current, 16); printk(BIOS_DEBUG, "ACPI: * AGESA ALIB SSDT at %lx\n", current); alib = (acpi_header_t *)agesawrapper_getlateinitptr(PICK_ALIB); if (alib != NULL) { @@ -533,7 +533,7 @@ /* this pstate ssdt may cause Blue Screen: Fixed: Keep this comment for a while. */ /* SSDT */ - current = ALIGN(current, 16); + current = ALIGN_UP(current, 16); printk(BIOS_DEBUG, "ACPI: * SSDT at %lx\n", current); ssdt = (acpi_header_t *)agesawrapper_getlateinitptr(PICK_PSTATE); if (ssdt != NULL) { diff --git a/src/northbridge/amd/agesa/family16kb/northbridge.c b/src/northbridge/amd/agesa/family16kb/northbridge.c index 9f20e71..9943e34 100644 --- a/src/northbridge/amd/agesa/family16kb/northbridge.c +++ b/src/northbridge/amd/agesa/family16kb/northbridge.c @@ -467,13 +467,13 @@ acpi_hest_t *hest; /* HEST */ - current = ALIGN(current, 8); + current = ALIGN_UP(current, 8); hest = (acpi_hest_t *)current; acpi_write_hest(hest, acpi_fill_hest); acpi_add_table(rsdp, hest); current += hest->header.length; - current = ALIGN(current, 8); + current = ALIGN_UP(current, 8); printk(BIOS_DEBUG, "ACPI: * IVRS at %lx\n", current); ivrs = agesawrapper_getlateinitptr(PICK_IVRS); if (ivrs != NULL) { @@ -486,7 +486,7 @@ } /* SRAT */ - current = ALIGN(current, 8); + current = ALIGN_UP(current, 8); printk(BIOS_DEBUG, "ACPI: * SRAT at %lx\n", current); srat = (acpi_srat_t *)agesawrapper_getlateinitptr(PICK_SRAT); if (srat != NULL) { @@ -499,7 +499,7 @@ } /* SLIT */ - current = ALIGN(current, 8); + current = ALIGN_UP(current, 8); printk(BIOS_DEBUG, "ACPI: * SLIT at %lx\n", current); slit = (acpi_slit_t *)agesawrapper_getlateinitptr(PICK_SLIT); if (slit != NULL) { @@ -512,7 +512,7 @@ } /* ALIB */ - current = ALIGN(current, 16); + current = ALIGN_UP(current, 16); printk(BIOS_DEBUG, "ACPI: * AGESA ALIB SSDT at %lx\n", current); alib = (acpi_header_t *)agesawrapper_getlateinitptr(PICK_ALIB); if (alib != NULL) { @@ -527,7 +527,7 @@ /* this pstate ssdt may cause Blue Screen: Fixed: Keep this comment for a while. */ /* SSDT */ - current = ALIGN(current, 16); + current = ALIGN_UP(current, 16); printk(BIOS_DEBUG, "ACPI: * SSDT at %lx\n", current); ssdt = (acpi_header_t *)agesawrapper_getlateinitptr(PICK_PSTATE); if (ssdt != NULL) { diff --git a/src/northbridge/amd/pi/00730F01/northbridge.c b/src/northbridge/amd/pi/00730F01/northbridge.c index 0245a74..dab0e72 100644 --- a/src/northbridge/amd/pi/00730F01/northbridge.c +++ b/src/northbridge/amd/pi/00730F01/northbridge.c @@ -584,13 +584,13 @@ acpi_ivrs_t *ivrs; /* HEST */ - current = ALIGN(current, 8); + current = ALIGN_UP(current, 8); acpi_write_hest((void *)current, acpi_fill_hest); acpi_add_table(rsdp, (void *)current); current += ((acpi_header_t *)current)->length; /* IVRS */ - current = ALIGN(current, 8); + current = ALIGN_UP(current, 8); printk(BIOS_DEBUG, "ACPI: * IVRS at %lx\n", current); ivrs = (acpi_ivrs_t *)current; acpi_create_ivrs(ivrs, acpi_fill_ivrs); @@ -598,7 +598,7 @@ acpi_add_table(rsdp, ivrs); /* SRAT */ - current = ALIGN(current, 8); + current = ALIGN_UP(current, 8); printk(BIOS_DEBUG, "ACPI: * SRAT at %lx\n", current); srat = (acpi_srat_t *)agesawrapper_getlateinitptr(PICK_SRAT); if (srat != NULL) { @@ -611,7 +611,7 @@ } /* SLIT */ - current = ALIGN(current, 8); + current = ALIGN_UP(current, 8); printk(BIOS_DEBUG, "ACPI: * SLIT at %lx\n", current); slit = (acpi_slit_t *)agesawrapper_getlateinitptr(PICK_SLIT); if (slit != NULL) { @@ -624,7 +624,7 @@ } /* ALIB */ - current = ALIGN(current, 16); + current = ALIGN_UP(current, 16); printk(BIOS_DEBUG, "ACPI: * AGESA ALIB SSDT at %lx\n", current); alib = (acpi_header_t *)agesawrapper_getlateinitptr(PICK_ALIB); if (alib != NULL) { @@ -639,7 +639,7 @@ /* this pstate ssdt may cause Blue Screen: Fixed: Keep this comment for a while. */ /* SSDT */ - current = ALIGN(current, 16); + current = ALIGN_UP(current, 16); printk(BIOS_DEBUG, "ACPI: * SSDT at %lx\n", current); ssdt = (acpi_header_t *)agesawrapper_getlateinitptr(PICK_PSTATE); if (ssdt != NULL) { diff --git a/src/soc/amd/cezanne/agesa_acpi.c b/src/soc/amd/cezanne/agesa_acpi.c index a397360..4adf959 100644 --- a/src/soc/amd/cezanne/agesa_acpi.c +++ b/src/soc/amd/cezanne/agesa_acpi.c @@ -16,7 +16,7 @@ current = add_agesa_fsp_acpi_table(AMD_FSP_ACPI_ALIB_HOB_GUID, "ALIB", rsdp, current); /* IVRS */ - current = ALIGN(current, 8); + current = ALIGN_UP(current, 8); ivrs = (acpi_ivrs_t *)current; acpi_create_ivrs(ivrs, acpi_fill_ivrs); current += ivrs->header.length; diff --git a/src/soc/amd/mendocino/agesa_acpi.c b/src/soc/amd/mendocino/agesa_acpi.c index 9062c7a..e0ca9ac 100644 --- a/src/soc/amd/mendocino/agesa_acpi.c +++ b/src/soc/amd/mendocino/agesa_acpi.c @@ -18,7 +18,7 @@ current = add_agesa_fsp_acpi_table(AMD_FSP_ACPI_ALIB_HOB_GUID, "ALIB", rsdp, current); /* IVRS */ - current = ALIGN(current, 8); + current = ALIGN_UP(current, 8); ivrs = (acpi_ivrs_t *)current; acpi_create_ivrs(ivrs, acpi_fill_ivrs); current += ivrs->header.length; diff --git a/src/soc/amd/picasso/agesa_acpi.c b/src/soc/amd/picasso/agesa_acpi.c index e4a9b14..35eedcb 100644 --- a/src/soc/amd/picasso/agesa_acpi.c +++ b/src/soc/amd/picasso/agesa_acpi.c @@ -547,7 +547,7 @@ struct acpi_crat_header *crat; /* CRAT */ - current = ALIGN(current, 8); + current = ALIGN_UP(current, 8); crat = (struct acpi_crat_header *)current; acpi_create_crat(crat, acpi_fill_crat); current += crat->header.length; @@ -557,7 +557,7 @@ current = add_agesa_fsp_acpi_table(AMD_FSP_ACPI_ALIB_HOB_GUID, "ALIB", rsdp, current); /* IVRS */ - current = ALIGN(current, 8); + current = ALIGN_UP(current, 8); ivrs = (acpi_ivrs_t *)current; acpi_create_ivrs(ivrs, acpi_fill_ivrs); current += ivrs->header.length; diff --git a/src/soc/amd/stoneyridge/northbridge.c b/src/soc/amd/stoneyridge/northbridge.c index 500940c..4549abb 100644 --- a/src/soc/amd/stoneyridge/northbridge.c +++ b/src/soc/amd/stoneyridge/northbridge.c @@ -235,13 +235,13 @@ acpi_hest_t *hest; /* HEST */ - current = ALIGN(current, 8); + current = ALIGN_UP(current, 8); hest = (acpi_hest_t *)current; acpi_write_hest(hest, acpi_fill_hest); acpi_add_table(rsdp, (void *)current); current += hest->header.length; - current = ALIGN(current, 8); + current = ALIGN_UP(current, 8); printk(BIOS_DEBUG, "ACPI: * IVRS at %lx\n", current); ivrs = agesawrapper_getlateinitptr(PICK_IVRS); if (ivrs != NULL) { @@ -254,7 +254,7 @@ } /* SRAT */ - current = ALIGN(current, 8); + current = ALIGN_UP(current, 8); printk(BIOS_DEBUG, "ACPI: * SRAT at %lx\n", current); srat = (acpi_srat_t *)agesawrapper_getlateinitptr(PICK_SRAT); if (srat != NULL) { @@ -267,7 +267,7 @@ } /* SLIT */ - current = ALIGN(current, 8); + current = ALIGN_UP(current, 8); printk(BIOS_DEBUG, "ACPI: * SLIT at %lx\n", current); slit = (acpi_slit_t *)agesawrapper_getlateinitptr(PICK_SLIT); if (slit != NULL) { @@ -280,7 +280,7 @@ } /* ALIB */ - current = ALIGN(current, 16); + current = ALIGN_UP(current, 16); printk(BIOS_DEBUG, "ACPI: * AGESA ALIB SSDT at %lx\n", current); alib = (acpi_header_t *)agesawrapper_getlateinitptr(PICK_ALIB); if (alib != NULL) { @@ -293,7 +293,7 @@ " Skipping.\n"); } - current = ALIGN(current, 16); + current = ALIGN_UP(current, 16); printk(BIOS_DEBUG, "ACPI: * SSDT at %lx\n", current); ssdt = (acpi_header_t *)agesawrapper_getlateinitptr(PICK_PSTATE); if (ssdt != NULL) { diff --git a/src/soc/intel/common/mma.c b/src/soc/intel/common/mma.c index 04d766d..3314e8e 100644 --- a/src/soc/intel/common/mma.c +++ b/src/soc/intel/common/mma.c @@ -173,7 +173,7 @@ return; } - mma_data_size = ALIGN(mma_hob_size, 16) + + mma_data_size = ALIGN_UP(mma_hob_size, 16) + sizeof(struct mma_data_container); mma_data = cbmem_add(CBMEM_ID_MMA_DATA, mma_data_size); diff --git a/src/soc/intel/denverton_ns/acpi.c b/src/soc/intel/denverton_ns/acpi.c index ab6e7cc..dbf48bf 100644 --- a/src/soc/intel/denverton_ns/acpi.c +++ b/src/soc/intel/denverton_ns/acpi.c @@ -152,7 +152,7 @@ acpi_header_t *ssdt2; current = acpi_write_hpet(device, current, rsdp); - current = (ALIGN(current, 16)); + current = (ALIGN_UP(current, 16)); ssdt2 = (acpi_header_t *)current; memset(ssdt2, 0, sizeof(acpi_header_t)); @@ -162,7 +162,7 @@ acpi_add_table(rsdp, ssdt2); printk(BIOS_DEBUG, "ACPI: * SSDT2 @ %p Length %x\n", ssdt2, ssdt2->length); - current = (ALIGN(current, 16)); + current = (ALIGN_UP(current, 16)); } else { ssdt2 = NULL; printk(BIOS_DEBUG, "ACPI: * SSDT2 not generated.\n"); diff --git a/src/soc/intel/quark/memmap.c b/src/soc/intel/quark/memmap.c index 97a9fd8..46671b2 100644 --- a/src/soc/intel/quark/memmap.c +++ b/src/soc/intel/quark/memmap.c @@ -12,7 +12,7 @@ /* Locate the top of RAM */ top_of_low_usable_memory = (uintptr_t) cbmem_top(); - top_of_ram = ALIGN(top_of_low_usable_memory, 16 * MiB); + top_of_ram = ALIGN_UP(top_of_low_usable_memory, 16 * MiB); /* Cache postcar and ramstage */ postcar_frame_add_mtrr(pcf, top_of_ram - (16 * MiB), 16 * MiB, diff --git a/src/soc/intel/xeon_sp/nb_acpi.c b/src/soc/intel/xeon_sp/nb_acpi.c index 64851f5..c31fd61 100644 --- a/src/soc/intel/xeon_sp/nb_acpi.c +++ b/src/soc/intel/xeon_sp/nb_acpi.c @@ -414,7 +414,7 @@ const config_t *const config = config_of(device); /* SRAT */ - current = ALIGN(current, 8); + current = ALIGN_UP(current, 8); printk(BIOS_DEBUG, "ACPI: * SRAT at %lx\n", current); srat = (acpi_srat_t *) current; acpi_create_srat(srat, acpi_fill_srat); @@ -422,7 +422,7 @@ acpi_add_table(rsdp, srat); /* SLIT */ - current = ALIGN(current, 8); + current = ALIGN_UP(current, 8); printk(BIOS_DEBUG, "ACPI: * SLIT at %lx\n", current); slit = (acpi_slit_t *) current; acpi_create_slit(slit, acpi_fill_slit); @@ -431,7 +431,7 @@ /* DMAR */ if (config->vtd_support) { - current = ALIGN(current, 8); + current = ALIGN_UP(current, 8); dmar = (acpi_dmar_t *)current; enum dmar_flags flags = DMAR_INTR_REMAP; diff --git a/src/soc/intel/xeon_sp/ras/hest.c b/src/soc/intel/xeon_sp/ras/hest.c index 02a9ab1..9eb54d9 100644 --- a/src/soc/intel/xeon_sp/ras/hest.c +++ b/src/soc/intel/xeon_sp/ras/hest.c @@ -91,7 +91,7 @@ printk(BIOS_DEBUG, "elog_addr: %llx, size:%x\n", gnvs->hest_log_addr, CONFIG_ERROR_LOG_BUFFER_SIZE); - current = ALIGN(current, 8); + current = ALIGN_UP(current, 8); hest = (acpi_hest_t *)current; acpi_write_hest(hest, acpi_fill_hest); acpi_add_table(rsdp, (void *)current); diff --git a/src/soc/samsung/exynos5250/fb.c b/src/soc/samsung/exynos5250/fb.c index 1fc926a..ab097e2 100644 --- a/src/soc/samsung/exynos5250/fb.c +++ b/src/soc/samsung/exynos5250/fb.c @@ -100,7 +100,7 @@ { unsigned int val; - fb_size = ALIGN(fb_size, 4096); + fb_size = ALIGN_UP(fb_size, 4096); write32(&exynos_disp_ctrl->vidcon1, pd->ivclk | pd->fixvclk); val = ENVID_ON | ENVID_F_ON | (pd->clkval_f << CLKVAL_F_OFFSET); -- To view, visit https://review.coreboot.org/c/coreboot/+/68255 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I80f3d2c90c58daa62651f6fd635c043b1ce38b84 Gerrit-Change-Number: 68255 Gerrit-PatchSet: 1 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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[M] Change in coreboot[master]: Documentation/drivers/cbfs_smbios.md: Describe CBFS serial number
by build bot (Jenkins) (Code Review) 10 Oct '22

10 Oct '22

Attention is currently required from: Paul Menzel, Angel Pons, Krystian Hebel. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/65702 ) Change subject: Documentation/drivers/cbfs_smbios.md: Describe CBFS serial number ...................................................................... Patch Set 5: Verified+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/65702 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6f0963417c7c580f903922ac88c95569c8782bdb Gerrit-Change-Number: 65702 Gerrit-PatchSet: 5 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Comment-Date: Mon, 10 Oct 2022 10:18:34 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[master]: drivers/generic/cbfs-uuid: Add driver to include UUID from CBFS
by Michał Żygowski (Code Review) 10 Oct '22

10 Oct '22

Attention is currently required from: Paul Menzel, Angel Pons, Krystian Hebel. Michał Żygowski has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/64639 ) Change subject: drivers/generic/cbfs-uuid: Add driver to include UUID from CBFS ...................................................................... Patch Set 12: (1 comment) File src/drivers/generic/cbfs-uuid/cbfs-uuid.c: https://review.coreboot.org/c/coreboot/+/64639/comment/9cfffa79_de7dc5cf PS11, Line 11: /* Add 3 more bytes (2 for possible CRLF) and third for NULL char */ > Parentheses seems misplaced, how about […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/64639 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I22f22f4e8742716283d2fcaba4894c06cef3a4bf Gerrit-Change-Number: 64639 Gerrit-PatchSet: 12 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Comment-Date: Mon, 10 Oct 2022 10:18:33 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-MessageType: comment

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[M] Change in coreboot[master]: drivers/generic/cbfs-uuid: Add driver to include UUID from CBFS
by Michał Żygowski (Code Review) 10 Oct '22

10 Oct '22

Attention is currently required from: Michał Żygowski, Paul Menzel, Angel Pons. Hello build bot (Jenkins), Angel Pons, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/64639 to look at the new patch set (#12). Change subject: drivers/generic/cbfs-uuid: Add driver to include UUID from CBFS ...................................................................... drivers/generic/cbfs-uuid: Add driver to include UUID from CBFS When system_uuid CBFS file is present and contains the UUID in a string format, the driver will parse it and convert to binary format to populate the SMBIOS type 1 UUID field. TEST=Add UUID file and boot MSI PRO Z690-A DDR4 WIFI and check with dmidecode if the UUID is populated correctly. Signed-off-by: Michał Żygowski <michal.zygowski(a)3mdeb.com> Change-Id: I22f22f4e8742716283d2fcaba4894c06cef3a4bf --- A Documentation/drivers/cbfs_smbios.md M Documentation/drivers/index.md A src/drivers/generic/cbfs-uuid/Kconfig A src/drivers/generic/cbfs-uuid/Makefile.inc A src/drivers/generic/cbfs-uuid/cbfs-uuid.c 5 files changed, 113 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/64639/12 -- To view, visit https://review.coreboot.org/c/coreboot/+/64639 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I22f22f4e8742716283d2fcaba4894c06cef3a4bf Gerrit-Change-Number: 64639 Gerrit-PatchSet: 12 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: newpatchset

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