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Jonathan Zhang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/65093 )
Change subject: Makefile.inc: Add support for proper site-local
......................................................................
Patch Set 11:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/65093/comment/e356deb2_6a85f4b3
PS5, Line 11: to e.g. develop a new SoC completely seperated from the tree.
> Feel free to take a look at CB:65601
[CB:65601] does not exist. Maybe it was abandoned? In this case, should we continue this one?
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Attention is currently required from: Iman Bingi, Martin L Roth, Julius Werner, Patrick Rudolph.
Iman Bingi has uploaded a new patch set (#114) to the change originally created by Patrick Rudolph. ( https://review.coreboot.org/c/coreboot/+/23586 )
Change subject: payloads/cbui: Add new payload CBUI
......................................................................
payloads/cbui: Add new payload CBUI
Depends on libpayload and nuklear.
Features:
* Graphical menus with scrolling.
* Text rendering engine (atm only bitmap font)
* Support for keyboard and mouse
* Support for USB and PS/2 devices
* Ported coreinfo and nvramcui
* Allows to modify NVRAM and RTC
* Works as ELF payload
* Works as Seabios secondary payload
* Basic support for multiple languages
* Hacky support for BIOS calls (depends on NASM)
* Runs in qemu and on real hardware
* Use linker script to allocate low memory
Shortcomings:
* Doesn't work in VGA text mode
* Untested on UEFI
* int32 relocates itself to low memory
Licenses:
* GPLv2 (CBUI + libpayload)
* BSD (libpayload)
* MIT (nuklear)
TODO:
* Test on as much platforms as possible
* Link int32 into low memory
This is Patrick Rudolph's original patch, updated by
Ben Adu-Boahen to:
* Add Read/Write module
* This module allows read/write to any hardware
component that is readable/writeable
Note:
This is work in progress
Change-Id: Ib9a1a07c1065880aa675380625021750d5cab7d1
Signed-off-by: Patrick Rudolph <siro(a)das-labor.org>
Signed-off-by: Ben Adu-Boahen <imanbingy(a)gmail.com>
---
M payloads/Kconfig
M payloads/Makefile.inc
A payloads/cbui/.gitignore
A payloads/cbui/Kconfig
A payloads/cbui/Makefile
A payloads/cbui/NuklearUI/NuklearCombo.c
A payloads/cbui/NuklearUI/NuklearCombo.h
A payloads/cbui/NuklearUI/NuklearCommon.h
A payloads/cbui/NuklearUI/NuklearDataGrid.c
A payloads/cbui/NuklearUI/NuklearDataGrid.h
A payloads/cbui/NuklearUI/NuklearDatePicker.c
A payloads/cbui/NuklearUI/NuklearDatePicker.h
A payloads/cbui/NuklearUI/NuklearFieldFile.c
A payloads/cbui/NuklearUI/NuklearFieldFile.h
A payloads/cbui/NuklearUI/NuklearFieldHex.c
A payloads/cbui/NuklearUI/NuklearFieldHex.h
A payloads/cbui/NuklearUI/NuklearFileChooser.c
A payloads/cbui/NuklearUI/NuklearFileChooser.h
A payloads/cbui/NuklearUI/NuklearGroup.c
A payloads/cbui/NuklearUI/NuklearGroup.h
A payloads/cbui/NuklearUI/NuklearHex.c
A payloads/cbui/NuklearUI/NuklearHex.h
A payloads/cbui/NuklearUI/NuklearIntegerRange.c
A payloads/cbui/NuklearUI/NuklearIntegerRange.h
A payloads/cbui/NuklearUI/NuklearLabel.c
A payloads/cbui/NuklearUI/NuklearLabel.h
A payloads/cbui/NuklearUI/NuklearObject.c
A payloads/cbui/NuklearUI/NuklearObject.h
A payloads/cbui/NuklearUI/NuklearPciHeader.c
A payloads/cbui/NuklearUI/NuklearPciHeader.h
A payloads/cbui/NuklearUI/NuklearRW.c
A payloads/cbui/NuklearUI/NuklearRW.h
A payloads/cbui/NuklearUI/NuklearRoot.c
A payloads/cbui/NuklearUI/NuklearRwAcpi.c
A payloads/cbui/NuklearUI/NuklearRwAcpi.h
A payloads/cbui/NuklearUI/NuklearRwAtaAtapi.c
A payloads/cbui/NuklearUI/NuklearRwAtaAtapi.h
A payloads/cbui/NuklearUI/NuklearRwClock.c
A payloads/cbui/NuklearUI/NuklearRwClock.h
A payloads/cbui/NuklearUI/NuklearRwCpuMsr.c
A payloads/cbui/NuklearUI/NuklearRwCpuMsr.h
A payloads/cbui/NuklearUI/NuklearRwDimmSpd.c
A payloads/cbui/NuklearUI/NuklearRwDimmSpd.h
A payloads/cbui/NuklearUI/NuklearRwE820.c
A payloads/cbui/NuklearUI/NuklearRwE820.h
A payloads/cbui/NuklearUI/NuklearRwEc.c
A payloads/cbui/NuklearUI/NuklearRwEc.h
A payloads/cbui/NuklearUI/NuklearRwIo.c
A payloads/cbui/NuklearUI/NuklearRwIo.h
A payloads/cbui/NuklearUI/NuklearRwIoIndexData.c
A payloads/cbui/NuklearUI/NuklearRwIoIndexData.h
A payloads/cbui/NuklearUI/NuklearRwMemory.c
A payloads/cbui/NuklearUI/NuklearRwMemory.h
A payloads/cbui/NuklearUI/NuklearRwMemoryIndexData.c
A payloads/cbui/NuklearUI/NuklearRwMemoryIndexData.h
A payloads/cbui/NuklearUI/NuklearRwNvram.c
A payloads/cbui/NuklearUI/NuklearRwNvram.h
A payloads/cbui/NuklearUI/NuklearRwPci.c
A payloads/cbui/NuklearUI/NuklearRwPci.h
A payloads/cbui/NuklearUI/NuklearRwPciIndexData.c
A payloads/cbui/NuklearUI/NuklearRwPciIndexData.h
A payloads/cbui/NuklearUI/NuklearRwPciOptionRom.c
A payloads/cbui/NuklearUI/NuklearRwPciOptionRom.h
A payloads/cbui/NuklearUI/NuklearRwSmbios.c
A payloads/cbui/NuklearUI/NuklearRwSmbios.h
A payloads/cbui/NuklearUI/NuklearRwSmbus.c
A payloads/cbui/NuklearUI/NuklearRwSmbus.h
A payloads/cbui/NuklearUI/NuklearRwSmram.c
A payloads/cbui/NuklearUI/NuklearRwSmram.h
A payloads/cbui/NuklearUI/NuklearRwSuperIo.c
A payloads/cbui/NuklearUI/NuklearRwSuperIo.h
A payloads/cbui/NuklearUI/NuklearRwUsb.c
A payloads/cbui/NuklearUI/NuklearRwUsb.h
A payloads/cbui/NuklearUI/NuklearStyle.c
A payloads/cbui/NuklearUI/NuklearStyle.h
A payloads/cbui/NuklearUI/NuklearTabView.c
A payloads/cbui/NuklearUI/NuklearTextView.c
A payloads/cbui/NuklearUI/NuklearTextView.h
A payloads/cbui/NuklearUI/NuklearTextfield.c
A payloads/cbui/NuklearUI/NuklearTextfield.h
A payloads/cbui/NuklearUI/NuklearTimePicker.c
A payloads/cbui/NuklearUI/NuklearTimePicker.h
A payloads/cbui/NuklearUI/NuklearUI.h
A payloads/cbui/NuklearUI/NuklearVector.c
A payloads/cbui/NuklearUI/NuklearVector.h
A payloads/cbui/arch/x86/cpuid.c
A payloads/cbui/arch/x86/cpuid.h
A payloads/cbui/arch/x86/int32.h
A payloads/cbui/arch/x86/int32.ld
A payloads/cbui/arch/x86/int32.nasm
A payloads/cbui/arch/x86/memcpy.c
A payloads/cbui/arch/x86/memcpy.h
A payloads/cbui/arch/x86/vga.c
A payloads/cbui/arch/x86/vga.h
A payloads/cbui/cbui.c
A payloads/cbui/cbui.h
A payloads/cbui/fsys/usbstorage.c
A payloads/cbui/fsys/usbstorage.h
A payloads/cbui/gfx/coreboot.c
A payloads/cbui/gfx/coreboot.h
A payloads/cbui/gfx/gfx.c
A payloads/cbui/gfx/gfx.h
A payloads/cbui/gfx/splash.c
A payloads/cbui/gfx/splash.h
A payloads/cbui/gfx/vbe.c
A payloads/cbui/gfx/vbe.h
A payloads/cbui/lang/de.c
A payloads/cbui/lang/en.c
A payloads/cbui/lang/lang.c
A payloads/cbui/lang/lang.h
A payloads/cbui/logo/cbui.png
A payloads/cbui/lp.config
A payloads/cbui/modules/bootlog_module.c
A payloads/cbui/modules/cbfs_module.c
A payloads/cbui/modules/cmos_module.c
A payloads/cbui/modules/coreboot_module.c
A payloads/cbui/modules/cpuinfo_module.c
A payloads/cbui/modules/license_module.c
A payloads/cbui/modules/modules.c
A payloads/cbui/modules/modules.h
A payloads/cbui/modules/nvram_module.c
A payloads/cbui/modules/pci_module.c
A payloads/cbui/modules/reboot_module.c
A payloads/cbui/modules/rtc_module.c
A payloads/cbui/modules/rw_module.c
A payloads/cbui/modules/timestamps_module.c
A payloads/cbui/modules/usb_module.c
A payloads/libpayload/configs/defconfig-cbui
128 files changed, 15,980 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/23586/114
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Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/67837 )
Change subject: mb/system76/addw1: Disable SaOcSupport
......................................................................
Patch Set 1:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/67837/comment/1e1d2855_db9c4e21
PS1, Line 9: Fixes hangs with 3200MT/s memory.
With all modules, or only particular ones? Please give one example module.
File src/mainboard/system76/addw1/romstage.c:
https://review.coreboot.org/c/coreboot/+/67837/comment/775b4ee8_1166bffb
PS1, Line 24: memupd->FspmConfig.SaOcSupport = 1;
So what speeds cannot be used anymore now?
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Change subject: mb/system76/addw1: Disable SaOcSupport
......................................................................
Patch Set 1: Code-Review+2
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Change subject: mb/system76: Set gfx register
......................................................................
Patch Set 3: Code-Review+2
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Change subject: mb/system76: Set SMBIOS wakeup type to power switch
......................................................................
Patch Set 3: Code-Review+2
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Change subject: mb/prodrive/atlas: Print HSID
......................................................................
Patch Set 2: Code-Review+2
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Change subject: mb/prodrive/atlas: Disable C-States & cTDP
......................................................................
Patch Set 2: Code-Review+1
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Change subject: mb/prodrive/atlas: Disable C-States & cTDP
......................................................................
Patch Set 2:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/68222/comment/40293806_34b8c85b
PS1, Line 9: required
> "required" sounds wrong here. How about: […]
Done
https://review.coreboot.org/c/coreboot/+/68222/comment/a13ad899_d438cab7
PS1, Line 11: - Disable all C-states other than C0/C1 for CPU and package
> Maybe add Kconfig options, so that it's easy to re-enable them for testing? […]
Done
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