Attention is currently required from: Matei Dibu, Nico Huber.
Hello build bot (Jenkins), Nico Huber, Angel Pons, Arthur Heymans, Elyes Haouas,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/66345
to look at the new patch set (#9).
Change subject: arch/x86/include/arch: fix assembly clobber for 64bit
......................................................................
arch/x86/include/arch: fix assembly clobber for 64bit
the "x86 PIC code ebx" workaround done previously
by commit 689e31d18b0 (Make cpuid functions usable
when compiled with PIC) does not work for x86_64
(the upper dword of rbx is set to 0)
the GCC bug that needed the workaround was fixed
in version 5 (see GCC bug 54232)
Change-Id: Iff1dd72c7423a3b385a000457bcd065cf7ed6b95
Signed-off-by: Matei Dibu <matdibu(a)protonmail.com>
---
M src/arch/x86/include/arch/cpuid.h
1 file changed, 46 insertions(+), 44 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/45/66345/9
--
To view, visit https://review.coreboot.org/c/coreboot/+/66345
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Iff1dd72c7423a3b385a000457bcd065cf7ed6b95
Gerrit-Change-Number: 66345
Gerrit-PatchSet: 9
Gerrit-Owner: Matei Dibu <matdibu(a)protonmail.com>
Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com>
Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr>
Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-Attention: Matei Dibu <matdibu(a)protonmail.com>
Gerrit-Attention: Nico Huber <nico.h(a)gmx.de>
Gerrit-MessageType: newpatchset
Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson, Matt DeVillier, Julius Werner, Fred Reitberger, Karthik Ramasubramanian, Felix Held.
Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/66944 )
Change subject: soc/amd/mendocino: Reserve more space for metadata
......................................................................
Patch Set 12: Code-Review+1
--
To view, visit https://review.coreboot.org/c/coreboot/+/66944
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I2b7346e2150835443425179048415f3b27d89d89
Gerrit-Change-Number: 66944
Gerrit-PatchSet: 12
Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com>
Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de>
Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com>
Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com>
Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com>
Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com>
Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Julius Werner <jwerner(a)chromium.org>
Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com>
Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org>
Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com>
Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com>
Gerrit-Attention: Julius Werner <jwerner(a)chromium.org>
Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com>
Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com>
Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de>
Gerrit-Comment-Date: Fri, 21 Oct 2022 08:58:28 +0000
Gerrit-HasComments: No
Gerrit-Has-Labels: Yes
Gerrit-MessageType: comment
Attention is currently required from: Jason Glenesk, Raul Rangel, Matt DeVillier, Fred Reitberger, Karthik Ramasubramanian, Felix Held.
Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68584 )
Change subject: soc/amd: Define AMD_FWM_POSITION config item
......................................................................
Patch Set 4:
(1 comment)
File src/soc/amd/common/block/psp/Kconfig:
https://review.coreboot.org/c/coreboot/+/68584/comment/9f9ef98c_9b5bfac3
PS4, Line 87: default 0xFFFA0000 if AMD_FWM_POSITION_INDEX = 0
: default 0xFFF20000 if AMD_FWM_POSITION_INDEX = 1
: default 0xFFE20000 if AMD_FWM_POSITION_INDEX = 2
: default 0xFFC20000 if AMD_FWM_POSITION_INDEX = 3
: default 0xFF820000 if AMD_FWM_POSITION_INDEX = 4
: default 0xFF020000 if AMD_FWM_POSITION_INDEX = 5
This needs to be an offset in flash, not in x86 memory mapped space?
--
To view, visit https://review.coreboot.org/c/coreboot/+/68584
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I4978a922744982afb231f8a9c650eedf950a507b
Gerrit-Change-Number: 68584
Gerrit-PatchSet: 4
Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com>
Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de>
Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com>
Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com>
Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com>
Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com>
Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org>
Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com>
Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com>
Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com>
Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de>
Gerrit-Comment-Date: Fri, 21 Oct 2022 08:55:56 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Gerrit-MessageType: comment
Attention is currently required from: Tim Wawrzynczak.
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68665 )
Change subject: mb/google/brask/var/kuldax: Revise PsysPL2 to 150W for Pentium CPU
......................................................................
Patch Set 2:
(4 comments)
File src/mainboard/google/brya/variants/kuldax/ramstage.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-160966):
https://review.coreboot.org/c/coreboot/+/68665/comment/24395d18_82ff725d
PS2, Line 71: &psys_config);
code indent should use tabs where possible
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-160966):
https://review.coreboot.org/c/coreboot/+/68665/comment/1953f866_14162024
PS2, Line 71: &psys_config);
please, no spaces at the start of a line
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-160966):
https://review.coreboot.org/c/coreboot/+/68665/comment/7c46e7af_c5434340
PS2, Line 74: total_entries, &psys_config);
code indent should use tabs where possible
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-160966):
https://review.coreboot.org/c/coreboot/+/68665/comment/3901e814_c389a957
PS2, Line 74: total_entries, &psys_config);
please, no spaces at the start of a line
--
To view, visit https://review.coreboot.org/c/coreboot/+/68665
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I63b2a9d79454b20b60ba1317a8eebb3c10eff9d6
Gerrit-Change-Number: 68665
Gerrit-PatchSet: 2
Gerrit-Owner: David Wu <david_wu(a)quanta.corp-partner.google.com>
Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com>
Gerrit-Comment-Date: Fri, 21 Oct 2022 08:48:20 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Gerrit-MessageType: comment
Attention is currently required from: Jason Glenesk, Raul Rangel, Matt DeVillier, Fred Reitberger, Felix Held.
Elyes Haouas has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68548 )
Change subject: soc/amd/*/smi.h: Use BIT() for clarity
......................................................................
Patch Set 2: Code-Review+2
--
To view, visit https://review.coreboot.org/c/coreboot/+/68548
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I490f0093d55813260fcdb7303a94accfa90e75e4
Gerrit-Change-Number: 68548
Gerrit-PatchSet: 2
Gerrit-Owner: Fred Reitberger <reitbergerfred(a)gmail.com>
Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com>
Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr>
Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de>
Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com>
Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com>
Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com>
Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org>
Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com>
Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com>
Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de>
Gerrit-Comment-Date: Fri, 21 Oct 2022 08:38:50 +0000
Gerrit-HasComments: No
Gerrit-Has-Labels: Yes
Gerrit-MessageType: comment
Attention is currently required from: Angel Pons, Werner Zeh.
Jan Samek has uploaded a new patch set (#3) to the change originally created by Angel Pons. ( https://review.coreboot.org/c/coreboot/+/68223 )
Change subject: mb/siemens/mc_apl*: Enable early PCI bridge before FSP-M
......................................................................
mb/siemens/mc_apl*: Enable early PCI bridge before FSP-M
Apollo Lake seems to start with PCIe root ports unusable/uninitialized
before FspMemoryInit() is called and FSP-M properly initializes these
root ports.
However, we need the root ports accessible before FspMemoryInit() in
certain cases (like this one - emitting POST codes through a PCIe
device).
For the inicialization to happen properly, certain register writes
specified in Apollo Lake IAFW vol. 2 (#559811), chapter 3.3.1, have
to be done.
BUG=none
TEST=Boot on siemens/mc_apl2 with NC_FPGA_POST_CODE enabled and check
that the POST codes are emitted before FspMemoryInit().
Change-Id: If782bfdd5f499dd47c085a0a16b4b15832bc040e
Signed-off-by: Angel Pons <th3fanbus(a)gmail.com>
Signed-off-by: Jan Samek <jan.samek(a)siemens.com>
---
M src/mainboard/siemens/mc_apl1/bootblock.c
1 file changed, 50 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/23/68223/3
--
To view, visit https://review.coreboot.org/c/coreboot/+/68223
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: If782bfdd5f499dd47c085a0a16b4b15832bc040e
Gerrit-Change-Number: 68223
Gerrit-PatchSet: 3
Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com>
Gerrit-Reviewer: Jan Samek <jan.samek(a)siemens.com>
Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com>
Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com>
Gerrit-MessageType: newpatchset
Attention is currently required from: Angel Pons, Werner Zeh.
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68223 )
Change subject: mb/siemens/mc_apl*: Enable early PCI bridge before FSP-M
......................................................................
Patch Set 2:
(2 comments)
Commit Message:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-160964):
https://review.coreboot.org/c/coreboot/+/68223/comment/a4a085fe_0953a670
PS2, Line 13: However, we need the root ports accessible before FspMemoryInit() in
'emiting' may be misspelled - perhaps 'emitting'?
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-160964):
https://review.coreboot.org/c/coreboot/+/68223/comment/806ff637_96d13e9e
PS2, Line 22: TEST=Boot on siemens/mc_apl2 with NC_FPGA_POST_CODE enabled and check
'emited' may be misspelled - perhaps 'emitted'?
--
To view, visit https://review.coreboot.org/c/coreboot/+/68223
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: If782bfdd5f499dd47c085a0a16b4b15832bc040e
Gerrit-Change-Number: 68223
Gerrit-PatchSet: 2
Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com>
Gerrit-Reviewer: Jan Samek <jan.samek(a)siemens.com>
Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com>
Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com>
Gerrit-Comment-Date: Fri, 21 Oct 2022 08:33:34 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: No
Gerrit-MessageType: comment