coreboot-gerrit October 2022

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[S] Change in coreboot[master]: lib/Kconfig: Disable `DECOMPRESS_OFAST` for x86_64
by Arthur Heymans (Code Review) 21 Oct '22

21 Oct '22

Attention is currently required from: Nico Huber, Martin L Roth, Angel Pons, Felix Held. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68648 ) Change subject: lib/Kconfig: Disable `DECOMPRESS_OFAST` for x86_64 ...................................................................... Patch Set 1: (1 comment) File src/lib/Kconfig: https://review.coreboot.org/c/coreboot/+/68648/comment/e11e364a_c7e1a28d PS1, Line 121: USE_EXP_X86_64_SUPPORT > It wouldn't make sense, though: the problem seems to be that `-Ofast` breaks the decompression algorithm itself when it's built for x86_64, which is part of postcar. > The decompression algoritm is in postcar and ramstage. It just uses SSE instructions which are not enabled for qemu 64 bit. The compiler often assumes they are. > Even though coreboot doesn't support it yet, one could do something similar to UEFI: SEC and PEI stages (bootblock till postcar) are 32-bit code, whereas DXE onwards (ramstage onwards) are 64-bit code. In such a configuration, postcar would be 32-bit code and would still work, although decompressing the payload would likely fail. > It's by design that everything is run in 64bit from the start. Having incompatible structs between stages is too much of a pain to deal with. Partial 32/64 bit makes little sense. > Moreover, this could or could not be an issue for non-x86 platforms. If an x86_64 platform is ever introduced that only uses 64-bit mode, then this issue should be revisited. -- To view, visit https://review.coreboot.org/c/coreboot/+/68648 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4e1475b71754cdda309b6c4ed72086c084dbcb1f Gerrit-Change-Number: 68648 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Marvin Drees <marvin.drees(a)9elements.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Bao Zheng <zheng.bao(a)amd.corp-partner.google.com> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 21 Oct 2022 12:36:13 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/prodrive/atlas: add unique DIMM locators in smbios type17
by David Milosevic (Code Review) 21 Oct '22

21 Oct '22

Attention is currently required from: Christian Walter, Angel Pons, Lean Sheng Tan. David Milosevic has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68632 ) Change subject: mb/prodrive/atlas: add unique DIMM locators in smbios type17 ...................................................................... Patch Set 2: (3 comments) File src/mainboard/prodrive/atlas/mainboard.c: https://review.coreboot.org/c/coreboot/+/68632/comment/e7f95f35_ace7d6ef PS1, Line 20: snprintf(dev_loc, sizeof(dev_loc), "DIMM-%d%d%d", mc, ch, mm); > As per the SMBIOS spec, this should be the name of the slot as printed on the mainboard. […] Done https://review.coreboot.org/c/coreboot/+/68632/comment/dfaf1e08_b60a44c2 PS1, Line 24: %d%d%d > nit: use `%u` because unsigned. […] Done https://review.coreboot.org/c/coreboot/+/68632/comment/36fbfe1a_823474c2 PS1, Line 35: MC-%d-CH-%d-DIMM-%d > nit: use `%u` because unsigned. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/68632 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8aef79faa43f2475485f581c675ee152e580f678 Gerrit-Change-Number: 68632 Gerrit-PatchSet: 2 Gerrit-Owner: David Milosevic <David.Milosevic(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Comment-Date: Fri, 21 Oct 2022 12:29:10 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/prodrive/atlas: add unique DIMM locators in smbios type17
by David Milosevic (Code Review) 21 Oct '22

21 Oct '22

Attention is currently required from: Christian Walter, Lean Sheng Tan, David Milosevic. Hello build bot (Jenkins), Christian Walter, Angel Pons, Lean Sheng Tan, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/68632 to look at the new patch set (#2). Change subject: mb/prodrive/atlas: add unique DIMM locators in smbios type17 ...................................................................... mb/prodrive/atlas: add unique DIMM locators in smbios type17 This patch adds unique device-locators, bank-locators and asset-tags to the smbios type17 tables by making use of a DIMMs controller-ID. This way we avoid name clashes when, for example, two DIMMs share the same channel-ID and DIMM-ID but have a distinct controller-ID. Signed-off-by: David Milosevic <David.Milosevic(a)9elements.com> Change-Id: I8aef79faa43f2475485f581c675ee152e580f678 --- M src/mainboard/prodrive/atlas/mainboard.c 1 file changed, 44 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/32/68632/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/68632 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8aef79faa43f2475485f581c675ee152e580f678 Gerrit-Change-Number: 68632 Gerrit-PatchSet: 2 Gerrit-Owner: David Milosevic <David.Milosevic(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: David Milosevic <David.Milosevic(a)9elements.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: lib/Kconfig: Disable `DECOMPRESS_OFAST` for x86_64
by Angel Pons (Code Review) 21 Oct '22

21 Oct '22

Attention is currently required from: Nico Huber, Martin L Roth, Arthur Heymans, Felix Held. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68648 ) Change subject: lib/Kconfig: Disable `DECOMPRESS_OFAST` for x86_64 ...................................................................... Patch Set 1: (1 comment) File src/lib/Kconfig: https://review.coreboot.org/c/coreboot/+/68648/comment/1d5caaa8_c431c194 PS1, Line 121: USE_EXP_X86_64_SUPPORT > Can you use 'ARCH_RAMSTAGE_X86_64' (that's a good enough proxy for needing lzma decompression code + […] It wouldn't make sense, though: the problem seems to be that `-Ofast` breaks the decompression algorithm itself when it's built for x86_64, which is part of postcar. Even though coreboot doesn't support it yet, one could do something similar to UEFI: SEC and PEI stages (bootblock till postcar) are 32-bit code, whereas DXE onwards (ramstage onwards) are 64-bit code. In such a configuration, postcar would be 32-bit code and would still work, although decompressing the payload would likely fail. Moreover, this could or could not be an issue for non-x86 platforms. If an x86_64 platform is ever introduced that only uses 64-bit mode, then this issue should be revisited. -- To view, visit https://review.coreboot.org/c/coreboot/+/68648 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4e1475b71754cdda309b6c4ed72086c084dbcb1f Gerrit-Change-Number: 68648 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Marvin Drees <marvin.drees(a)9elements.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Bao Zheng <zheng.bao(a)amd.corp-partner.google.com> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 21 Oct 2022 12:25:54 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: cpu/x86/emulation: Select SSE on 64bit mode
by Arthur Heymans (Code Review) 21 Oct '22

21 Oct '22

Arthur Heymans has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/67734 ) Change subject: cpu/x86/emulation: Select SSE on 64bit mode ...................................................................... Abandoned CB:44869 is better -- To view, visit https://review.coreboot.org/c/coreboot/+/67734 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ideb02d0744974de9c506addc5e4f19b5bf3f23fb Gerrit-Change-Number: 67734 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: abandon

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[S] Change in coreboot[master]: lib/Kconfig: Disable `DECOMPRESS_OFAST` for x86_64
by Arthur Heymans (Code Review) 21 Oct '22

21 Oct '22

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[S] Change in coreboot[master]: soc/mediatek/mt8186: Lower SPI NOR frequency from 52MHz to 39MHz
by Rex-BC Chen (Code Review) 21 Oct '22

21 Oct '22

Attention is currently required from: Hung-Te Lin, Bayi Cheng, Angel Pons, Yidi Lin, Yu-Ping Wu. Rex-BC Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68659 ) Change subject: soc/mediatek/mt8186: Lower SPI NOR frequency from 52MHz to 39MHz ...................................................................... Patch Set 4: (3 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/68659/comment/7071a427_53c95f5a PS3, Line 10: Mhz > nit: capitalize the 'h'? `MHz` Done https://review.coreboot.org/c/coreboot/+/68659/comment/1980aad3_f51484a6 PS3, Line 11: 52Mhz to 39 Mhz > nit: Same as above. […] Done https://review.coreboot.org/c/coreboot/+/68659/comment/098ae164_ff12fb6f PS3, Line 17: BRAHCH > typo: BRA*N*CH Done -- To view, visit https://review.coreboot.org/c/coreboot/+/68659 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibcf4549fefa28b2ad9c38e31ec9a69f8afeff3fd Gerrit-Change-Number: 68659 Gerrit-PatchSet: 4 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Bayi Cheng <bayi.cheng(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Bayi Cheng <bayi.cheng(a)mediatek.corp-partner.google.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Fri, 21 Oct 2022 12:21:59 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: lib/Kconfig: Disable `DECOMPRESS_OFAST` for x86_64
by Arthur Heymans (Code Review) 21 Oct '22

21 Oct '22

1 0

[S] Change in coreboot[master]: soc/mediatek/mt8186: Lower SPI NOR frequency from 52MHz to 39MHz
by Rex-BC Chen (Code Review) 21 Oct '22

21 Oct '22

Attention is currently required from: Hung-Te Lin, Bayi Cheng, Rex-BC Chen, Yidi Lin, Yu-Ping Wu. Hello Hung-Te Lin, build bot (Jenkins), Bayi Cheng, Angel Pons, Yidi Lin, Yu-Ping Wu, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/68659 to look at the new patch set (#4). Change subject: soc/mediatek/mt8186: Lower SPI NOR frequency from 52MHz to 39MHz ...................................................................... soc/mediatek/mt8186: Lower SPI NOR frequency from 52MHz to 39MHz According to the datasheet, the maximum frequency supported by W25Q64JWZPIM (Winbond) is 50MHz. To meet this restriction, we lower the NOR clock from 52MHz to 39MHz which is the closest frequency of the next clock level on MT8186. BUG=b:253167106 TEST=emerge-corsola coreboot. TEST=Boot time increase about 15ms. BRANCH=corsola Signed-off-by: Dandan He <dandan.he(a)mediatek.corp-partner.google.com> Signed-off-by: Bayi Cheng <bayi.cheng(a)mediatek.corp-partner.google.com> Change-Id: Ibcf4549fefa28b2ad9c38e31ec9a69f8afeff3fd --- M src/soc/mediatek/mt8186/pll.c 1 file changed, 22 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/59/68659/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/68659 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibcf4549fefa28b2ad9c38e31ec9a69f8afeff3fd Gerrit-Change-Number: 68659 Gerrit-PatchSet: 4 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Bayi Cheng <bayi.cheng(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Bayi Cheng <bayi.cheng(a)mediatek.corp-partner.google.com> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: Update opensbi submodule to upstream master
by build bot (Jenkins) (Code Review) 21 Oct '22

21 Oct '22

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68655 ) Change subject: Update opensbi submodule to upstream master ...................................................................... Patch Set 1: (3 comments) Commit Message: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-160994): https://review.coreboot.org/c/coreboot/+/68655/comment/5bf9dacc_89b41cbc PS1, Line 12: to commit id b6e520b: Possible unwrapped commit description (prefer a maximum 72 chars per line) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-160994): https://review.coreboot.org/c/coreboot/+/68655/comment/b41b128b_bd05ed2c PS1, Line 16: b6e520b platform: generic: allwinner: add support for c9xx pmu Possible unwrapped commit description (prefer a maximum 72 chars per line) Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-160994): https://review.coreboot.org/c/coreboot/+/68655/comment/2502fae9_64f733d7 PS1, Line 17: 2f63f24 platform: generic: add extensions_init handler and platform-override Possible unwrapped commit description (prefer a maximum 72 chars per line) -- To view, visit https://review.coreboot.org/c/coreboot/+/68655 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1e90f9f89effa4d1e641723859885d5874f4c7c0 Gerrit-Change-Number: 68655 Gerrit-PatchSet: 1 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 21 Oct 2022 12:14:24 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit October 2022