coreboot-gerrit October 2022

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[S] Change in coreboot[master]: soc/amd/morgana/aoac: Remove to-do after review
by Felix Held (Code Review) 21 Oct '22

21 Oct '22

Attention is currently required from: Jason Glenesk, Fred Reitberger. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68580 ) Change subject: soc/amd/morgana/aoac: Remove to-do after review ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/68580 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6772b21110f74a77eef285da3e1f313ec6326cc8 Gerrit-Change-Number: 68580 Gerrit-PatchSet: 1 Gerrit-Owner: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Comment-Date: Fri, 21 Oct 2022 14:50:08 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/amd/morgana/i2c: Remove to-do after review
by Felix Held (Code Review) 21 Oct '22

21 Oct '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/68547 ) Change subject: soc/amd/morgana/i2c: Remove to-do after review ...................................................................... soc/amd/morgana/i2c: Remove to-do after review Reviewed files and values match morgana ppr #57396, rev 1.52 Signed-off-by: Fred Reitberger <reitbergerfred(a)gmail.com> Change-Id: I9d058b0f61b4784a1d83289e75705a6415405d0b Reviewed-on: https://review.coreboot.org/c/coreboot/+/68547 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> Reviewed-by: Felix Held <felix-coreboot(a)felixheld.de> --- M src/soc/amd/morgana/i2c.c M src/soc/amd/morgana/include/soc/i2c.h 2 files changed, 18 insertions(+), 5 deletions(-) Approvals: build bot (Jenkins): Verified Felix Held: Looks good to me, approved Angel Pons: Looks good to me, but someone else must approve diff --git a/src/soc/amd/morgana/i2c.c b/src/soc/amd/morgana/i2c.c index 13b3959..92dd00d 100644 --- a/src/soc/amd/morgana/i2c.c +++ b/src/soc/amd/morgana/i2c.c @@ -1,7 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -/* TODO: Update for Morgana */ - #include <amdblocks/i2c.h> #include <console/console.h> #include <soc/i2c.h> diff --git a/src/soc/amd/morgana/include/soc/i2c.h b/src/soc/amd/morgana/include/soc/i2c.h index 900bdca..8946336 100644 --- a/src/soc/amd/morgana/include/soc/i2c.h +++ b/src/soc/amd/morgana/include/soc/i2c.h @@ -1,7 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -/* TODO: Update for Morgana */ - #ifndef AMD_MORGANA_I2C_H #define AMD_MORGANA_I2C_H @@ -12,7 +10,8 @@ #define GPIO_I2C1_SCL BIT(1) #define GPIO_I2C2_SCL BIT(2) #define GPIO_I2C3_SCL BIT(3) -#define GPIO_I2C_MASK (BIT(0) | BIT(1) | BIT(2) | BIT(3)) +#define GPIO_I2C_MASK (GPIO_I2C0_SCL | GPIO_I2C1_SCL | \ + GPIO_I2C2_SCL | GPIO_I2C3_SCL) #define I2C0_SCL_PIN GPIO_145 -- To view, visit https://review.coreboot.org/c/coreboot/+/68547 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9d058b0f61b4784a1d83289e75705a6415405d0b Gerrit-Change-Number: 68547 Gerrit-PatchSet: 2 Gerrit-Owner: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: soc/amd/morgana/i2c: Remove to-do after review
by Felix Held (Code Review) 21 Oct '22

21 Oct '22

Attention is currently required from: Jason Glenesk, Fred Reitberger. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68547 ) Change subject: soc/amd/morgana/i2c: Remove to-do after review ...................................................................... Patch Set 1: Code-Review+2 (1 comment) File src/soc/amd/morgana/include/soc/i2c.h: https://review.coreboot.org/c/coreboot/+/68547/comment/a2793346_16702010 PS1, Line 13: #define GPIO_I2C_MASK (GPIO_I2C0_SCL | GPIO_I2C1_SCL | \ : GPIO_I2C2_SCL | GPIO_I2C3_SCL) : would be great if you can do this improvement for the other amd socs too -- To view, visit https://review.coreboot.org/c/coreboot/+/68547 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9d058b0f61b4784a1d83289e75705a6415405d0b Gerrit-Change-Number: 68547 Gerrit-PatchSet: 1 Gerrit-Owner: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Comment-Date: Fri, 21 Oct 2022 14:48:36 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/amd/morgana/include/soc/iomap.h: Remove to-do after review
by Felix Held (Code Review) 21 Oct '22

21 Oct '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/68542 ) Change subject: soc/amd/morgana/include/soc/iomap.h: Remove to-do after review ...................................................................... soc/amd/morgana/include/soc/iomap.h: Remove to-do after review Reviewed file and values match morgana ppr #57396, rev 1.52 Signed-off-by: Fred Reitberger <reitbergerfred(a)gmail.com> Change-Id: I8f914432e0f55aa8050728e8cf41a3dee20990e8 Reviewed-on: https://review.coreboot.org/c/coreboot/+/68542 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Felix Held <felix-coreboot(a)felixheld.de> --- M src/soc/amd/morgana/include/soc/iomap.h 1 file changed, 15 insertions(+), 2 deletions(-) Approvals: build bot (Jenkins): Verified Felix Held: Looks good to me, approved diff --git a/src/soc/amd/morgana/include/soc/iomap.h b/src/soc/amd/morgana/include/soc/iomap.h index 53b7bc2..b00d6dd 100644 --- a/src/soc/amd/morgana/include/soc/iomap.h +++ b/src/soc/amd/morgana/include/soc/iomap.h @@ -1,7 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -/* TODO: Update for Morgana */ - #ifndef AMD_MORGANA_IOMAP_H #define AMD_MORGANA_IOMAP_H -- To view, visit https://review.coreboot.org/c/coreboot/+/68542 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8f914432e0f55aa8050728e8cf41a3dee20990e8 Gerrit-Change-Number: 68542 Gerrit-PatchSet: 3 Gerrit-Owner: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: soc/amd/morgana/include/soc/iomap.h: Remove to-do after review
by Felix Held (Code Review) 21 Oct '22

21 Oct '22

Attention is currently required from: Jason Glenesk, Paul Menzel, Fred Reitberger. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68542 ) Change subject: soc/amd/morgana/include/soc/iomap.h: Remove to-do after review ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/68542 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8f914432e0f55aa8050728e8cf41a3dee20990e8 Gerrit-Change-Number: 68542 Gerrit-PatchSet: 2 Gerrit-Owner: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Comment-Date: Fri, 21 Oct 2022 14:47:43 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/skyrim/port_descriptors: update DDI for MDN and Chausie
by Felix Held (Code Review) 21 Oct '22

21 Oct '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/66847 ) Change subject: mb/google/skyrim/port_descriptors: update DDI for MDN and Chausie ...................................................................... mb/google/skyrim/port_descriptors: update DDI for MDN and Chausie Add two new types for MDN DDI descriptor BUG=b:228284940 TEST=Normal boot and S0i3 cycles Signed-off-by: Jason Nien <finaljason(a)gmail.com> Change-Id: I02793f032f9855dac202a5aca8666c26426d6cb2 Reviewed-on: https://review.coreboot.org/c/coreboot/+/66847 Reviewed-by: Bao Zheng <fishbaozi(a)gmail.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Felix Held <felix-coreboot(a)felixheld.de> Reviewed-by: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Reviewed-by: Marshall Dawson <marshalldawson3rd(a)gmail.com> Reviewed-by: Nikolai Vyssotski <nikolai.vyssotski(a)amd.corp-partner.google.com> --- M src/mainboard/amd/chausie/port_descriptors.c M src/mainboard/google/skyrim/port_descriptors.c M src/vendorcode/amd/fsp/mendocino/platform_descriptors.h 3 files changed, 28 insertions(+), 6 deletions(-) Approvals: build bot (Jenkins): Verified Bao Zheng: Looks good to me, but someone else must approve Felix Held: Looks good to me, approved Marshall Dawson: Looks good to me, approved Nikolai Vyssotski: Looks good to me, but someone else must approve Martin Roth: Looks good to me, approved diff --git a/src/mainboard/amd/chausie/port_descriptors.c b/src/mainboard/amd/chausie/port_descriptors.c index 17091e7..b10abfa 100644 --- a/src/mainboard/amd/chausie/port_descriptors.c +++ b/src/mainboard/amd/chausie/port_descriptors.c @@ -61,12 +61,12 @@ .hdp_index = DDI_HDP2 }, { /* DDI2 - DP (type C) */ - .connector_type = DDI_DP, + .connector_type = DDI_DP_W_TYPEC, .aux_index = DDI_AUX3, .hdp_index = DDI_HDP3, }, { /* DDI3 - DP (type C) */ - .connector_type = DDI_DP, + .connector_type = DDI_DP_W_TYPEC, .aux_index = DDI_AUX4, .hdp_index = DDI_HDP4, }, diff --git a/src/mainboard/google/skyrim/port_descriptors.c b/src/mainboard/google/skyrim/port_descriptors.c index 808d00b..91316b3 100644 --- a/src/mainboard/google/skyrim/port_descriptors.c +++ b/src/mainboard/google/skyrim/port_descriptors.c @@ -61,12 +61,12 @@ .hdp_index = DDI_HDP2 }, { /* DDI2 - DP (type C) */ - .connector_type = DDI_DP, + .connector_type = DDI_DP_W_TYPEC, .aux_index = DDI_AUX3, .hdp_index = DDI_HDP3, }, { /* DDI3 - DP (type C) */ - .connector_type = DDI_DP, + .connector_type = DDI_DP_W_TYPEC, .aux_index = DDI_AUX4, .hdp_index = DDI_HDP4, }, diff --git a/src/vendorcode/amd/fsp/mendocino/platform_descriptors.h b/src/vendorcode/amd/fsp/mendocino/platform_descriptors.h index 7dae872..a8fb257 100644 --- a/src/vendorcode/amd/fsp/mendocino/platform_descriptors.h +++ b/src/vendorcode/amd/fsp/mendocino/platform_descriptors.h @@ -142,8 +142,8 @@ DDI_DP_TO_LVDS, // DP-to-LVDS DDI_NUTMEG_DP_TO_VGA, // Hudson-2 NutMeg DP-to-VGA DDI_SINGLE_LINK_DVI_I, // Single Link DVI-I - DDI_CRT, // CRT (VGA) - DDI_LVDS, // LVDS + DDI_DP_W_TYPEC, // DP with USB type C + DDI_DP_WO_TYPEC, // DP without USB type C DDI_EDP_TO_LVDS, // eDP-to-LVDS translator chip without AMD SW init DDI_EDP_TO_LVDS_SW, // eDP-to-LVDS translator which requires AMD SW init DDI_AUTO_DETECT, // VBIOS auto detect connector type -- To view, visit https://review.coreboot.org/c/coreboot/+/66847 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I02793f032f9855dac202a5aca8666c26426d6cb2 Gerrit-Change-Number: 66847 Gerrit-PatchSet: 11 Gerrit-Owner: Jason Nein <finaljason(a)gmail.com> Gerrit-Reviewer: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Chris Wang <chris.wang(a)amd.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Nikolai Vyssotski <nikolai.vyssotski(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: nb/x4x/dq_dqs.c: Use 'enum cb_err'
by Felix Held (Code Review) 21 Oct '22

21 Oct '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/68579 ) Change subject: nb/x4x/dq_dqs.c: Use 'enum cb_err' ...................................................................... nb/x4x/dq_dqs.c: Use 'enum cb_err' Change-Id: I94dd6b1bb81bbc38ac5f89469b3ed7c83ca2a498 Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/68579 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/northbridge/intel/x4x/dq_dqs.c M src/northbridge/intel/x4x/raminit.h 2 files changed, 25 insertions(+), 12 deletions(-) Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved diff --git a/src/northbridge/intel/x4x/dq_dqs.c b/src/northbridge/intel/x4x/dq_dqs.c index 870e660..4355717 100644 --- a/src/northbridge/intel/x4x/dq_dqs.c +++ b/src/northbridge/intel/x4x/dq_dqs.c @@ -74,7 +74,7 @@ static const u8 max_tap[3] = {12, 10, 13}; -static int increment_dq_dqs(const struct sysinfo *s, struct dll_setting *dq_dqs_setting) +static enum cb_err increment_dq_dqs(const struct sysinfo *s, struct dll_setting *dq_dqs_setting) { u8 max_tap_val = max_tap[s->selected_timings.mem_clk - MEM_CLOCK_800MHz]; @@ -99,7 +99,7 @@ return CB_SUCCESS; } -static int decrement_dq_dqs(const struct sysinfo *s, struct dll_setting *dq_dqs_setting) +static enum cb_err decrement_dq_dqs(const struct sysinfo *s, struct dll_setting *dq_dqs_setting) { u8 max_tap_val = max_tap[s->selected_timings.mem_clk - MEM_CLOCK_800MHz]; @@ -195,12 +195,12 @@ * This is probably done because lanes cannot be trained independent from * each other. */ -static int find_dq_limit(const struct sysinfo *s, const u8 channel, +static enum cb_err find_dq_limit(const struct sysinfo *s, const u8 channel, struct dll_setting dq_setting[TOTAL_BYTELANES], u8 dq_lim[TOTAL_BYTELANES], const enum training_modes expected_result) { - int status = CB_SUCCESS; + enum cb_err status = CB_SUCCESS; int lane; u8 test_result; u8 pass_count[TOTAL_BYTELANES]; @@ -250,7 +250,7 @@ * - note: bytelanes cannot be trained independently, so the delays need to be * adjusted and tested for all of them at the same time */ -int do_write_training(struct sysinfo *s) +enum cb_err do_write_training(struct sysinfo *s) { int i; u8 channel, lane; @@ -328,7 +328,7 @@ 0xdfdfdfdf, 0xbebebebe, 0x7f7f7f7f, 0xfefefefe }; -static int rt_increment_dqs(struct rt_dqs_setting *setting) +static enum cb_err rt_increment_dqs(struct rt_dqs_setting *setting) { if (setting->pi < 7) { setting->pi++; @@ -364,14 +364,14 @@ return bytelane_error; } -static int rt_find_dqs_limit(struct sysinfo *s, u8 channel, +static enum cb_err rt_find_dqs_limit(struct sysinfo *s, u8 channel, struct rt_dqs_setting dqs_setting[TOTAL_BYTELANES], u8 dqs_lim[TOTAL_BYTELANES], const enum training_modes expected_result) { int lane; u8 test_result; - int status = CB_SUCCESS; + enum cb_err status = CB_SUCCESS; FOR_EACH_BYTELANE(lane) rt_set_dqs(channel, lane, 0, &dqs_setting[lane]); @@ -418,7 +418,7 @@ * seems to be required, most likely because the signals can't really be generated * separately. */ -int do_read_training(struct sysinfo *s) +enum cb_err do_read_training(struct sysinfo *s) { int loop, channel, i, lane, rank; u32 address, content; diff --git a/src/northbridge/intel/x4x/raminit.h b/src/northbridge/intel/x4x/raminit.h index ca58b1f..c2011a6 100644 --- a/src/northbridge/intel/x4x/raminit.h +++ b/src/northbridge/intel/x4x/raminit.h @@ -3,7 +3,7 @@ #ifndef __X4X_RAMINIT_H__ #define __X4X_RAMINIT_H__ -#include <stdint.h> +#include <types.h> #define NOP_CMD 0x2 #define PRECHARGE_CMD 0x4 @@ -218,8 +218,8 @@ void dqsset(u8 ch, u8 lane, const struct dll_setting *setting); void dqset(u8 ch, u8 lane, const struct dll_setting *setting); void rt_set_dqs(u8 channel, u8 lane, u8 rank, struct rt_dqs_setting *dqs_setting); -int do_write_training(struct sysinfo *s); -int do_read_training(struct sysinfo *s); +enum cb_err do_write_training(struct sysinfo *s); +enum cb_err do_read_training(struct sysinfo *s); void search_write_leveling(struct sysinfo *s); void send_jedec_cmd(const struct sysinfo *s, u8 r, u8 ch, u8 cmd, u32 val); -- To view, visit https://review.coreboot.org/c/coreboot/+/68579 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I94dd6b1bb81bbc38ac5f89469b3ed7c83ca2a498 Gerrit-Change-Number: 68579 Gerrit-PatchSet: 4 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Damien Zammit Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: nb/intel/x4x/raminit.c: Use 'enum cb_err'
by Felix Held (Code Review) 21 Oct '22

21 Oct '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/68558 ) Change subject: nb/intel/x4x/raminit.c: Use 'enum cb_err' ...................................................................... nb/intel/x4x/raminit.c: Use 'enum cb_err' Change-Id: I22d7e724e69b41c9fabdef785276dc428be2b400 Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/68558 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/northbridge/intel/x4x/raminit.c 1 file changed, 15 insertions(+), 2 deletions(-) Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved diff --git a/src/northbridge/intel/x4x/raminit.c b/src/northbridge/intel/x4x/raminit.c index 2f844a5..b4366fb 100644 --- a/src/northbridge/intel/x4x/raminit.c +++ b/src/northbridge/intel/x4x/raminit.c @@ -132,7 +132,7 @@ printk(BIOS_WARNING, "VT-d enabled\n"); } -static int ddr2_save_dimminfo(u8 dimm_idx, u8 *raw_spd, +static enum cb_err ddr2_save_dimminfo(u8 dimm_idx, u8 *raw_spd, struct abs_timings *saved_timings, struct sysinfo *s) { struct dimm_attr_ddr2_st decoded_dimm; @@ -331,7 +331,7 @@ s->stacked_mode = 1; } -static int ddr3_save_dimminfo(u8 dimm_idx, u8 *raw_spd, +static enum cb_err ddr3_save_dimminfo(u8 dimm_idx, u8 *raw_spd, struct abs_timings *saved_timings, struct sysinfo *s) { struct dimm_attr_ddr3_st decoded_dimm; -- To view, visit https://review.coreboot.org/c/coreboot/+/68558 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I22d7e724e69b41c9fabdef785276dc428be2b400 Gerrit-Change-Number: 68558 Gerrit-PatchSet: 2 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Damien Zammit Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[4.18_branch]: soc/intel/apollolake: Skip SMI lockdown on Apollolake
by Felix Held (Code Review) 21 Oct '22

21 Oct '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/68599 ) Change subject: soc/intel/apollolake: Skip SMI lockdown on Apollolake ...................................................................... soc/intel/apollolake: Skip SMI lockdown on Apollolake Commit d9ef02ce (soc/intel/apollolake: Lock down Global SMI) breaks SMM/SMI on Apollolake (but not Geminilake), so guard it accordingly. TEST=build/boot google/reef, verify SMM/SMI/SMMSTORE functional. Change-Id: I00cbe046b61e6c342f7961670478d0ca8d365c2e Signed-off-by: Matt DeVillier <matt.devillier(a)gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/68599 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/soc/intel/apollolake/lockdown.c 1 file changed, 20 insertions(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved diff --git a/src/soc/intel/apollolake/lockdown.c b/src/soc/intel/apollolake/lockdown.c index e11778b..5de4bdd 100644 --- a/src/soc/intel/apollolake/lockdown.c +++ b/src/soc/intel/apollolake/lockdown.c @@ -18,5 +18,6 @@ void soc_lockdown_config(int chipset_lockdown) { /* APL only supports CHIPSET_LOCKDOWN_COREBOOT */ - pmc_lock_smi(); + if (CONFIG(SOC_INTEL_GEMINILAKE)) + pmc_lock_smi(); } -- To view, visit https://review.coreboot.org/c/coreboot/+/68599 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: 4.18_branch Gerrit-Change-Id: I00cbe046b61e6c342f7961670478d0ca8d365c2e Gerrit-Change-Number: 68599 Gerrit-PatchSet: 2 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: soc/intel/apollolake: Skip SMI lockdown on Apollolake
by Felix Held (Code Review) 21 Oct '22

21 Oct '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/68549 ) Change subject: soc/intel/apollolake: Skip SMI lockdown on Apollolake ...................................................................... soc/intel/apollolake: Skip SMI lockdown on Apollolake Commit d9ef02ce (soc/intel/apollolake: Lock down Global SMI) breaks SMM/SMI on Apollolake (but not Geminilake), so guard it accordingly. TEST=build/boot google/reef, verify SMM/SMI/SMMSTORE functional. Change-Id: I00cbe046b61e6c342f7961670478d0ca8d365c2e Signed-off-by: Matt DeVillier <matt.devillier(a)gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/68549 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Sean Rhodes <sean(a)starlabs.systems> Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/soc/intel/apollolake/lockdown.c 1 file changed, 21 insertions(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, but someone else must approve Sean Rhodes: Looks good to me, approved diff --git a/src/soc/intel/apollolake/lockdown.c b/src/soc/intel/apollolake/lockdown.c index e11778b..5de4bdd 100644 --- a/src/soc/intel/apollolake/lockdown.c +++ b/src/soc/intel/apollolake/lockdown.c @@ -18,5 +18,6 @@ void soc_lockdown_config(int chipset_lockdown) { /* APL only supports CHIPSET_LOCKDOWN_COREBOOT */ - pmc_lock_smi(); + if (CONFIG(SOC_INTEL_GEMINILAKE)) + pmc_lock_smi(); } -- To view, visit https://review.coreboot.org/c/coreboot/+/68549 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I00cbe046b61e6c342f7961670478d0ca8d365c2e Gerrit-Change-Number: 68549 Gerrit-PatchSet: 3 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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