coreboot-gerrit October 2022

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[S] Change in coreboot[master]: soc/amd/*/uart: cleanup includes
by 9elements QA (Code Review) 21 Oct '22

21 Oct '22

9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68633 ) Change subject: soc/amd/*/uart: cleanup includes ...................................................................... Patch Set 2: Automatic boot test returned (PASS/FAIL/TOTAL): 15 / 1 / 16 PASS: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES_ and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/129922 PASS: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/129921 PASS: x86_32 "ThinkPad T500" , build config LENOVO_T500 and payload SeaBIOS : https://lava.9esec.io/r/129920 PASS: x86_32 "HP Z220 SFF Workstation" , build config HP_Z220_SFF_WORKSTATION and payload LinuxBoot_BB_kexec : https://lava.9esec.io/r/129919 PASS: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload TianoCore : https://lava.9esec.io/r/129918 PASS: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload SeaBIOS : https://lava.9esec.io/r/129917 PASS: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload TianoCore : https://lava.9esec.io/r/129916 PASS: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload SeaBIOS : https://lava.9esec.io/r/129915 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35_SMM_TSEG and payload TianoCore : https://lava.9esec.io/r/129914 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35_SMM_TSEG and payload SeaBIOS : https://lava.9esec.io/r/129913 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35 and payload TianoCore : https://lava.9esec.io/r/129912 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35 and payload SeaBIOS : https://lava.9esec.io/r/129911 FAIL: x86_64 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_X86_64 and payload SeaBIOS : https://lava.9esec.io/r/129910 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ASAN and payload SeaBIOS : https://lava.9esec.io/r/129909 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ and payload SeaBIOS : https://lava.9esec.io/r/129908 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX and payload SeaBIOS : https://lava.9esec.io/r/129907 Please note: This test is under development and might not be accurate at all! -- To view, visit https://review.coreboot.org/c/coreboot/+/68633 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I59ab9c2eaa65d974d418123e87e9afe65b1168cc Gerrit-Change-Number: 68633 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-Comment-Date: Fri, 21 Oct 2022 21:47:51 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[master]: soc/amd/*/smi.h: Use BIT() for clarity
by Felix Held (Code Review) 21 Oct '22

21 Oct '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/68548 ) Change subject: soc/amd/*/smi.h: Use BIT() for clarity ...................................................................... soc/amd/*/smi.h: Use BIT() for clarity Use the BIT() macro for single-bit constants. Signed-off-by: Fred Reitberger <reitbergerfred(a)gmail.com> Change-Id: I490f0093d55813260fcdb7303a94accfa90e75e4 Reviewed-on: https://review.coreboot.org/c/coreboot/+/68548 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Elyes Haouas <ehaouas(a)noos.fr> --- M src/soc/amd/cezanne/include/soc/smi.h M src/soc/amd/mendocino/include/soc/smi.h M src/soc/amd/picasso/include/soc/smi.h M src/soc/amd/stoneyridge/include/soc/smi.h 4 files changed, 56 insertions(+), 39 deletions(-) Approvals: build bot (Jenkins): Verified Elyes Haouas: Looks good to me, approved diff --git a/src/soc/amd/cezanne/include/soc/smi.h b/src/soc/amd/cezanne/include/soc/smi.h index aad4123..5fc256b 100644 --- a/src/soc/amd/cezanne/include/soc/smi.h +++ b/src/soc/amd/cezanne/include/soc/smi.h @@ -149,22 +149,22 @@ #define SMI_REG_SMISTS4 0x90 #define SMI_REG_POINTER 0x94 -# define SMI_STATUS_SRC_SCI (1 << 0) -# define SMI_STATUS_SRC_0 (1 << 1) /* SMIx80 */ -# define SMI_STATUS_SRC_1 (1 << 2) /* SMIx84... */ -# define SMI_STATUS_SRC_2 (1 << 3) -# define SMI_STATUS_SRC_3 (1 << 4) -# define SMI_STATUS_SRC_4 (1 << 5) +# define SMI_STATUS_SRC_SCI BIT(0) +# define SMI_STATUS_SRC_0 BIT(1) /* SMIx80 */ +# define SMI_STATUS_SRC_1 BIT(2) /* SMIx84... */ +# define SMI_STATUS_SRC_2 BIT(3) +# define SMI_STATUS_SRC_3 BIT(4) +# define SMI_STATUS_SRC_4 BIT(5) #define SMI_TIMER 0x96 #define SMI_TIMER_MASK 0x7fff #define SMI_TIMER_EN (1 << 15) #define SMI_REG_SMITRIG0 0x98 -# define SMITRIG0_PSP (1 << 25) -# define SMITRG0_EOS (1 << 28) -# define SMI_TIMER_SEL (1 << 29) -# define SMITRG0_SMIENB (1 << 31) +# define SMITRIG0_PSP BIT(25) +# define SMITRG0_EOS BIT(28) +# define SMI_TIMER_SEL BIT(29) +# define SMITRG0_SMIENB BIT(31) #define SMI_REG_CONTROL0 0xa0 #define SMI_REG_CONTROL1 0xa4 diff --git a/src/soc/amd/mendocino/include/soc/smi.h b/src/soc/amd/mendocino/include/soc/smi.h index 1525e34..4a4ec24 100644 --- a/src/soc/amd/mendocino/include/soc/smi.h +++ b/src/soc/amd/mendocino/include/soc/smi.h @@ -156,22 +156,22 @@ #define SMI_REG_SMISTS4 0x90 #define SMI_REG_POINTER 0x94 -# define SMI_STATUS_SRC_SCI (1 << 0) -# define SMI_STATUS_SRC_0 (1 << 1) /* SMIx80 */ -# define SMI_STATUS_SRC_1 (1 << 2) /* SMIx84... */ -# define SMI_STATUS_SRC_2 (1 << 3) -# define SMI_STATUS_SRC_3 (1 << 4) -# define SMI_STATUS_SRC_4 (1 << 5) +# define SMI_STATUS_SRC_SCI BIT(0) +# define SMI_STATUS_SRC_0 BIT(1) /* SMIx80 */ +# define SMI_STATUS_SRC_1 BIT(2) /* SMIx84... */ +# define SMI_STATUS_SRC_2 BIT(3) +# define SMI_STATUS_SRC_3 BIT(4) +# define SMI_STATUS_SRC_4 BIT(5) #define SMI_TIMER 0x96 #define SMI_TIMER_MASK 0x7fff #define SMI_TIMER_EN (1 << 15) #define SMI_REG_SMITRIG0 0x98 -# define SMITRIG0_PSP (1 << 25) -# define SMITRG0_EOS (1 << 28) -# define SMI_TIMER_SEL (1 << 29) -# define SMITRG0_SMIENB (1 << 31) +# define SMITRIG0_PSP BIT(25) +# define SMITRG0_EOS BIT(28) +# define SMI_TIMER_SEL BIT(29) +# define SMITRG0_SMIENB BIT(31) #define SMI_REG_CONTROL0 0xa0 #define SMI_REG_CONTROL1 0xa4 diff --git a/src/soc/amd/picasso/include/soc/smi.h b/src/soc/amd/picasso/include/soc/smi.h index dba3bea..265c10c 100644 --- a/src/soc/amd/picasso/include/soc/smi.h +++ b/src/soc/amd/picasso/include/soc/smi.h @@ -151,22 +151,22 @@ #define SMI_REG_SMISTS4 0x90 #define SMI_REG_POINTER 0x94 -# define SMI_STATUS_SRC_SCI (1 << 0) -# define SMI_STATUS_SRC_0 (1 << 1) /* SMIx80 */ -# define SMI_STATUS_SRC_1 (1 << 2) /* SMIx84... */ -# define SMI_STATUS_SRC_2 (1 << 3) -# define SMI_STATUS_SRC_3 (1 << 4) -# define SMI_STATUS_SRC_4 (1 << 5) +# define SMI_STATUS_SRC_SCI BIT(0) +# define SMI_STATUS_SRC_0 BIT(1) /* SMIx80 */ +# define SMI_STATUS_SRC_1 BIT(2) /* SMIx84... */ +# define SMI_STATUS_SRC_2 BIT(3) +# define SMI_STATUS_SRC_3 BIT(4) +# define SMI_STATUS_SRC_4 BIT(5) #define SMI_TIMER 0x96 #define SMI_TIMER_MASK 0x7fff #define SMI_TIMER_EN (1 << 15) #define SMI_REG_SMITRIG0 0x98 -# define SMITRIG0_PSP (1 << 25) -# define SMITRG0_EOS (1 << 28) -# define SMI_TIMER_SEL (1 << 29) -# define SMITRG0_SMIENB (1 << 31) +# define SMITRIG0_PSP BIT(25) +# define SMITRG0_EOS BIT(28) +# define SMI_TIMER_SEL BIT(29) +# define SMITRG0_SMIENB BIT(31) #define SMI_REG_CONTROL0 0xa0 #define SMI_REG_CONTROL1 0xa4 diff --git a/src/soc/amd/stoneyridge/include/soc/smi.h b/src/soc/amd/stoneyridge/include/soc/smi.h index 3ce41df..ccdd3c5 100644 --- a/src/soc/amd/stoneyridge/include/soc/smi.h +++ b/src/soc/amd/stoneyridge/include/soc/smi.h @@ -3,6 +3,8 @@ #ifndef AMD_STONEYRIDGE_SMI_H #define AMD_STONEYRIDGE_SMI_H +#include <types.h> + #define SMI_GEVENTS 24 #define SCIMAPS 59 /* 0..58 */ #define SCI_GPES 32 @@ -149,21 +151,21 @@ #define SMI_REG_SMISTS4 0x90 #define SMI_REG_POINTER 0x94 -# define SMI_STATUS_SRC_SCI (1 << 0) -# define SMI_STATUS_SRC_0 (1 << 1) /* SMIx80 */ -# define SMI_STATUS_SRC_1 (1 << 2) /* SMIx84... */ -# define SMI_STATUS_SRC_2 (1 << 3) -# define SMI_STATUS_SRC_3 (1 << 4) -# define SMI_STATUS_SRC_4 (1 << 5) +# define SMI_STATUS_SRC_SCI BIT(0) +# define SMI_STATUS_SRC_0 BIT(1) /* SMIx80 */ +# define SMI_STATUS_SRC_1 BIT(2) /* SMIx84... */ +# define SMI_STATUS_SRC_2 BIT(3) +# define SMI_STATUS_SRC_3 BIT(4) +# define SMI_STATUS_SRC_4 BIT(5) #define SMI_TIMER 0x96 #define SMI_TIMER_MASK 0x7fff #define SMI_TIMER_EN (1 << 15) #define SMI_REG_SMITRIG0 0x98 -# define SMITRG0_EOS (1 << 28) -# define SMI_TIMER_SEL (1 << 29) -# define SMITRG0_SMIENB (1 << 31) +# define SMITRG0_EOS BIT(28) +# define SMI_TIMER_SEL BIT(29) +# define SMITRG0_SMIENB BIT(31) #define SMI_REG_CONTROL0 0xa0 #define SMI_REG_CONTROL1 0xa4 -- To view, visit https://review.coreboot.org/c/coreboot/+/68548 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I490f0093d55813260fcdb7303a94accfa90e75e4 Gerrit-Change-Number: 68548 Gerrit-PatchSet: 3 Gerrit-Owner: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: util/amdfwutil: Fix adding microcode binaries
by Felix Held (Code Review) 21 Oct '22

21 Oct '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/68573 ) Change subject: util/amdfwutil: Fix adding microcode binaries ...................................................................... util/amdfwutil: Fix adding microcode binaries Change-Id: I726df4ff97688f4c48961e6e61672cef6c3b7aff Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/68573 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Felix Held <felix-coreboot(a)felixheld.de> --- M util/amdfwtool/amdfwtool.c 1 file changed, 15 insertions(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Felix Held: Looks good to me, approved diff --git a/util/amdfwtool/amdfwtool.c b/util/amdfwtool/amdfwtool.c index 5552658..389be9f 100644 --- a/util/amdfwtool/amdfwtool.c +++ b/util/amdfwtool/amdfwtool.c @@ -833,7 +833,8 @@ if (index->filename && index->type != AMD_BIOS_APCB && index->type != AMD_BIOS_BIN && - index->type != AMD_BIOS_APCB_BK) + index->type != AMD_BIOS_APCB_BK && + index->type != AMD_BIOS_UCODE) free(index->filename); } } -- To view, visit https://review.coreboot.org/c/coreboot/+/68573 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I726df4ff97688f4c48961e6e61672cef6c3b7aff Gerrit-Change-Number: 68573 Gerrit-PatchSet: 3 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: util/amdfwutil: Fix adding microcode binaries
by Felix Held (Code Review) 21 Oct '22

21 Oct '22

Attention is currently required from: Arthur Heymans. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68573 ) Change subject: util/amdfwutil: Fix adding microcode binaries ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/68573 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I726df4ff97688f4c48961e6e61672cef6c3b7aff Gerrit-Change-Number: 68573 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Fri, 21 Oct 2022 21:40:01 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[master]: soc/amd/morgana/mca: Update for morgana
by Felix Held (Code Review) 21 Oct '22

21 Oct '22

Attention is currently required from: Fred Reitberger. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68683 ) Change subject: soc/amd/morgana/mca: Update for morgana ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/68683 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If0082bd5362bdead3f9dc693d1e338e8cda224f0 Gerrit-Change-Number: 68683 Gerrit-PatchSet: 1 Gerrit-Owner: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Comment-Date: Fri, 21 Oct 2022 21:17:14 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/kahlee: always detect ELAN touchpad
by Matt DeVillier (Code Review) 21 Oct '22

21 Oct '22

Attention is currently required from: Jason Nien, Martin Roth, Felix Held. Matt DeVillier has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68672 ) Change subject: mb/google/kahlee: always detect ELAN touchpad ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/68672 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id5d14eedd5d95dd0990ae56775daed9284c03717 Gerrit-Change-Number: 68672 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 21 Oct 2022 21:15:52 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/amd/*/i2c.h: Make definition more accurate
by Matt DeVillier (Code Review) 21 Oct '22

21 Oct '22

Attention is currently required from: Jason Glenesk, Raul Rangel, Fred Reitberger, Felix Held. Matt DeVillier has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68682 ) Change subject: soc/amd/*/i2c.h: Make definition more accurate ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/68682 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I13fc376552068a64768fe1cf9f1c09cca1768aed Gerrit-Change-Number: 68682 Gerrit-PatchSet: 1 Gerrit-Owner: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 21 Oct 2022 21:10:52 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[L] Change in coreboot[master]: mb/gigabyte/ga-h61m-series: Add GA-H61M-DS2
by 9elements QA (Code Review) 21 Oct '22

21 Oct '22

9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/61541 ) Change subject: mb/gigabyte/ga-h61m-series: Add GA-H61M-DS2 ...................................................................... Patch Set 5: Automatic boot test returned (PASS/FAIL/TOTAL): 15 / 1 / 16 PASS: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES_ and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/129905 PASS: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/129904 PASS: x86_32 "ThinkPad T500" , build config LENOVO_T500 and payload SeaBIOS : https://lava.9esec.io/r/129903 PASS: x86_32 "HP Z220 SFF Workstation" , build config HP_Z220_SFF_WORKSTATION and payload LinuxBoot_BB_kexec : https://lava.9esec.io/r/129902 PASS: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload TianoCore : https://lava.9esec.io/r/129901 PASS: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload SeaBIOS : https://lava.9esec.io/r/129900 PASS: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload TianoCore : https://lava.9esec.io/r/129899 PASS: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload SeaBIOS : https://lava.9esec.io/r/129898 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35_SMM_TSEG and payload TianoCore : https://lava.9esec.io/r/129897 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35_SMM_TSEG and payload SeaBIOS : https://lava.9esec.io/r/129896 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35 and payload TianoCore : https://lava.9esec.io/r/129895 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35 and payload SeaBIOS : https://lava.9esec.io/r/129894 FAIL: x86_64 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_X86_64 and payload SeaBIOS : https://lava.9esec.io/r/129893 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ASAN and payload SeaBIOS : https://lava.9esec.io/r/129892 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ and payload SeaBIOS : https://lava.9esec.io/r/129891 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX and payload SeaBIOS : https://lava.9esec.io/r/129890 Please note: This test is under development and might not be accurate at all! -- To view, visit https://review.coreboot.org/c/coreboot/+/61541 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3d8df483e5573f77782b7d18b1410b391bfe387d Gerrit-Change-Number: 61541 Gerrit-PatchSet: 5 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Comment-Date: Fri, 21 Oct 2022 21:03:45 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: soc/amd/*/uart: cleanup includes
by Felix Held (Code Review) 21 Oct '22

21 Oct '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/68633 ) Change subject: soc/amd/*/uart: cleanup includes ...................................................................... soc/amd/*/uart: cleanup includes Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: I59ab9c2eaa65d974d418123e87e9afe65b1168cc Reviewed-on: https://review.coreboot.org/c/coreboot/+/68633 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Elyes Haouas <ehaouas(a)noos.fr> Reviewed-by: Fred Reitberger <reitbergerfred(a)gmail.com> --- M src/soc/amd/cezanne/uart.c M src/soc/amd/mendocino/uart.c M src/soc/amd/morgana/uart.c M src/soc/amd/picasso/uart.c M src/soc/amd/stoneyridge/uart.c 5 files changed, 16 insertions(+), 9 deletions(-) Approvals: build bot (Jenkins): Verified Elyes Haouas: Looks good to me, approved Fred Reitberger: Looks good to me, approved diff --git a/src/soc/amd/cezanne/uart.c b/src/soc/amd/cezanne/uart.c index 3ac7deb..189a1e5 100644 --- a/src/soc/amd/cezanne/uart.c +++ b/src/soc/amd/cezanne/uart.c @@ -3,8 +3,6 @@ #include <amdblocks/gpio.h> #include <amdblocks/uart.h> #include <commonlib/helpers.h> -#include <console/console.h> -#include <device/device.h> #include <device/mmio.h> #include <soc/aoac_defs.h> #include <soc/gpio.h> diff --git a/src/soc/amd/mendocino/uart.c b/src/soc/amd/mendocino/uart.c index d4bf2fe..03fc593 100644 --- a/src/soc/amd/mendocino/uart.c +++ b/src/soc/amd/mendocino/uart.c @@ -3,8 +3,6 @@ #include <amdblocks/gpio.h> #include <amdblocks/uart.h> #include <commonlib/helpers.h> -#include <console/console.h> -#include <device/device.h> #include <device/mmio.h> #include <soc/aoac_defs.h> #include <soc/gpio.h> diff --git a/src/soc/amd/morgana/uart.c b/src/soc/amd/morgana/uart.c index 401a134..92cb2fe 100644 --- a/src/soc/amd/morgana/uart.c +++ b/src/soc/amd/morgana/uart.c @@ -5,8 +5,6 @@ #include <amdblocks/gpio.h> #include <amdblocks/uart.h> #include <commonlib/helpers.h> -#include <console/console.h> -#include <device/device.h> #include <device/mmio.h> #include <soc/aoac_defs.h> #include <soc/gpio.h> diff --git a/src/soc/amd/picasso/uart.c b/src/soc/amd/picasso/uart.c index e3e3aa9..2120ad7 100644 --- a/src/soc/amd/picasso/uart.c +++ b/src/soc/amd/picasso/uart.c @@ -1,11 +1,9 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <console/console.h> -#include <commonlib/helpers.h> -#include <device/device.h> #include <device/mmio.h> #include <amdblocks/gpio.h> #include <amdblocks/uart.h> +#include <commonlib/helpers.h> #include <soc/aoac_defs.h> #include <soc/gpio.h> #include <soc/iomap.h> diff --git a/src/soc/amd/stoneyridge/uart.c b/src/soc/amd/stoneyridge/uart.c index 86e2626..7fbba07 100644 --- a/src/soc/amd/stoneyridge/uart.c +++ b/src/soc/amd/stoneyridge/uart.c @@ -2,6 +2,7 @@ #include <amdblocks/gpio.h> #include <amdblocks/uart.h> +#include <commonlib/helpers.h> #include <soc/aoac_defs.h> #include <soc/gpio.h> #include <soc/iomap.h> -- To view, visit https://review.coreboot.org/c/coreboot/+/68633 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I59ab9c2eaa65d974d418123e87e9afe65b1168cc Gerrit-Change-Number: 68633 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[L] Change in coreboot[master]: soc/amd: Define AMD_FWM_POSITION config item
by Karthik Ramasubramanian (Code Review) 21 Oct '22

21 Oct '22

Attention is currently required from: Jason Glenesk, Raul Rangel, Matt DeVillier, Arthur Heymans, Fred Reitberger, Felix Held. Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68584 ) Change subject: soc/amd: Define AMD_FWM_POSITION config item ...................................................................... Patch Set 4: (1 comment) File src/soc/amd/common/block/psp/Kconfig: https://review.coreboot.org/c/coreboot/+/68584/comment/72299abb_8c44c681 PS4, Line 87: default 0xFFFA0000 if AMD_FWM_POSITION_INDEX = 0 : default 0xFFF20000 if AMD_FWM_POSITION_INDEX = 1 : default 0xFFE20000 if AMD_FWM_POSITION_INDEX = 2 : default 0xFFC20000 if AMD_FWM_POSITION_INDEX = 3 : default 0xFF820000 if AMD_FWM_POSITION_INDEX = 4 : default 0xFF020000 if AMD_FWM_POSITION_INDEX = 5 > This needs to be an offset in flash, not in x86 memory mapped space? Unfortunately amdfwtool expects it to be x86 memory mapped space. There seems to be an assumption that the the last 16MB (0xff000000 - 0xffffffff) in the x86 32 bit memory map is where the SPI flash is present even if it's size is 16 MB or not. So it has to be an offset in that 16 MB. I will look for a best way to change it. -- To view, visit https://review.coreboot.org/c/coreboot/+/68584 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4978a922744982afb231f8a9c650eedf950a507b Gerrit-Change-Number: 68584 Gerrit-PatchSet: 4 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 21 Oct 2022 20:52:57 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: comment

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