Martin L Roth has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/68705 )
Change subject: MAINTAINERS: Update instructions
......................................................................
MAINTAINERS: Update instructions
Signed-off-by: Martin Roth <gaumless(a)gmail.com>
Change-Id: I0e06ac5f92109757143897f3d331aeea0cefe4b9
---
M MAINTAINERS
1 file changed, 21 insertions(+), 30 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/68705/1
diff --git a/MAINTAINERS b/MAINTAINERS
index 131aea6..093604d 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -14,27 +14,17 @@
easier on the maintainers. Not all of these guidelines matter for every
trivial patch so apply some common sense.
-1. Always _test_ your changes, however small, on at least 1 or
- 2 people, preferably many more.
-2. Try to release a few ALPHA test versions to gerrit. Announce
- them onto the coreboot mailing list and IRC channel and await
- results. This is especially important on coreboot core changes,
- but also for device drivers, because often that's the only way
- you will find things like the fact revision 3 chipset needs
- a magic fix you didn't know about, or some clown changed the
- chips on a board and not its name. (Don't laugh!)
+1. Make sure your changes compile correctly in multiple configurations. In
+ particular check that changes work for various boards in the tree that
+ it affects:
-3. Make sure your changes compile correctly in multiple
- configurations. In particular check that changes work for all
- boards in the tree (use abuild!)
+ Test with: `util/abuild/abuild -c $(nproc) -t vendor/boardname`
-4. When you are happy with a change make it generally available for
+2. When you are happy with a change make it generally available for
testing in gerrit and await feedback.
-5. Make your patch available through coreboot's gerrit code review
- system, and add the relevant maintainer from this list as a code
- reviewer. Be prepared to get your changes sent back with seemingly
+3. Be prepared to get your changes sent back with seemingly
silly requests about formatting and variable names. These aren't
as silly as they seem. One job the maintainers do is to keep
things looking the same. Sometimes this means that the clever
@@ -45,36 +35,27 @@
(util/lint/checkpatch.pl) to catch trival style violations.
See https://www.coreboot.org/Coding_Style for guidance here.
- PLEASE add the maintainers that are generated by
- util/scripts/get_maintainer.pl as reviewers. The results returned
- by the script will be best if you have git installed and are
- making your changes in a branch derived from coreboot.org's latest
- git tree.
-
- PLEASE try to include any credit lines you want added with the
- patch. It avoids people being missed off by mistake and makes
- it easier to know who wants adding and who doesn't.
-
PLEASE document known bugs. If it doesn't work for everything
or does something very odd once a month document it.
- PLEASE remember that submissions must be made under the terms
+ ALWAYS remember that submissions are be made under the terms
of the OSDL certificate of contribution and should include a
Signed-off-by: line. The current version of this "Developer's
Certificate of Origin" (DCO) is listed at
https://www.coreboot.org/Development_Guidelines#Sign-off_Procedure.
-6. Make sure you have the right to send any changes you make. If you
+4. Make sure you have the right to send any changes you make. If you
do changes at work you may find your employer owns the patch
not you.
-7. Happy hacking.
+5. Happy hacking.
Descriptions of section entries:
M: Maintainer: FullName <address@domain>
Must be registered to Gerrit (https://review.coreboot.org/).
- Should have experience with upstream coreboot development.
+ Should have experience with upstream coreboot development and
+ +2 rights.
R: Designated reviewer: FullName <address@domain>
These reviewers should be CCed on patches.
L: Mailing list that is relevant to this area
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Gerrit-Project: coreboot
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Gerrit-Change-Id: I0e06ac5f92109757143897f3d331aeea0cefe4b9
Gerrit-Change-Number: 68705
Gerrit-PatchSet: 1
Gerrit-Owner: Martin L Roth <gaumless(a)gmail.com>
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Attention is currently required from: Sean Rhodes, Martin L Roth, Stefan Reinauer.
Matt DeVillier has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68596 )
Change subject: payloads/edk2: Set the correct serial settings for AMD SOCs
......................................................................
Patch Set 1:
(2 comments)
File payloads/external/edk2/Makefile:
https://review.coreboot.org/c/coreboot/+/68596/comment/68236ea7_fddc9c10
PS1, Line 103: CONFIG_SOC_AMD_COMMON
there's a handful of pre-Zen platforms that select this Kconfig, do they use MMIO for serial as well?
https://review.coreboot.org/c/coreboot/+/68596/comment/34e9152b_8368a042
PS1, Line 105: 0xfedc9000
should probably pass this in as a Kconfig
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Gerrit-Change-Id: I70630d21bbdb21f2aa8cbaeb3e842629b97af3ba
Gerrit-Change-Number: 68596
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Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems>
Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com>
Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
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Martin L Roth has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/68704 )
Change subject: MAINTAINERS: Add Matt DeVillier to the release team
......................................................................
MAINTAINERS: Add Matt DeVillier to the release team
Signed-off-by: Martin Roth <gaumless(a)gmail.com>
Change-Id: I6f5c10618edb87d2dc12c14187c4620d8675a443
---
M MAINTAINERS
1 file changed, 11 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/68704/1
diff --git a/MAINTAINERS b/MAINTAINERS
index dc4c3af..131aea6 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -992,6 +992,7 @@
M: Jason Glenesk <jason.glenesk(a)gmail.com>
M: Angel Pons <th3fanbus(a)gmail.com>
M: Martin Roth <gaumless(a)gmail.com>
+M: Matt DeVillier <MrChromebox(a)gmail.com>
S: Maintained
F: Documentation/releases/
F: util/release/
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Gerrit-Branch: master
Gerrit-Change-Id: I6f5c10618edb87d2dc12c14187c4620d8675a443
Gerrit-Change-Number: 68704
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Martin L Roth has submitted this change. ( https://review.coreboot.org/c/coreboot/+/68320 )
Change subject: configs: Add skyrim config with binaries
......................................................................
configs: Add skyrim config with binaries
We've seen failures because the binaries were not being built into the
image. In particular, the APCB is modified by the coreboot build
process, so if the APCB isn't built correctly to support the correct
number of SPDs, the build can fail.
The mendocino FSP binaries are not yet pushed, so the build is currently
pointing at the cezanne binaries. The mendocino FSP will be pushed when
the mendocino chips are released for sale.
Signed-off-by: Martin Roth <gaumless(a)gmail.com>
Change-Id: I31d11c5327416f4339930373c447531ae9f79d28
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68320
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Jon Murphy <jpmurphy(a)google.com>
---
A configs/config.google_skyrim.with_binaries
1 file changed, 51 insertions(+), 0 deletions(-)
Approvals:
build bot (Jenkins): Verified
Jon Murphy: Looks good to me, approved
diff --git a/configs/config.google_skyrim.with_binaries b/configs/config.google_skyrim.with_binaries
new file mode 100644
index 0000000..d0227af
--- /dev/null
+++ b/configs/config.google_skyrim.with_binaries
@@ -0,0 +1,29 @@
+CONFIG_TIMESTAMPS_ON_CONSOLE=y
+CONFIG_USE_AMD_BLOBS=y
+CONFIG_VENDOR_GOOGLE=y
+CONFIG_VGA_BIOS_ID="1002,1506"
+CONFIG_AMD_FWM_POSITION_INDEX=3
+CONFIG_VGA_BIOS=y
+CONFIG_CONSOLE_POST=y
+CONFIG_BOARD_GOOGLE_SKYRIM=y
+CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
+CONFIG_SPL_TABLE_FILE="3rdparty/amd_blobs/mendocino/PSP/TypeId0x55_SplTableBl_MDN.sbin"
+CONFIG_VGA_BIOS_FILE="3rdparty/amd_blobs/mendocino/MdnGenericVbios.bin"
+CONFIG_FSP_M_FILE="3rdparty/amd_blobs/cezanne/CEZANNE_M.fd"
+CONFIG_FSP_S_FILE="3rdparty/amd_blobs/cezanne/CEZANNE_S.fd"
+CONFIG_ASYNC_FILE_LOADING=y
+CONFIG_PSP_SOFTFUSE_BITS="34 28"
+CONFIG_UART_PCI_ADDR=0x0
+CONFIG_RUN_FSP_GOP=y
+CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
+CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
+CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
+CONFIG_DISPLAY_HOBS=y
+CONFIG_DISPLAY_UPD_DATA=y
+CONFIG_ADD_FSP_BINARIES=y
+CONFIG_POST_IO_PORT=0x80
+CONFIG_PAYLOAD_NONE=y
+CONFIG_DISPLAY_FSP_CALLS_AND_STATUS=y
+CONFIG_DISPLAY_FSP_HEADER=y
+CONFIG_FATAL_ASSERTS=y
+CONFIG_DEBUG_SMI=y
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Gerrit-Owner: Martin L Roth <gaumless(a)gmail.com>
Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com>
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Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com>
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Martin L Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68500 )
Change subject: Docs/releases: Update release checklist document
......................................................................
Patch Set 1:
(3 comments)
File Documentation/releases/checklist.md:
https://review.coreboot.org/c/coreboot/+/68500/comment/1086952f_0120f63c
PS1, Line 29:
> Hmmm, this file seems to use single spaces after periods. […]
That seems very nitpicky. Personally I don't think it matters much. If someone wants to go back through later and change it, that's fine.
https://review.coreboot.org/c/coreboot/+/68500/comment/2cbc470d_ce71b101
PS1, Line 12: Our releases aren't primarily a vehicle for code that is stable across
: all boards: The logistics of testing the more than 100 boards that are
: spread out all continents (except Antarctica, probably) on a given tree
: state are prohibitive for project of our size.
:
: Instead, the releases are regular breakpoints that serve multiple
: purposes: They support cooperation between multiple groups (corporations
: or otherwise) in that it's easier to keep source trees synchronized
: based on a limited set of commits. They allow a quick assessment of the
: age of any given build or source tree based on its git version (4.8-1234
: was merged into master a few months after 4.8, which came out in April
: of 2018. 4.0-21718's age is harder to guess).
:
: And finally we use releases to as points in time where we remove old
: code: Once we decide that a certain part of coreboot gets in the way of
: future development, we announce on the next release that we intend to
: remove that part - and everything that depends on it - after the
: following release. So removing feature FOO will be announced in release
: X for release X+1. The first commit after X+1 is fair game for such
: removal.
> So this section was reflowed.
I reflowed a bunch of sections because they weren't under 72 characters.
https://review.coreboot.org/c/coreboot/+/68500/comment/248edbbf_f5b0beaf
PS1, Line 73: - [ ] Run `util/vboot_list/vboot_list.sh` script to update the list of
: boards supported by vboot.
> Shouldn't we do this when doing the release?
Sorry, what do you mean "when doing the release"? Everything in this list is done as part part of doing the release.
Do you mean closer to the day of the release?
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