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Hello Hung-Te Lin, build bot (Jenkins), Angel Pons, Yidi Lin, Yu-Ping Wu,
I'd like you to reexamine a change. Please visit
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Change subject: soc/mediatek/mt8188: Add ddp driver to support eDP output
......................................................................
soc/mediatek/mt8188: Add ddp driver to support eDP output
Add DDP (display data path) driver that supports overlay, read/write
DMA, etc. The output goes to display interface DP_INTF0 directly.
Add ddp gclast and output_clamp settings to MT8188 to support
multi-layer display.
BUG=b:244208960
TEST=emerge-geralt coreboot.
Signed-off-by: Nathan Lu <nathan.lu(a)mediatek.com>
Change-Id: Icc0a878c609818fedd298c141bb39469fd2f6388
---
M src/soc/mediatek/mt8188/Makefile.inc
A src/soc/mediatek/mt8188/ddp.c
M src/soc/mediatek/mt8188/include/soc/addressmap.h
A src/soc/mediatek/mt8188/include/soc/ddp.h
4 files changed, 479 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/68487/6
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Hello Hung-Te Lin, build bot (Jenkins), Angel Pons, Yidi Lin, Yu-Ping Wu,
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#4).
Change subject: soc/mediatek: Add support for input 1P mode of dp_intf
......................................................................
soc/mediatek: Add support for input 1P mode of dp_intf
MT8195 supports 2P mode and MT8188 supports 1P mode. A new struct
member `input_mode` is added to `struct mtk_dpintf` for
differentiation. We also move SoC-specific data `dpintf_data` to soc
folder.
BUG=b:244208960
TEST=emerge-cherry coreboot.
Signed-off-by: Bo-Chen Chen <rex-bc.chen(a)mediatek.com>
Change-Id: I6d138b0ff75e005518bc8fcce06df20924b2a6ba
---
M src/soc/mediatek/common/dp/dp_intf.c
M src/soc/mediatek/common/dp/include/soc/dp_intf.h
M src/soc/mediatek/mt8195/Makefile.inc
A src/soc/mediatek/mt8195/dp_intf.c
4 files changed, 65 insertions(+), 31 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/85/68485/4
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Hello Hung-Te Lin, build bot (Jenkins), Angel Pons, Yu-Ping Wu, Yidi Lin,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/68484
to look at the new patch set (#4).
Change subject: soc/mediatek: Move DP drivers to common
......................................................................
soc/mediatek: Move DP drivers to common
DP drivers can be shared for both MT8195 and MT8188, so move them to
common folder.
BUG=b:244208960
TEST=emerge-cherry coreboot.
Signed-off-by: Bo-Chen Chen <rex-bc.chen(a)mediatek.com>
Change-Id: Ic80c03aa6b13e6c9c39fd63b5c1c1cbdbe93a7c4
---
R src/soc/mediatek/common/dp/dp_intf.c
R src/soc/mediatek/common/dp/dptx.c
R src/soc/mediatek/common/dp/dptx_hal.c
R src/soc/mediatek/common/dp/include/soc/dp_intf.h
R src/soc/mediatek/common/dp/include/soc/dptx.h
R src/soc/mediatek/common/dp/include/soc/dptx_hal.h
R src/soc/mediatek/common/dp/include/soc/dptx_reg.h
M src/soc/mediatek/mt8195/Makefile.inc
8 files changed, 30 insertions(+), 13 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/84/68484/4
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Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68490 )
Change subject: mb/google/geralt: Configure firmware display for eDP panel
......................................................................
Patch Set 5:
(4 comments)
File src/mainboard/google/geralt/display.h:
https://review.coreboot.org/c/coreboot/+/68490/comment/957b51b6_54779f64
PS5, Line 8: bool
If there's no good reason, please use `int` as the return type.
File src/mainboard/google/geralt/display.c:
https://review.coreboot.org/c/coreboot/+/68490/comment/60be296b_c3972c8e
PS5, Line 47: false
-1
https://review.coreboot.org/c/coreboot/+/68490/comment/dcebb434_999407d2
PS5, Line 63: true
0
File src/mainboard/google/geralt/mainboard.c:
https://review.coreboot.org/c/coreboot/+/68490/comment/ac9b4eb8_215d51a6
PS5, Line 15: !
And here
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Change subject: soc/mediatek/mt8188: Update mtcmos settings for display and audio
......................................................................
Patch Set 5:
(2 comments)
File src/soc/mediatek/common/mtcmos.c:
https://review.coreboot.org/c/coreboot/+/68489/comment/c24e1735_edcebe59
PS5, Line 17: {
Move to next line
```
{
/* do nothing */
}
```
https://review.coreboot.org/c/coreboot/+/68489/comment/e1f125e1_ba2f0c52
PS5, Line 24: mtcmos_set_scpd_ext_buck_iso(pd);
If this is controlled by `SCPD_EXT_BUCK_ISO`, why do we need the weak function? Can't we write
```
if (pd->caps & SCPD_EXT_BUCK_ISO)
clrbits32(&mtk_spm->ext_buck_iso, pd->ext_buck_iso_bits);
```
directly here?
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Change subject: soc/mediatek: Add support for input 1P mode of dp_intf
......................................................................
Patch Set 3:
(1 comment)
File src/soc/mediatek/common/dp/include/soc/dp_intf.h:
https://review.coreboot.org/c/coreboot/+/68485/comment/70110b71_55380040
PS3, Line 263: extern struct mtk_dpintf dpintf_data;
Can this be `const` (also for the first argument of `mtk_dpintf_` functions)?
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Change subject: mb/google/skyrim/var/frostflow: Update devicetree setting
......................................................................
Patch Set 4:
(1 comment)
Patchset:
PS4:
Hi Karthik and Google,
Could you review the CL?
We keep the probed flag and will rename it later according to Matt's comment.
Thank you.
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