coreboot-gerrit October 2022

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[S] Change in coreboot[master]: mb/google/rex: Move `DRIVERS_INTEL_USB4_RETIMER` config
by 9elements QA (Code Review) 26 Oct '22

26 Oct '22

9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68771 ) Change subject: mb/google/rex: Move `DRIVERS_INTEL_USB4_RETIMER` config ...................................................................... Patch Set 3: Automatic boot test returned (PASS/FAIL/TOTAL): 14 / 2 / 16 FAIL: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES_ and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/130982 FAIL: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/130981 PASS: x86_32 "ThinkPad T500" , build config LENOVO_T500 and payload SeaBIOS : https://lava.9esec.io/r/130980 PASS: x86_32 "HP Z220 SFF Workstation" , build config HP_Z220_SFF_WORKSTATION and payload LinuxBoot_BB_kexec : https://lava.9esec.io/r/130979 PASS: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload TianoCore : https://lava.9esec.io/r/130978 PASS: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload SeaBIOS : https://lava.9esec.io/r/130977 PASS: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload TianoCore : https://lava.9esec.io/r/130976 PASS: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload SeaBIOS : https://lava.9esec.io/r/130975 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35_SMM_TSEG and payload TianoCore : https://lava.9esec.io/r/130974 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35_SMM_TSEG and payload SeaBIOS : https://lava.9esec.io/r/130973 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35 and payload TianoCore : https://lava.9esec.io/r/130972 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35 and payload SeaBIOS : https://lava.9esec.io/r/130971 PASS: x86_64 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_X86_64 and payload SeaBIOS : https://lava.9esec.io/r/130970 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ASAN and payload SeaBIOS : https://lava.9esec.io/r/130969 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ and payload SeaBIOS : https://lava.9esec.io/r/130968 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX and payload SeaBIOS : https://lava.9esec.io/r/130967 Please note: This test is under development and might not be accurate at all! -- To view, visit https://review.coreboot.org/c/coreboot/+/68771 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I38360f6f1f2fcb4b0315de93c68f00d77e63003c Gerrit-Change-Number: 68771 Gerrit-PatchSet: 3 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Ivy Jian <ivy.jian(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Tarun Tuli <taruntuli(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Wed, 26 Oct 2022 17:00:05 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: cpu/intel/common: Fix typecasting issue
by Sridhar Siricilla (Code Review) 26 Oct '22

26 Oct '22

Attention is currently required from: Gaggery Tsai, Kedar J. Karanje, Subrata Banik, Kane Chen. Hello Gaggery Tsai, Kedar J. Karanje, Subrata Banik, Kane Chen, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/68899 to look at the new patch set (#2). Change subject: cpu/intel/common: Fix typecasting issue ...................................................................... cpu/intel/common: Fix typecasting issue The patch fixes the typecasting issue, that is conversion from 'int' to 'unsigned long long int'. This changes value from '0x8000 0000' to '0xFFFF FFFF 8000 0000'. During unit testing, the argument is getting changed to an unexpected number which is resulting to an exception when IA32_HWP_REQUEST MSR is updated. In this update, the MSR's reserved bits are getting updated, so this causes exception. TEST= Verified the code on the Gimble. No exception is seen after the fix. Signed-off-by: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Change-Id: I35d382c792b9df260381b7696f3bbff43d6c4dc2 --- M src/cpu/intel/common/common_init.c 1 file changed, 23 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/68899/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/68899 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I35d382c792b9df260381b7696f3bbff43d6c4dc2 Gerrit-Change-Number: 68899 Gerrit-PatchSet: 2 Gerrit-Owner: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: Gaggery Tsai <gaggery.tsai(a)intel.com> Gerrit-Reviewer: Kane Chen <kane.chen(a)intel.com> Gerrit-Reviewer: Kedar J. Karanje <kedar.j.karanje(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Gaggery Tsai <gaggery.tsai(a)intel.com> Gerrit-Attention: Kedar J. Karanje <kedar.j.karanje(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kane Chen <kane.chen(a)intel.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: drivers/intel/fsp2_0: Add support for locating specific HOB instance
by Felix Held (Code Review) 26 Oct '22

26 Oct '22

Attention is currently required from: Martin L Roth, Marshall Dawson, Nikolai Vyssotski, Andrey Petrov, Matt Papageorge, Patrick Rudolph. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51061 ) Change subject: drivers/intel/fsp2_0: Add support for locating specific HOB instance ...................................................................... Patch Set 4: (1 comment) Patchset: PS1: > have a look at find_resource_hob_by_guid above this comment still applies. if you want me to have a look into this and update the patch accordingly, i could do that -- To view, visit https://review.coreboot.org/c/coreboot/+/51061 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I695f0d1574a59e65f01d12561a2c2f6142cac44d Gerrit-Change-Number: 51061 Gerrit-PatchSet: 4 Gerrit-Owner: Matt Papageorge <matthewpapa07(a)gmail.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Nikolai Vyssotski <nikolai.vyssotski(a)amd.corp-partner.google.com> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Matt Papageorge <matthewpapa07(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Wed, 26 Oct 2022 16:52:29 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: lint/checkpatch: consider leading + in the line length limit check
by Michael Niewöhner (Code Review) 26 Oct '22

26 Oct '22

Attention is currently required from: Felix Singer, Martin L Roth, Tim Wawrzynczak, Angel Pons. Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68869 ) Change subject: lint/checkpatch: consider leading + in the line length limit check ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/68869/comment/f3f7f6dc_3250ab95 PS1, Line 12: for the is one character longer > is one character shorter than the content? so it needs to be bumped by 1 oops, something went wrong :D rephrased -- To view, visit https://review.coreboot.org/c/coreboot/+/68869 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8da45bb0d5fbe7d0e12c8b181cf01e5685186bf6 Gerrit-Change-Number: 68869 Gerrit-PatchSet: 2 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Wed, 26 Oct 2022 16:44:59 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-MessageType: comment

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[S] Change in coreboot[master]: lint/checkpatch: consider leading + in the line length limit check
by Michael Niewöhner (Code Review) 26 Oct '22

26 Oct '22

Attention is currently required from: Felix Singer, Martin L Roth, Angel Pons, Michael Niewöhner. Hello Felix Singer, build bot (Jenkins), Martin L Roth, Tim Wawrzynczak, Angel Pons, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/68869 to look at the new patch set (#2). Change subject: lint/checkpatch: consider leading + in the line length limit check ...................................................................... lint/checkpatch: consider leading + in the line length limit check The line length limit in coreboot's coding style guidelines applies to the final file, while checkpatch currently checks the patch line length. Since patches´ lines start with a `+` (only added content is checked), the line length being checked is one character longer than the actual content. Increase max_line_length by 1 to take this into account. Change-Id: I8da45bb0d5fbe7d0e12c8b181cf01e5685186bf6 Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de> --- M util/lint/checkpatch.pl 1 file changed, 19 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/69/68869/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/68869 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8da45bb0d5fbe7d0e12c8b181cf01e5685186bf6 Gerrit-Change-Number: 68869 Gerrit-PatchSet: 2 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: src/drivers: Clean up includes
by Felix Held (Code Review) 26 Oct '22

26 Oct '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/68206 ) Change subject: src/drivers: Clean up includes ...................................................................... src/drivers: Clean up includes Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> Change-Id: Ia40678019b2a54deb246dbfbf33ec37a8c3839e4 Reviewed-on: https://review.coreboot.org/c/coreboot/+/68206 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Martin Roth <martin.roth(a)amd.corp-partner.google.com> --- M src/drivers/intel/gma/edid.h M src/drivers/mipi/panel.c M src/drivers/pc80/pc/i8259.c M src/drivers/pc80/rtc/mc146818rtc_boot.c M src/drivers/spi/bitbang.c M src/drivers/uart/uart8250io.c 6 files changed, 23 insertions(+), 2 deletions(-) Approvals: build bot (Jenkins): Verified Martin Roth: Looks good to me, approved diff --git a/src/drivers/intel/gma/edid.h b/src/drivers/intel/gma/edid.h index 90d4c01..ee4906b 100644 --- a/src/drivers/intel/gma/edid.h +++ b/src/drivers/intel/gma/edid.h @@ -1,4 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include <stdint.h> + void intel_gmbus_read_edid(u8 *gmbus_mmio, u8 bus, u8 slave, u8 *edid, u32 edid_size); void intel_gmbus_stop(u8 *gmbus_mmio); diff --git a/src/drivers/mipi/panel.c b/src/drivers/mipi/panel.c index 9646eca..7279d17 100644 --- a/src/drivers/mipi/panel.c +++ b/src/drivers/mipi/panel.c @@ -3,6 +3,7 @@ #include <console/console.h> #include <delay.h> #include <mipi/panel.h> +#include <types.h> enum cb_err mipi_panel_parse_init_commands(const void *buf, mipi_cmd_func_t cmd_func) { diff --git a/src/drivers/pc80/pc/i8259.c b/src/drivers/pc80/pc/i8259.c index c6aaef3..450f174 100644 --- a/src/drivers/pc80/pc/i8259.c +++ b/src/drivers/pc80/pc/i8259.c @@ -3,6 +3,7 @@ #include <arch/io.h> #include <pc80/i8259.h> #include <console/console.h> +#include <stdint.h> /* Read the current PIC IRQ mask */ u16 pic_read_irq_mask(void) diff --git a/src/drivers/pc80/rtc/mc146818rtc_boot.c b/src/drivers/pc80/rtc/mc146818rtc_boot.c index 550a602..6780c3a 100644 --- a/src/drivers/pc80/rtc/mc146818rtc_boot.c +++ b/src/drivers/pc80/rtc/mc146818rtc_boot.c @@ -1,9 +1,9 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <stdint.h> #include <console/console.h> -#include <pc80/mc146818rtc.h> #include <fallback.h> +#include <pc80/mc146818rtc.h> +#include <stdint.h> #if CONFIG_MAX_REBOOT_CNT > 15 #error "CONFIG_MAX_REBOOT_CNT too high" diff --git a/src/drivers/spi/bitbang.c b/src/drivers/spi/bitbang.c index 168ec64..8cb4b86 100644 --- a/src/drivers/spi/bitbang.c +++ b/src/drivers/spi/bitbang.c @@ -3,6 +3,7 @@ #include <console/console.h> #include <delay.h> #include <spi_bitbang.h> +#include <types.h> /* Set to 1 to dump all SPI transfers to the UART. */ #define TRACE 0 diff --git a/src/drivers/uart/uart8250io.c b/src/drivers/uart/uart8250io.c index 79df37c..7ca2452 100644 --- a/src/drivers/uart/uart8250io.c +++ b/src/drivers/uart/uart8250io.c @@ -2,7 +2,10 @@ #include <arch/io.h> #include <boot/coreboot_tables.h> +#include <commonlib/bsd/helpers.h> #include <console/uart.h> +#include <stdint.h> + #include "uart8250reg.h" /* Should support 8250, 16450, 16550, 16550A type UARTs */ -- To view, visit https://review.coreboot.org/c/coreboot/+/68206 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia40678019b2a54deb246dbfbf33ec37a8c3839e4 Gerrit-Change-Number: 68206 Gerrit-PatchSet: 4 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: src/device: Clean up includes
by Felix Held (Code Review) 26 Oct '22

26 Oct '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/68205 ) Change subject: src/device: Clean up includes ...................................................................... src/device: Clean up includes Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> Change-Id: Idd78271f2158bdc29ce9ac8d81f46ad8cbe84c5e Reviewed-on: https://review.coreboot.org/c/coreboot/+/68205 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Martin Roth <martin.roth(a)amd.corp-partner.google.com> --- M src/device/cardbus_device.c M src/device/cpu_device.c M src/device/device_util.c M src/device/dram/spd.c M src/device/gpio.c M src/device/i2c_bus.c M src/device/mmio.c M src/device/oprom/realmode/x86.h M src/device/pci_class.c M src/device/pcix_device.c M src/device/pnp_device.c M src/device/resource_allocator_common.c M src/device/resource_allocator_v4.c 13 files changed, 33 insertions(+), 4 deletions(-) Approvals: build bot (Jenkins): Verified Martin Roth: Looks good to me, approved diff --git a/src/device/cardbus_device.c b/src/device/cardbus_device.c index b014946..23f24dd 100644 --- a/src/device/cardbus_device.c +++ b/src/device/cardbus_device.c @@ -5,6 +5,7 @@ #include <device/pci.h> #include <device/pci_ops.h> #include <device/cardbus.h> +#include <types.h> /* * I don't think this code is quite correct but it is close. diff --git a/src/device/cpu_device.c b/src/device/cpu_device.c index 4ca5f97..51a1994 100644 --- a/src/device/cpu_device.c +++ b/src/device/cpu_device.c @@ -2,6 +2,7 @@ #include <device/device.h> #include <console/console.h> +#include <stddef.h> struct device *add_cpu_device(struct bus *cpu_bus, unsigned int apic_id, int enabled) diff --git a/src/device/device_util.c b/src/device/device_util.c index 6919f4b..9beb2ce 100644 --- a/src/device/device_util.c +++ b/src/device/device_util.c @@ -1,13 +1,14 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include <commonlib/bsd/helpers.h> #include <console/console.h> #include <device/device.h> #include <device/path.h> #include <device/pci_def.h> #include <device/resource.h> -#include <stdbool.h> #include <stdlib.h> #include <string.h> +#include <types.h> /** * Given a Local APIC ID, find the device structure. diff --git a/src/device/dram/spd.c b/src/device/dram/spd.c index b6246ae..deff674 100644 --- a/src/device/dram/spd.c +++ b/src/device/dram/spd.c @@ -2,6 +2,7 @@ #include <device/dram/spd.h> #include <spd.h> +#include <stddef.h> const char *spd_manufacturer_name(const uint16_t mod_id) { diff --git a/src/device/gpio.c b/src/device/gpio.c index 5e71497..96cedda 100644 --- a/src/device/gpio.c +++ b/src/device/gpio.c @@ -3,6 +3,7 @@ #include <console/console.h> #include <device/device.h> #include <device/gpio.h> +#include <stddef.h> const struct gpio_operations *dev_get_gpio_ops(struct device *dev) { diff --git a/src/device/i2c_bus.c b/src/device/i2c_bus.c index f0d7dd1..361bb67 100644 --- a/src/device/i2c_bus.c +++ b/src/device/i2c_bus.c @@ -1,10 +1,12 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <stdint.h> +#include <commonlib/bsd/helpers.h> #include <console/console.h> +#include <device/device.h> #include <device/smbus.h> #include <device/i2c_bus.h> #include <commonlib/endian.h> +#include <types.h> bool i2c_dev_detect(struct device *dev, unsigned int addr) { diff --git a/src/device/mmio.c b/src/device/mmio.c index de8c8d3..b62805a 100644 --- a/src/device/mmio.c +++ b/src/device/mmio.c @@ -1,7 +1,9 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <assert.h> +#include <commonlib/bsd/helpers.h> #include <device/mmio.h> +#include <types.h> /* Helper functions for various MMIO access patterns. */ diff --git a/src/device/oprom/realmode/x86.h b/src/device/oprom/realmode/x86.h index 36a28af..b0efe90 100644 --- a/src/device/oprom/realmode/x86.h +++ b/src/device/oprom/realmode/x86.h @@ -4,6 +4,7 @@ #define __DEVICE_OPROM_REALMODE_X86_H__ #include <arch/cpu.h> +#include <stdint.h> #define REALMODE_BASE ((void *)0x600) diff --git a/src/device/pci_class.c b/src/device/pci_class.c index 460d853..c5630f7 100644 --- a/src/device/pci_class.c +++ b/src/device/pci_class.c @@ -1,8 +1,10 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include <commonlib/bsd/helpers.h> #include <device/device.h> #include <device/pci.h> #include <device/pci_ops.h> +#include <stddef.h> typedef struct { const unsigned char subclass_id; diff --git a/src/device/pcix_device.c b/src/device/pcix_device.c index 8bf5225..5593357f 100644 --- a/src/device/pcix_device.c +++ b/src/device/pcix_device.c @@ -5,6 +5,7 @@ #include <device/pci.h> #include <device/pci_ops.h> #include <device/pcix.h> +#include <stdint.h> static void pcix_tune_dev(struct device *dev) { diff --git a/src/device/pnp_device.c b/src/device/pnp_device.c index 85daec7..9405d88 100644 --- a/src/device/pnp_device.c +++ b/src/device/pnp_device.c @@ -1,10 +1,10 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <console/console.h> -#include <stdint.h> #include <arch/io.h> +#include <console/console.h> #include <device/device.h> #include <device/pnp.h> +#include <stdint.h> /* PNP config mode wrappers */ diff --git a/src/device/resource_allocator_common.c b/src/device/resource_allocator_common.c index 1cb1895..fe1aae3 100644 --- a/src/device/resource_allocator_common.c +++ b/src/device/resource_allocator_common.c @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <device/device.h> +#include <stddef.h> struct pick_largest_state { struct resource *last; diff --git a/src/device/resource_allocator_v4.c b/src/device/resource_allocator_v4.c index 222f1e9..6e4aa5e 100644 --- a/src/device/resource_allocator_v4.c +++ b/src/device/resource_allocator_v4.c @@ -1,9 +1,11 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include <commonlib/bsd/helpers.h> #include <console/console.h> #include <device/device.h> #include <memrange.h> #include <post.h> +#include <types.h> static const char *resource2str(const struct resource *res) { -- To view, visit https://review.coreboot.org/c/coreboot/+/68205 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Idd78271f2158bdc29ce9ac8d81f46ad8cbe84c5e Gerrit-Change-Number: 68205 Gerrit-PatchSet: 3 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: cpu/x86: Clean up includes
by Felix Held (Code Review) 26 Oct '22

26 Oct '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/68204 ) Change subject: cpu/x86: Clean up includes ...................................................................... cpu/x86: Clean up includes Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> Change-Id: I01c6651079333686cb0eb68e89e56d7907868124 Reviewed-on: https://review.coreboot.org/c/coreboot/+/68204 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Martin Roth <martin.roth(a)amd.corp-partner.google.com> --- M src/cpu/x86/backup_default_smm.c M src/cpu/x86/lapic/boot_cpu.c M src/cpu/x86/lapic/lapic.c M src/cpu/x86/lapic/lapic_cpu_stop.c M src/cpu/x86/mtrr/debug.c M src/cpu/x86/mtrr/earlymtrr.c M src/cpu/x86/smi_trigger.c M src/cpu/x86/smm/save_state.c M src/cpu/x86/smm/smm_module_handler.c M src/cpu/x86/tsc/delay_tsc.c 10 files changed, 31 insertions(+), 9 deletions(-) Approvals: build bot (Jenkins): Verified Martin Roth: Looks good to me, approved diff --git a/src/cpu/x86/backup_default_smm.c b/src/cpu/x86/backup_default_smm.c index 1672e0b..a574237 100644 --- a/src/cpu/x86/backup_default_smm.c +++ b/src/cpu/x86/backup_default_smm.c @@ -1,10 +1,10 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <string.h> #include <acpi/acpi.h> -#include <console/console.h> #include <cbmem.h> +#include <console/console.h> #include <cpu/x86/smm.h> +#include <string.h> void *backup_default_smm_area(void) { diff --git a/src/cpu/x86/lapic/boot_cpu.c b/src/cpu/x86/lapic/boot_cpu.c index cf220d5..fd70870 100644 --- a/src/cpu/x86/lapic/boot_cpu.c +++ b/src/cpu/x86/lapic/boot_cpu.c @@ -1,8 +1,8 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <smp/node.h> -#include <cpu/x86/msr.h> #include <cpu/x86/lapic_def.h> +#include <cpu/x86/msr.h> +#include <smp/node.h> #if CONFIG(SMP) int boot_cpu(void) diff --git a/src/cpu/x86/lapic/lapic.c b/src/cpu/x86/lapic/lapic.c index 2d04fb3..24d2e37 100644 --- a/src/cpu/x86/lapic/lapic.c +++ b/src/cpu/x86/lapic/lapic.c @@ -1,13 +1,13 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <assert.h> +#include <console/console.h> #include <cpu/cpu.h> #include <cpu/x86/lapic.h> #include <cpu/x86/lapic_def.h> #include <cpu/x86/msr.h> -#include <console/console.h> #include <smp/node.h> -#include <stdint.h> +#include <types.h> void enable_lapic_mode(bool try_set_x2apic) { diff --git a/src/cpu/x86/lapic/lapic_cpu_stop.c b/src/cpu/x86/lapic/lapic_cpu_stop.c index 1affe15..6eacba6 100644 --- a/src/cpu/x86/lapic/lapic_cpu_stop.c +++ b/src/cpu/x86/lapic/lapic_cpu_stop.c @@ -4,6 +4,7 @@ #include <cpu/x86/lapic.h> #include <delay.h> #include <halt.h> +#include <stdint.h> /** * Sending INIT IPI to self is equivalent of asserting #INIT with a bit of diff --git a/src/cpu/x86/mtrr/debug.c b/src/cpu/x86/mtrr/debug.c index 4ecae06..a3e40d3 100644 --- a/src/cpu/x86/mtrr/debug.c +++ b/src/cpu/x86/mtrr/debug.c @@ -2,6 +2,7 @@ #include <console/console.h> #include <cpu/cpu.h> +#include <cpu/x86/msr.h> #include <cpu/x86/mtrr.h> #include <stdint.h> diff --git a/src/cpu/x86/mtrr/earlymtrr.c b/src/cpu/x86/mtrr/earlymtrr.c index 2c14a70..aa430d5 100644 --- a/src/cpu/x86/mtrr/earlymtrr.c +++ b/src/cpu/x86/mtrr/earlymtrr.c @@ -5,7 +5,7 @@ #include <cpu/x86/msr.h> #include <console/console.h> #include <commonlib/bsd/helpers.h> -#include <stdint.h> +#include <types.h> /* Get first available variable MTRR. * Returns var# if available, else returns -1. diff --git a/src/cpu/x86/smi_trigger.c b/src/cpu/x86/smi_trigger.c index e4c6dc9..470ecde 100644 --- a/src/cpu/x86/smi_trigger.c +++ b/src/cpu/x86/smi_trigger.c @@ -3,6 +3,7 @@ #include <arch/io.h> #include <console/console.h> #include <cpu/x86/smm.h> +#include <stdint.h> static void apmc_log(const char *fn, u8 cmd) { diff --git a/src/cpu/x86/smm/save_state.c b/src/cpu/x86/smm/save_state.c index bb08f86..d8c44a8 100644 --- a/src/cpu/x86/smm/save_state.c +++ b/src/cpu/x86/smm/save_state.c @@ -1,7 +1,9 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <cpu/x86/smm.h> +#include <commonlib/bsd/helpers.h> #include <cpu/x86/save_state.h> +#include <cpu/x86/smm.h> +#include <types.h> /* These are weakly linked such that platforms can link only the save state ops they actually require. */ diff --git a/src/cpu/x86/smm/smm_module_handler.c b/src/cpu/x86/smm/smm_module_handler.c index e18a26a..e813f78 100644 --- a/src/cpu/x86/smm/smm_module_handler.c +++ b/src/cpu/x86/smm/smm_module_handler.c @@ -1,11 +1,14 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <arch/io.h> +#include <commonlib/bsd/compiler.h> +#include <commonlib/region.h> #include <console/cbmem_console.h> #include <console/console.h> -#include <commonlib/region.h> +#include <cpu/cpu.h> #include <cpu/x86/smm.h> #include <rmodule.h> +#include <types.h> #if CONFIG(SPI_FLASH_SMM) #include <spi-generic.h> diff --git a/src/cpu/x86/tsc/delay_tsc.c b/src/cpu/x86/tsc/delay_tsc.c index 9607c2c..978a6ee 100644 --- a/src/cpu/x86/tsc/delay_tsc.c +++ b/src/cpu/x86/tsc/delay_tsc.c @@ -3,6 +3,7 @@ #include <arch/cpu.h> #include <cpu/x86/tsc.h> #include <delay.h> +#include <stdint.h> #include <thread.h> void init_timer(void) -- To view, visit https://review.coreboot.org/c/coreboot/+/68204 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I01c6651079333686cb0eb68e89e56d7907868124 Gerrit-Change-Number: 68204 Gerrit-PatchSet: 4 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: cpu/x86/mp_init.c: Use linked list data structures
by Tim Wawrzynczak (Code Review) 26 Oct '22

26 Oct '22

Attention is currently required from: Paul Menzel, Angel Pons, Arthur Heymans, Eric Lai, Felix Held. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/64340 ) Change subject: cpu/x86/mp_init.c: Use linked list data structures ...................................................................... Patch Set 4: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/64340 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie728110fc8c60fec94ae4bedf74e17740cf78f67 Gerrit-Change-Number: 64340 Gerrit-PatchSet: 4 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Eric Lai <eric_lai(a)quanta.corp-partner.google.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Wed, 26 Oct 2022 16:37:30 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[master]: cpu/intel: Clean up includes
by Felix Held (Code Review) 26 Oct '22

26 Oct '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/68203 ) Change subject: cpu/intel: Clean up includes ...................................................................... cpu/intel: Clean up includes Signed-off-by: Elyes Haouas <ehaouas(a)noos.fr> Change-Id: Ie760711916c49d275ca49d94b9597fd24b5e7628 Reviewed-on: https://review.coreboot.org/c/coreboot/+/68203 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Martin Roth <martin.roth(a)amd.corp-partner.google.com> --- M src/cpu/intel/car/bootblock.c M src/cpu/intel/common/common_init.c M src/cpu/intel/microcode/microcode.c M src/cpu/intel/model_f3x/model_f3x_init.c 4 files changed, 25 insertions(+), 10 deletions(-) Approvals: build bot (Jenkins): Verified Martin Roth: Looks good to me, approved diff --git a/src/cpu/intel/car/bootblock.c b/src/cpu/intel/car/bootblock.c index dd9a772..c53379b 100644 --- a/src/cpu/intel/car/bootblock.c +++ b/src/cpu/intel/car/bootblock.c @@ -1,8 +1,9 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <bootblock_common.h> #include <arch/bootblock.h> +#include <bootblock_common.h> #include <cpu/x86/bist.h> +#include <stdint.h> static uint32_t saved_bist; diff --git a/src/cpu/intel/common/common_init.c b/src/cpu/intel/common/common_init.c index 4d6df84..3a06281 100644 --- a/src/cpu/intel/common/common_init.c +++ b/src/cpu/intel/common/common_init.c @@ -4,8 +4,10 @@ #include <arch/cpu.h> #include <console/console.h> #include <cpu/intel/msr.h> -#include <cpu/x86/msr.h> #include <cpu/intel/turbo.h> +#include <cpu/x86/msr.h> +#include <types.h> + #include "common.h" #define CPUID_6_ECX_EPB (1 << 3) diff --git a/src/cpu/intel/microcode/microcode.c b/src/cpu/intel/microcode/microcode.c index bb2edfa..ac9453f 100644 --- a/src/cpu/intel/microcode/microcode.c +++ b/src/cpu/intel/microcode/microcode.c @@ -2,14 +2,13 @@ /* Microcode update for Intel PIII and later CPUs */ -#include <stdint.h> -#include <stddef.h> -#include <cbfs.h> #include <arch/cpu.h> +#include <cbfs.h> #include <console/console.h> -#include <cpu/x86/msr.h> #include <cpu/intel/microcode.h> +#include <cpu/x86/msr.h> #include <smp/spinlock.h> +#include <types.h> DECLARE_SPIN_LOCK(microcode_lock) diff --git a/src/cpu/intel/model_f3x/model_f3x_init.c b/src/cpu/intel/model_f3x/model_f3x_init.c index fdc5a1e..198490f 100644 --- a/src/cpu/intel/model_f3x/model_f3x_init.c +++ b/src/cpu/intel/model_f3x/model_f3x_init.c @@ -1,12 +1,12 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <device/device.h> #include <cpu/cpu.h> -#include <cpu/x86/mtrr.h> -#include <cpu/intel/microcode.h> -#include <cpu/intel/hyperthreading.h> #include <cpu/intel/common/common.h> +#include <cpu/intel/hyperthreading.h> +#include <cpu/intel/microcode.h> #include <cpu/x86/cache.h> +#include <cpu/x86/mtrr.h> +#include <device/device.h> static void model_f3x_init(struct device *cpu) { -- To view, visit https://review.coreboot.org/c/coreboot/+/68203 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie760711916c49d275ca49d94b9597fd24b5e7628 Gerrit-Change-Number: 68203 Gerrit-PatchSet: 3 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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