coreboot-gerrit October 2022

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[M] Change in coreboot[master]: common/acpi/dptc: Dynamic Thermal Table Switching Proposal
by Raul Rangel (Code Review) 27 Oct '22

27 Oct '22

Attention is currently required from: Jason Glenesk, EricKY Cheng, Matt DeVillier, Eric Peers, Fred Reitberger, Karthikeyan Ramasubramanian, Felix Held. Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68471 ) Change subject: common/acpi/dptc: Dynamic Thermal Table Switching Proposal ...................................................................... Patch Set 12: (1 comment) File src/soc/amd/common/acpi/dptc.asl: https://review.coreboot.org/c/coreboot/+/68471/comment/60d8d77d_c48dcd85 PS12, Line 51: 0x76 Please use decimal values instead of hex -- To view, visit https://review.coreboot.org/c/coreboot/+/68471 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I866e5e497e2936984e713029b5f0b6d54cbc9622 Gerrit-Change-Number: 68471 Gerrit-PatchSet: 12 Gerrit-Owner: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Gerrit-Reviewer: Eric Peers <epeers(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Karthikeyan Ramasubramanian <kramasub(a)chromium.org> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Eric Peers <epeers(a)google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Karthikeyan Ramasubramanian <kramasub(a)chromium.org> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Wed, 26 Oct 2022 22:11:04 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/amd/mandolin: handle invalid intr_index values in init_tables
by Felix Held (Code Review) 27 Oct '22

27 Oct '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/68848 ) Change subject: mb/amd/mandolin: handle invalid intr_index values in init_tables ...................................................................... mb/amd/mandolin: handle invalid intr_index values in init_tables Make sure that the intr_index is valid to avoid out-of-bounds writes to the fch_pic_routing and fch_apic_routing arrays. Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: I45ab115f3814b212243c4f6cf706daf77b6ff3b2 Reviewed-on: https://review.coreboot.org/c/coreboot/+/68848 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Fred Reitberger <reitbergerfred(a)gmail.com> --- M src/mainboard/amd/mandolin/mainboard.c 1 file changed, 22 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Fred Reitberger: Looks good to me, approved diff --git a/src/mainboard/amd/mandolin/mainboard.c b/src/mainboard/amd/mandolin/mainboard.c index 1eb3329..397179a 100644 --- a/src/mainboard/amd/mandolin/mainboard.c +++ b/src/mainboard/amd/mandolin/mainboard.c @@ -69,6 +69,12 @@ memset(fch_apic_routing, PIRQ_NC, sizeof(fch_apic_routing)); for (i = 0; i < mb_fch_irq_mapping_table_size; i++) { + if (mb_irq_map[i].intr_index >= FCH_IRQ_ROUTING_ENTRIES) { + printk(BIOS_WARNING, + "Invalid IRQ index %u in FCH IRQ routing table entry %zu\n", + mb_irq_map[i].intr_index, i); + continue; + } fch_pic_routing[mb_irq_map[i].intr_index] = mb_irq_map[i].pic_irq_num; fch_apic_routing[mb_irq_map[i].intr_index] = mb_irq_map[i].apic_irq_num; } -- To view, visit https://review.coreboot.org/c/coreboot/+/68848 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I45ab115f3814b212243c4f6cf706daf77b6ff3b2 Gerrit-Change-Number: 68848 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: mb/amd/mandolin: introduce mb_get_fch_irq_mapping
by Felix Held (Code Review) 27 Oct '22

27 Oct '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/68847 ) Change subject: mb/amd/mandolin: introduce mb_get_fch_irq_mapping ...................................................................... mb/amd/mandolin: introduce mb_get_fch_irq_mapping Introduce mb_get_fch_irq_mapping to access the FCH IRQ routing mapping information and use it in init_tables to get the mapping instead of directly accessing the array's contents. This is a preparation to move the init_tables implementation to the common AMD SoC code in a later patch. Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: I9c39ea9de5ebbf70d2c5a87bfdfe270796548c5c Reviewed-on: https://review.coreboot.org/c/coreboot/+/68847 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Fred Reitberger <reitbergerfred(a)gmail.com> --- M src/mainboard/amd/mandolin/mainboard.c 1 file changed, 33 insertions(+), 6 deletions(-) Approvals: build bot (Jenkins): Verified Fred Reitberger: Looks good to me, approved diff --git a/src/mainboard/amd/mandolin/mainboard.c b/src/mainboard/amd/mandolin/mainboard.c index 6c4e545..1eb3329 100644 --- a/src/mainboard/amd/mandolin/mainboard.c +++ b/src/mainboard/amd/mandolin/mainboard.c @@ -51,18 +51,26 @@ { PIRQ_MISC2, 0x00, 0x00 }, }; +static const struct fch_irq_routing *mb_get_fch_irq_mapping(size_t *length) +{ + *length = ARRAY_SIZE(fch_irq_map); + return fch_irq_map; +} + static void init_tables(void) { - const struct fch_irq_routing *entry; - int i; + const struct fch_irq_routing *mb_irq_map; + size_t mb_fch_irq_mapping_table_size; + size_t i; + + mb_irq_map = mb_get_fch_irq_mapping(&mb_fch_irq_mapping_table_size); memset(fch_pic_routing, PIRQ_NC, sizeof(fch_pic_routing)); memset(fch_apic_routing, PIRQ_NC, sizeof(fch_apic_routing)); - for (i = 0; i < ARRAY_SIZE(fch_irq_map); i++) { - entry = fch_irq_map + i; - fch_pic_routing[entry->intr_index] = entry->pic_irq_num; - fch_apic_routing[entry->intr_index] = entry->apic_irq_num; + for (i = 0; i < mb_fch_irq_mapping_table_size; i++) { + fch_pic_routing[mb_irq_map[i].intr_index] = mb_irq_map[i].pic_irq_num; + fch_apic_routing[mb_irq_map[i].intr_index] = mb_irq_map[i].apic_irq_num; } } -- To view, visit https://review.coreboot.org/c/coreboot/+/68847 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9c39ea9de5ebbf70d2c5a87bfdfe270796548c5c Gerrit-Change-Number: 68847 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[M] Change in coreboot[master]: mb/amd,google: unify fch_irq_routing struct instance name
by Felix Held (Code Review) 27 Oct '22

27 Oct '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/68846 ) Change subject: mb/amd,google: unify fch_irq_routing struct instance name ...................................................................... mb/amd,google: unify fch_irq_routing struct instance name Use the same fch_irq_map name in all mainboards using the Picasso, Cezanne, Mendocino and Morgana instead of using a mainboard-specific name. Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: I035cffb9c6c8afd6bd115831e8eed4a395e2a7fc Reviewed-on: https://review.coreboot.org/c/coreboot/+/68846 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Fred Reitberger <reitbergerfred(a)gmail.com> --- M src/mainboard/amd/bilby/mainboard.c M src/mainboard/amd/birman/mainboard.c M src/mainboard/amd/chausie/mainboard.c M src/mainboard/amd/majolica/mainboard.c M src/mainboard/amd/mandolin/mainboard.c M src/mainboard/google/guybrush/mainboard.c M src/mainboard/google/skyrim/mainboard.c M src/mainboard/google/zork/mainboard.c 8 files changed, 41 insertions(+), 24 deletions(-) Approvals: build bot (Jenkins): Verified Fred Reitberger: Looks good to me, approved diff --git a/src/mainboard/amd/bilby/mainboard.c b/src/mainboard/amd/bilby/mainboard.c index c931053..c594a90 100644 --- a/src/mainboard/amd/bilby/mainboard.c +++ b/src/mainboard/amd/bilby/mainboard.c @@ -31,7 +31,7 @@ static uint8_t fch_pic_routing[FCH_IRQ_ROUTING_ENTRIES]; static uint8_t fch_apic_routing[FCH_IRQ_ROUTING_ENTRIES]; -static const struct fch_irq_routing bilby_fch[] = { +static const struct fch_irq_routing fch_irq_map[] = { { PIRQ_A, 8, 16 }, { PIRQ_B, 10, 17 }, { PIRQ_C, 11, 18 }, @@ -64,8 +64,8 @@ memset(fch_pic_routing, PIRQ_NC, sizeof(fch_pic_routing)); memset(fch_apic_routing, PIRQ_NC, sizeof(fch_apic_routing)); - for (i = 0; i < ARRAY_SIZE(bilby_fch); i++) { - entry = bilby_fch + i; + for (i = 0; i < ARRAY_SIZE(fch_irq_map); i++) { + entry = fch_irq_map + i; fch_pic_routing[entry->intr_index] = entry->pic_irq_num; fch_apic_routing[entry->intr_index] = entry->apic_irq_num; } diff --git a/src/mainboard/amd/birman/mainboard.c b/src/mainboard/amd/birman/mainboard.c index 8b27e37..4c641f5 100644 --- a/src/mainboard/amd/birman/mainboard.c +++ b/src/mainboard/amd/birman/mainboard.c @@ -31,7 +31,7 @@ * 8: rtc0 <- soc/amd/common/acpi/lpc.asl * 9: acpi <- soc/amd/common/acpi/lpc.asl */ -static const struct fch_irq_routing birman_fch[] = { +static const struct fch_irq_routing fch_irq_map[] = { { PIRQ_A, 12, PIRQ_NC }, { PIRQ_B, 14, PIRQ_NC }, { PIRQ_C, 15, PIRQ_NC }, @@ -68,8 +68,8 @@ memset(fch_pic_routing, PIRQ_NC, sizeof(fch_pic_routing)); memset(fch_apic_routing, PIRQ_NC, sizeof(fch_apic_routing)); - for (i = 0; i < ARRAY_SIZE(birman_fch); i++) { - entry = birman_fch + i; + for (i = 0; i < ARRAY_SIZE(fch_irq_map); i++) { + entry = fch_irq_map + i; fch_pic_routing[entry->intr_index] = entry->pic_irq_num; fch_apic_routing[entry->intr_index] = entry->apic_irq_num; } diff --git a/src/mainboard/amd/chausie/mainboard.c b/src/mainboard/amd/chausie/mainboard.c index 0318e43..c014236 100644 --- a/src/mainboard/amd/chausie/mainboard.c +++ b/src/mainboard/amd/chausie/mainboard.c @@ -29,7 +29,7 @@ * 8: rtc0 <- soc/amd/common/acpi/lpc.asl * 9: acpi <- soc/amd/common/acpi/lpc.asl */ -static const struct fch_irq_routing chausie_fch[] = { +static const struct fch_irq_routing fch_irq_map[] = { { PIRQ_A, 12, PIRQ_NC }, { PIRQ_B, 14, PIRQ_NC }, { PIRQ_C, 15, PIRQ_NC }, @@ -66,8 +66,8 @@ memset(fch_pic_routing, PIRQ_NC, sizeof(fch_pic_routing)); memset(fch_apic_routing, PIRQ_NC, sizeof(fch_apic_routing)); - for (i = 0; i < ARRAY_SIZE(chausie_fch); i++) { - entry = chausie_fch + i; + for (i = 0; i < ARRAY_SIZE(fch_irq_map); i++) { + entry = fch_irq_map + i; fch_pic_routing[entry->intr_index] = entry->pic_irq_num; fch_apic_routing[entry->intr_index] = entry->apic_irq_num; } diff --git a/src/mainboard/amd/majolica/mainboard.c b/src/mainboard/amd/majolica/mainboard.c index 32b29e4..31ac515 100644 --- a/src/mainboard/amd/majolica/mainboard.c +++ b/src/mainboard/amd/majolica/mainboard.c @@ -28,7 +28,7 @@ * 8: rtc0 <- soc/amd/common/acpi/lpc.asl * 9: acpi <- soc/amd/common/acpi/lpc.asl */ -static const struct fch_irq_routing majolica_fch[] = { +static const struct fch_irq_routing fch_irq_map[] = { { PIRQ_A, 12, PIRQ_NC }, { PIRQ_B, 14, PIRQ_NC }, { PIRQ_C, 15, PIRQ_NC }, @@ -66,8 +66,8 @@ memset(fch_pic_routing, PIRQ_NC, sizeof(fch_pic_routing)); memset(fch_apic_routing, PIRQ_NC, sizeof(fch_apic_routing)); - for (i = 0; i < ARRAY_SIZE(majolica_fch); i++) { - entry = majolica_fch + i; + for (i = 0; i < ARRAY_SIZE(fch_irq_map); i++) { + entry = fch_irq_map + i; fch_pic_routing[entry->intr_index] = entry->pic_irq_num; fch_apic_routing[entry->intr_index] = entry->apic_irq_num; } diff --git a/src/mainboard/amd/mandolin/mainboard.c b/src/mainboard/amd/mandolin/mainboard.c index 43fa415..6c4e545 100644 --- a/src/mainboard/amd/mandolin/mainboard.c +++ b/src/mainboard/amd/mandolin/mainboard.c @@ -26,7 +26,7 @@ static uint8_t fch_pic_routing[FCH_IRQ_ROUTING_ENTRIES]; static uint8_t fch_apic_routing[FCH_IRQ_ROUTING_ENTRIES]; -static const struct fch_irq_routing mandolin_fch[] = { +static const struct fch_irq_routing fch_irq_map[] = { { PIRQ_A, 8, 16 }, { PIRQ_B, 10, 17 }, { PIRQ_C, 11, 18 }, @@ -59,8 +59,8 @@ memset(fch_pic_routing, PIRQ_NC, sizeof(fch_pic_routing)); memset(fch_apic_routing, PIRQ_NC, sizeof(fch_apic_routing)); - for (i = 0; i < ARRAY_SIZE(mandolin_fch); i++) { - entry = mandolin_fch + i; + for (i = 0; i < ARRAY_SIZE(fch_irq_map); i++) { + entry = fch_irq_map + i; fch_pic_routing[entry->intr_index] = entry->pic_irq_num; fch_apic_routing[entry->intr_index] = entry->apic_irq_num; } diff --git a/src/mainboard/google/guybrush/mainboard.c b/src/mainboard/google/guybrush/mainboard.c index d3a45c1..150835c 100644 --- a/src/mainboard/google/guybrush/mainboard.c +++ b/src/mainboard/google/guybrush/mainboard.c @@ -44,7 +44,7 @@ * 8: rtc0 <- soc/amd/common/acpi/lpc.asl * 9: acpi <- soc/amd/common/acpi/lpc.asl */ -static const struct fch_irq_routing guybrush_fch[] = { +static const struct fch_irq_routing fch_irq_map[] = { { PIRQ_A, 12, PIRQ_NC }, { PIRQ_B, 14, PIRQ_NC }, { PIRQ_C, 15, PIRQ_NC }, @@ -82,8 +82,8 @@ memset(fch_pic_routing, PIRQ_NC, sizeof(fch_pic_routing)); memset(fch_apic_routing, PIRQ_NC, sizeof(fch_apic_routing)); - for (i = 0; i < ARRAY_SIZE(guybrush_fch); i++) { - entry = guybrush_fch + i; + for (i = 0; i < ARRAY_SIZE(fch_irq_map); i++) { + entry = fch_irq_map + i; fch_pic_routing[entry->intr_index] = entry->pic_irq_num; fch_apic_routing[entry->intr_index] = entry->apic_irq_num; } diff --git a/src/mainboard/google/skyrim/mainboard.c b/src/mainboard/google/skyrim/mainboard.c index 3ddcf42..0469c59 100644 --- a/src/mainboard/google/skyrim/mainboard.c +++ b/src/mainboard/google/skyrim/mainboard.c @@ -31,7 +31,7 @@ * 9: acpi <- soc/amd/common/acpi/lpc.asl */ -static const struct fch_irq_routing skyrim_fch[] = { +static const struct fch_irq_routing fch_irq_map[] = { { PIRQ_A, 12, PIRQ_NC }, { PIRQ_B, 14, PIRQ_NC }, { PIRQ_C, 15, PIRQ_NC }, @@ -68,8 +68,8 @@ memset(fch_pic_routing, PIRQ_NC, sizeof(fch_pic_routing)); memset(fch_apic_routing, PIRQ_NC, sizeof(fch_apic_routing)); - for (i = 0; i < ARRAY_SIZE(skyrim_fch); i++) { - entry = skyrim_fch + i; + for (i = 0; i < ARRAY_SIZE(fch_irq_map); i++) { + entry = fch_irq_map + i; fch_pic_routing[entry->intr_index] = entry->pic_irq_num; fch_apic_routing[entry->intr_index] = entry->apic_irq_num; } diff --git a/src/mainboard/google/zork/mainboard.c b/src/mainboard/google/zork/mainboard.c index bab79b4..a925851 100644 --- a/src/mainboard/google/zork/mainboard.c +++ b/src/mainboard/google/zork/mainboard.c @@ -53,7 +53,7 @@ * 9: acpi <- soc/amd/common/acpi/lpc.asl * 12: i8042 <- ec/google/chromeec/acpi/superio.asl */ -static const struct fch_irq_routing fch_pirq[] = { +static const struct fch_irq_routing fch_irq_map[] = { { PIRQ_A, 6, PIRQ_NC }, { PIRQ_B, 13, PIRQ_NC }, { PIRQ_C, 14, PIRQ_NC }, @@ -86,8 +86,8 @@ memset(fch_pic_routing, PIRQ_NC, sizeof(fch_pic_routing)); memset(fch_apic_routing, PIRQ_NC, sizeof(fch_apic_routing)); - for (i = 0; i < ARRAY_SIZE(fch_pirq); i++) { - entry = fch_pirq + i; + for (i = 0; i < ARRAY_SIZE(fch_irq_map); i++) { + entry = fch_irq_map + i; fch_pic_routing[entry->intr_index] = entry->pic_irq_num; fch_apic_routing[entry->intr_index] = entry->apic_irq_num; } -- To view, visit https://review.coreboot.org/c/coreboot/+/68846 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I035cffb9c6c8afd6bd115831e8eed4a395e2a7fc Gerrit-Change-Number: 68846 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: mb/google/guybrush,skyrim: add missing string.h include
by Felix Held (Code Review) 27 Oct '22

27 Oct '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/68845 ) Change subject: mb/google/guybrush,skyrim: add missing string.h include ...................................................................... mb/google/guybrush,skyrim: add missing string.h include string.h defines the memset function. Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: I286557d6ad83990bc101eaa930bde04345859c0b Reviewed-on: https://review.coreboot.org/c/coreboot/+/68845 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Fred Reitberger <reitbergerfred(a)gmail.com> --- M src/mainboard/google/guybrush/mainboard.c M src/mainboard/google/skyrim/mainboard.c 2 files changed, 17 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Fred Reitberger: Looks good to me, approved diff --git a/src/mainboard/google/guybrush/mainboard.c b/src/mainboard/google/guybrush/mainboard.c index bfb0f88..d3a45c1 100644 --- a/src/mainboard/google/guybrush/mainboard.c +++ b/src/mainboard/google/guybrush/mainboard.c @@ -12,6 +12,7 @@ #include <gpio.h> #include <soc/acpi.h> #include <variant/ec.h> +#include <string.h> #define BACKLIGHT_GPIO GPIO_129 #define WWAN_AUX_RST_GPIO GPIO_18 diff --git a/src/mainboard/google/skyrim/mainboard.c b/src/mainboard/google/skyrim/mainboard.c index 58e11f5..3ddcf42 100644 --- a/src/mainboard/google/skyrim/mainboard.c +++ b/src/mainboard/google/skyrim/mainboard.c @@ -6,6 +6,7 @@ #include <console/console.h> #include <device/device.h> #include <soc/acpi.h> +#include <string.h> #include <variant/ec.h> /* -- To view, visit https://review.coreboot.org/c/coreboot/+/68845 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I286557d6ad83990bc101eaa930bde04345859c0b Gerrit-Change-Number: 68845 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: mb/amd/bilby,mandolin: add missing string.h include
by Felix Held (Code Review) 27 Oct '22

27 Oct '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/68844 ) Change subject: mb/amd/bilby,mandolin: add missing string.h include ...................................................................... mb/amd/bilby,mandolin: add missing string.h include string.h defines the memset function. Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: I242a0382e7020681b6c3a25f75a2a91cbccbe815 Reviewed-on: https://review.coreboot.org/c/coreboot/+/68844 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Fred Reitberger <reitbergerfred(a)gmail.com> --- M src/mainboard/amd/bilby/mainboard.c M src/mainboard/amd/mandolin/mainboard.c 2 files changed, 17 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Fred Reitberger: Looks good to me, approved diff --git a/src/mainboard/amd/bilby/mainboard.c b/src/mainboard/amd/bilby/mainboard.c index 324c72e..c931053 100644 --- a/src/mainboard/amd/bilby/mainboard.c +++ b/src/mainboard/amd/bilby/mainboard.c @@ -9,6 +9,7 @@ #include <soc/southbridge.h> #include <soc/pci_devs.h> #include <soc/platform_descriptors.h> +#include <string.h> #include <types.h> #include <commonlib/helpers.h> #include <soc/amd/picasso/chip.h> diff --git a/src/mainboard/amd/mandolin/mainboard.c b/src/mainboard/amd/mandolin/mainboard.c index 6ae3266..43fa415 100644 --- a/src/mainboard/amd/mandolin/mainboard.c +++ b/src/mainboard/amd/mandolin/mainboard.c @@ -7,6 +7,7 @@ #include <soc/cpu.h> #include <soc/southbridge.h> #include <soc/pci_devs.h> +#include <string.h> #include <types.h> #include <commonlib/helpers.h> #include <soc/amd/picasso/chip.h> -- To view, visit https://review.coreboot.org/c/coreboot/+/68844 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I242a0382e7020681b6c3a25f75a2a91cbccbe815 Gerrit-Change-Number: 68844 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: cpu/x86/mp_init: adjust timeout for 2nd SIPI
by Felix Held (Code Review) 27 Oct '22

27 Oct '22

Attention is currently required from: Arthur Heymans, Jonathan Zhang, Angel Pons. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68262 ) Change subject: cpu/x86/mp_init: adjust timeout for 2nd SIPI ...................................................................... Patch Set 7: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/68262/comment/5ca1c252_99d160ad PS7, Line 7: 2nd i'd replace "2nd" with "final" so that this is also the correct description for the CONFIG(X86_INIT_NEED_1_SIPI) case and not only the !CONFIG(X86_INIT_NEED_1_SIPI) case -- To view, visit https://review.coreboot.org/c/coreboot/+/68262 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id958f18bdcb34d76df8aa443161123252524328e Gerrit-Change-Number: 68262 Gerrit-PatchSet: 7 Gerrit-Owner: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Wed, 26 Oct 2022 22:07:24 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[master]: [WIP] Documentation/measured_boot.md: fix SRTM/DRTM explanations
by build bot (Jenkins) (Code Review) 27 Oct '22

27 Oct '22

Attention is currently required from: Daniel P. Smith, Michał Żygowski, Maciej Pijanowski, Krystian Hebel. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68751 ) Change subject: [WIP] Documentation/measured_boot.md: fix SRTM/DRTM explanations ...................................................................... Patch Set 3: (2 comments) Commit Message: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-161428): https://review.coreboot.org/c/coreboot/+/68751/comment/82ad2183_1fd4e242 PS3, Line 12: Co-authored-by: Daniel P. Smith Non-standard signature: Co-authored-by: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-161428): https://review.coreboot.org/c/coreboot/+/68751/comment/f4aba1e9_8436cf83 PS3, Line 12: Co-authored-by: Daniel P. Smith Unrecognized email address: 'Daniel P. Smith' -- To view, visit https://review.coreboot.org/c/coreboot/+/68751 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If224dc0cf3c0515dbd18daca544c22275e96b459 Gerrit-Change-Number: 68751 Gerrit-PatchSet: 3 Gerrit-Owner: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Reviewer: Maciej Pijanowski <maciej.pijanowski(a)3mdeb.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-CC: Daniel P. Smith Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Daniel P. Smith Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Maciej Pijanowski <maciej.pijanowski(a)3mdeb.com> Gerrit-Attention: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Comment-Date: Wed, 26 Oct 2022 22:04:42 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[master]: [WIP] Documentation/measured_boot.md: document new TPM options
by Sergii Dmytruk (Code Review) 27 Oct '22

27 Oct '22

Attention is currently required from: Daniel P. Smith, Michał Żygowski, Maciej Pijanowski, Krystian Hebel. Sergii Dmytruk has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68752 ) Change subject: [WIP] Documentation/measured_boot.md: document new TPM options ...................................................................... Patch Set 5: (2 comments) File Documentation/security/vboot/measured_boot.md: https://review.coreboot.org/c/coreboot/+/68752/comment/5125e239_d48749b3 PS4, Line 238: GBB HWID by SHA-256 > Current version of documentation says it is either SHA-1 or SHA-256, has the implementation changed? Judging by the code, it can only be SHA-256 now (see `futility/misc.c`). https://review.coreboot.org/c/coreboot/+/68752/comment/468305df_a38b585c PS4, Line 246: Core > Drop `Core`. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/68752 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6dae8e95c59b440c75e13473eefc4c2cf4fd369b Gerrit-Change-Number: 68752 Gerrit-PatchSet: 5 Gerrit-Owner: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Reviewer: Maciej Pijanowski <maciej.pijanowski(a)3mdeb.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-CC: Daniel P. Smith Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Daniel P. Smith Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Maciej Pijanowski <maciej.pijanowski(a)3mdeb.com> Gerrit-Attention: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Comment-Date: Wed, 26 Oct 2022 22:04:14 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-MessageType: comment

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[M] Change in coreboot[master]: [WIP] Documentation/measured_boot.md: fix SRTM/DRTM explanations
by Sergii Dmytruk (Code Review) 27 Oct '22

27 Oct '22

Attention is currently required from: Daniel P. Smith, Michał Żygowski, Maciej Pijanowski, Krystian Hebel. Sergii Dmytruk has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68751 ) Change subject: [WIP] Documentation/measured_boot.md: fix SRTM/DRTM explanations ...................................................................... Patch Set 3: (2 comments) File Documentation/security/vboot/measured_boot.md: https://review.coreboot.org/c/coreboot/+/68751/comment/5b26a49d_ca199bb5 PS2, Line 48: measure > `measures` Done https://review.coreboot.org/c/coreboot/+/68751/comment/28e5665b_6ba8d315 PS2, Line 58: cbfs > `CBFS` Done -- To view, visit https://review.coreboot.org/c/coreboot/+/68751 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If224dc0cf3c0515dbd18daca544c22275e96b459 Gerrit-Change-Number: 68751 Gerrit-PatchSet: 3 Gerrit-Owner: Sergii Dmytruk <sergii.dmytruk(a)3mdeb.com> Gerrit-Reviewer: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Reviewer: Maciej Pijanowski <maciej.pijanowski(a)3mdeb.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-CC: Daniel P. Smith Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Daniel P. Smith Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Maciej Pijanowski <maciej.pijanowski(a)3mdeb.com> Gerrit-Attention: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Comment-Date: Wed, 26 Oct 2022 22:04:00 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-MessageType: comment

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