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build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/66909 )
Change subject: vboot: Add VBOOT_CBFS_INTEGRATION support
......................................................................
Patch Set 18:
(1 comment)
File src/security/vboot/vboot_common.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-161576):
https://review.coreboot.org/c/coreboot/+/66909/comment/120c520e_bfd01f63
PS18, Line 17: | VB2_CONTEXT_SECDATA_KERNEL_CHANGED)))
code indent should use tabs where possible
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Attention is currently required from: Hung-Te Lin, Jason Glenesk, Raul Rangel, Jakub Czapiga, Matt DeVillier, Fred Reitberger, Felix Held.
Hello Hung-Te Lin, build bot (Jenkins), Jason Glenesk, Raul Rangel, Matt DeVillier, Julius Werner, Fred Reitberger, Yu-Ping Wu, Felix Held,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/66909
to look at the new patch set (#18).
Change subject: vboot: Add VBOOT_CBFS_INTEGRATION support
......................................................................
vboot: Add VBOOT_CBFS_INTEGRATION support
This patch introduces support signing and verification of firmware
slots using CBFS metadata hash verification method for faster initial
verification. To have complete verification, CBFS_VERIFICATION should
also be enabled, as metadata hash covers only files metadata, not their
contents.
This patch also adapts mainboards and SoCs to new vboot reset
requirements.
TEST=Volteer/Voxel boots with CL:3811754
Signed-off-by: Jakub Czapiga <jacz(a)semihalf.com>
Change-Id: I40ae01c477c4e4f7a1c90e4026a8a868ae64b5ca
---
M src/include/cbfs_glue.h
M src/lib/cbfs.c
M src/mainboard/google/asurada/Makefile.inc
M src/mainboard/google/cherry/Makefile.inc
M src/mainboard/google/corsola/Makefile.inc
M src/mainboard/google/geralt/Makefile.inc
M src/security/vboot/Kconfig
M src/security/vboot/Makefile.inc
M src/security/vboot/common.c
M src/security/vboot/vboot_common.c
M src/security/vboot/vboot_common.h
M src/security/vboot/vboot_loader.c
M src/security/vboot/vboot_logic.c
M src/soc/amd/common/psp_verstage/psp_verstage.c
M src/soc/amd/stoneyridge/Makefile.inc
M src/soc/intel/common/block/cse/cse.c
M src/soc/mediatek/mt8173/Makefile.inc
M src/soc/qualcomm/ipq40xx/Makefile.inc
M src/soc/qualcomm/ipq806x/Makefile.inc
19 files changed, 177 insertions(+), 78 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/09/66909/18
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Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/68898 )
Change subject: mb/google/brask/variants/moli: keep SAGV disable
......................................................................
mb/google/brask/variants/moli: keep SAGV disable
Since there is not too many low power requirement for moli and it is doing FSI firmware qual, so it is not critical to enable the SAGV and keep SAGV disable.
BUG=b:254600066
TEST=emerge-brask coreboot
Signed-off-by: Raihow Shi <raihow_shi(a)wistron.corp-partner.google.com>
Change-Id: I4115b35fed35b74a307b08f7a10ebced2309297f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68898
Reviewed-by: Zhuohao Lee <zhuohao(a)google.com>
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Derek Huang <derekhuang(a)google.com>
Reviewed-by: Nick Vaccaro <nvaccaro(a)google.com>
---
M src/mainboard/google/brya/variants/moli/overridetree.cb
1 file changed, 20 insertions(+), 1 deletion(-)
Approvals:
build bot (Jenkins): Verified
Nick Vaccaro: Looks good to me, approved
Zhuohao Lee: Looks good to me, approved
Raihow Shi: Looks good to me, but someone else must approve
Derek Huang: Looks good to me, but someone else must approve
diff --git a/src/mainboard/google/brya/variants/moli/overridetree.cb b/src/mainboard/google/brya/variants/moli/overridetree.cb
index 5612b6e..2d35e14 100644
--- a/src/mainboard/google/brya/variants/moli/overridetree.cb
+++ b/src/mainboard/google/brya/variants/moli/overridetree.cb
@@ -14,7 +14,6 @@
end
end
chip soc/intel/alderlake
- register "sagv" = "SaGv_Enabled"
# Enable HDMI2 in PortA, HDMI1 in PortB, HDMI/DP in Port2
register "ddi_ports_config" = "{
[DDI_PORT_A] = DDI_ENABLE_HPD | DDI_ENABLE_DDC,
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Sridhar Siricilla has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/66579 )
Change subject: soc/intel/cmn: Clear interrupt status after HECI-1 has been received
......................................................................
Patch Set 4:
(1 comment)
Patchset:
PS2:
> > Any update on this since August? Thanks. […]
Let's close the AR net week. Apologies for delay.
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Fred Reitberger has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68931 )
Change subject: soc/amd/glinda: Don't add amdfw.rom to cbfs in SOC Makefile
......................................................................
Patch Set 1: Code-Review+2
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Change subject: mb/amd/birman: Update Birman to work with Morgana or Glinda
......................................................................
Patch Set 1: Code-Review+2
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Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/68941
to look at the new patch set (#4).
Change subject: arch/x86: fix copying beyond eos in smbios struct
......................................................................
arch/x86: fix copying beyond eos in smbios struct
Coverity scan indicated there may be a copy beyond
eos in smbios struct declared in smbios.h but the
code is intentional.
This type of issue is fixed by assigning
the source for the text string to a
const pointer, and passing the pointer
to smbios_add_string calls in smbios_defaults.c.
Found-by: Coverity(CID: 1487449)
Signed-off-by: Solomon Alan-Dei <alandei.solomon(a)gmail.com>
Change-Id: I48c5903a2a3b59c9f0e89cd96ef1580b3a229771
---
M src/arch/x86/smbios_defaults.c
1 file changed, 25 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/41/68941/4
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