coreboot-gerrit October 2022

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[M] Change in coreboot[master]: soc/amd/common/block/spi: Mainboard to override SPI Read Mode
by Karthik Ramasubramanian (Code Review) 28 Oct '22

28 Oct '22

Karthik Ramasubramanian has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/68946 ) Change subject: soc/amd/common/block/spi: Mainboard to override SPI Read Mode ...................................................................... soc/amd/common/block/spi: Mainboard to override SPI Read Mode On certain mainboards due to hardware design limitations, certain SPI Read Modes eg. (Dual I/O 1-2-2) cannot be supported. Add ability to override SPI read modes in boards which do not have hardware limitations. Currently there is an API to override SPI fast speeds. Update this API for mainboards to override SPI read mode as well. BUG=b:225213679 TEST=Build and boot to OS in Skyrim. Observe a boot time improvement of ~25 ms with 100 MHz SPI speeds. Before: 11:start of bootblock 688,046 14:finished loading romstage 30,865 16:FSP-M finished LZMA decompress (ignore for x86) 91,049 Total Time: 1,972,625 After: 11:start of bootblock 667,642 14:finished loading romstage 29,798 16:FSP-M finished LZMA decompress (ignore for x86) 87,743 Total Time: 1,943,924 Change-Id: I160b56f6201a798ce59e977ca40301e23ab63805 Signed-off-by: Karthikeyan Ramasubramanian <kramasub(a)google.com> --- M src/mainboard/google/guybrush/spi_speeds.c M src/mainboard/google/skyrim/Kconfig M src/mainboard/google/skyrim/spi_speeds.c M src/soc/amd/common/block/include/amdblocks/spi.h M src/soc/amd/common/block/spi/fch_spi.c 5 files changed, 46 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/68946/1 diff --git a/src/mainboard/google/guybrush/spi_speeds.c b/src/mainboard/google/guybrush/spi_speeds.c index 857e02d..7e7ff71 100644 --- a/src/mainboard/google/guybrush/spi_speeds.c +++ b/src/mainboard/google/guybrush/spi_speeds.c @@ -4,7 +4,7 @@ #include <boardid.h> #include <stdint.h> -void mainboard_spi_fast_speed_override(uint8_t *fast_speed) +void mainboard_spi_cfg_override(uint8_t *fast_speed, uint8_t *read_mode) { uint32_t board_ver = board_id(); diff --git a/src/mainboard/google/skyrim/Kconfig b/src/mainboard/google/skyrim/Kconfig index 3c07db5..76862c4 100644 --- a/src/mainboard/google/skyrim/Kconfig +++ b/src/mainboard/google/skyrim/Kconfig @@ -107,7 +107,8 @@ if !EM100 # EM100 defaults in soc/amd/common/blocks/spi/Kconfig config EFS_SPI_READ_MODE - default 2 # Dual IO (1-1-2) + default 2 if BOARD_GOOGLE_SKYRIM # Dual IO (1-1-2) + default 4 # Dual IO (1-2-2) config EFS_SPI_SPEED default 0 # 66MHz diff --git a/src/mainboard/google/skyrim/spi_speeds.c b/src/mainboard/google/skyrim/spi_speeds.c index 857e02d..90a6b476 100644 --- a/src/mainboard/google/skyrim/spi_speeds.c +++ b/src/mainboard/google/skyrim/spi_speeds.c @@ -4,10 +4,18 @@ #include <boardid.h> #include <stdint.h> -void mainboard_spi_fast_speed_override(uint8_t *fast_speed) +void mainboard_spi_cfg_override(uint8_t *fast_speed, uint8_t *read_mode) { uint32_t board_ver = board_id(); if (board_ver >= CONFIG_OVERRIDE_EFS_SPI_SPEED_MIN_BOARD) *fast_speed = CONFIG_OVERRIDE_EFS_SPI_SPEED; + + /* + * Due to a hardware limitation, Dual I/O 1-2-2 Read mode is supported starting + * board version 3. This hardware limitation applies only to Skyrim reference + * design. + */ + if (CONFIG(BOARD_GOOGLE_SKYRIM) && board_ver >= 3) + *read_mode = SPI_READ_MODE_DUAL122; } diff --git a/src/soc/amd/common/block/include/amdblocks/spi.h b/src/soc/amd/common/block/include/amdblocks/spi.h index 4be3739..dc7097f 100644 --- a/src/soc/amd/common/block/include/amdblocks/spi.h +++ b/src/soc/amd/common/block/include/amdblocks/spi.h @@ -118,7 +118,7 @@ void spi_write32(uint8_t reg, uint32_t val); void fch_spi_config_modes(void); -void mainboard_spi_fast_speed_override(uint8_t *fast_speed); +void mainboard_spi_cfg_override(uint8_t *fast_speed, uint8_t *read_mode); /* Ensure you hold the mutex when performing SPI transactions */ extern struct thread_mutex spi_hw_mutex; diff --git a/src/soc/amd/common/block/spi/fch_spi.c b/src/soc/amd/common/block/spi/fch_spi.c index 5ef900c..4a8482e 100644 --- a/src/soc/amd/common/block/spi/fch_spi.c +++ b/src/soc/amd/common/block/spi/fch_spi.c @@ -50,7 +50,7 @@ printk(BIOS_DEBUG, "SPI Read Mode: %s\n", read_mode_str[DECODE_SPI_READ_MODE(val32)]); } -void __weak mainboard_spi_fast_speed_override(uint8_t *fast_speed) +void __weak mainboard_spi_cfg_override(uint8_t *fast_speed, uint8_t *read_mode) { /* No overriding SPI speeds. */ } @@ -107,7 +107,7 @@ read_mode = CONFIG_EFS_SPI_READ_MODE; fast_speed = CONFIG_EFS_SPI_SPEED; } - mainboard_spi_fast_speed_override(&fast_speed); + mainboard_spi_cfg_override(&fast_speed, &read_mode); if (fast_speed != CONFIG_EFS_SPI_SPEED) { normal_speed = lower_speed(normal_speed, fast_speed); -- To view, visit https://review.coreboot.org/c/coreboot/+/68946 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I160b56f6201a798ce59e977ca40301e23ab63805 Gerrit-Change-Number: 68946 Gerrit-PatchSet: 1 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-MessageType: newchange

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[L] Change in coreboot[master]: board-status: Remove shell version, update docs
by Patrick Georgi (Code Review) 28 Oct '22

28 Oct '22

Patrick Georgi has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/68960 ) Change subject: board-status: Remove shell version, update docs ...................................................................... board-status: Remove shell version, update docs Change-Id: I532db49799eadf3214a70297c5fc84aa006bc3f7 Signed-off-by: Patrick Georgi <patrick(a)coreboot.org> --- M util/docker/coreboot.org-status/board-status.html/README D util/docker/coreboot.org-status/board-status.html/bucketize.sh D util/docker/coreboot.org-status/board-status.html/foreword.html D util/docker/coreboot.org-status/board-status.html/status-to-html.sh D util/docker/coreboot.org-status/board-status.html/tohtml.sh 5 files changed, 33 insertions(+), 715 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/68960/1 diff --git a/util/docker/coreboot.org-status/board-status.html/README b/util/docker/coreboot.org-status/board-status.html/README index 0a0d591..37cb593 100644 --- a/util/docker/coreboot.org-status/board-status.html/README +++ b/util/docker/coreboot.org-status/board-status.html/README @@ -1,39 +1,35 @@ -Scripts to publish board-status data to the wiki +Tool to publish board-status data to the website ================================================ -These scripts parse the board-status repository (and the coreboot repository as companion) -to build a meaningful representation of the test coverage stored in board-status. +This tool parses the board-status repository (and the coreboot repository as +companion) to build a meaningful representation of the test coverage stored +in board-status. -The server runs these nightly (CET/CEST), so no user interaction with the wiki page is needed. +The server runs these regularly to update +https://coreboot.org/status/board-status.html How to use ---------- -When modifying the scripts, or when publishing the results elsewhere, you might want to run them -yourself. You'll need the board-status and the coreboot repository checked out side by side, named -"board-status" and "coreboot" respectively (in particular without .git suffix). +When modifying the tool, or when publishing the results elsewhere, you +might want to run it yourself. You'll need the board-status and the coreboot +repository checked out. -To emit wiki-text, in the board-status repository's top-level directory, run +To build the tool, run the following commands - $ ../util/board_status/to-wiki/status-to-wiki.sh + $ go mod download + $ go build -The output ends up on stdout, so you'll have to store it yourself, if you need it later. +To run it, use -`push-to-wiki.sh FILENAME TITLE` can be used to push a file into the wiki. -User credentials are looked up in ~/.wikiaccount, which should look like + $ ./board-status.html \ + -board-status-dir .../board-status.git \ + -coreboot-dir .../coreboot.git > out.html - USERNAME=user - USERPASS=password +There will be a few errors about missing revisions, those come from status +reports based on unpublished commits. -How it works ------------- -status-to-wiki collects the reports and sorts them in buckets by report date. These can have -weekly, monthly and quarterly granularity. -It then passes these into the towiki script, which reads the data in more details and prints -them in the output format. - -Contributions -------------- -These scripts are rather bare, and you're welcome to extend them to extract more useful data -from both repositories, and to present the data in a nicer way. -A rewrite into another (reasonable) language is fine, too - shell quickly finds its limits -for this kind of text processing. +LIMITATIONS +----------- +The tool doesn't support board variants or "clone of" specifiers in +board-info.txt. The output is also a bit unwieldy, leading to many megabytes +of HTML in a single file. diff --git a/util/docker/coreboot.org-status/board-status.html/bucketize.sh b/util/docker/coreboot.org-status/board-status.html/bucketize.sh deleted file mode 100755 index fd3a94b..0000000 --- a/util/docker/coreboot.org-status/board-status.html/bucketize.sh +++ /dev/null @@ -1,45 +0,0 @@ -#!/usr/bin/env sh -# usage: $0 [weekly|monthly|quarterly] < filenames -# sorts files of the form VENDOR/BOARD/COMMIT/DATE/revision.txt -# into buckets of the given granularity - -weekly() { - date --date="$1" +%GW%V 2>/dev/null - return $? -} - -monthly() { - date --date="$1" +%Y-%m 2>/dev/null - return $? -} - -quarterly() { - date --date="$1" "+%Y %m" 2>/dev/null | awk '{ q=int(($2-1)/3+1); print $1 "Q" q}' - return $? -} - -# Restrict $1 to allowed values -if [ "$1" != "weekly" ] && [ "$1" != "monthly" ] && [ "$1" != "quarterly" ]; then - exit 1 -fi - -curr="" -sort -r -k4 -t/ | while read file; do - # Exclude 'oem' directories - if echo "$file" | grep -q '/oem/'; then continue; fi - timestamp=$(printf "%s" "$file" | cut -d/ -f4 | tr _ :) - - # If the directory is not a date, skip it. - new=$($1 "$timestamp");retval=$? - if [ "$retval" != "0" ]; then continue; fi - - if [ "$new" != "$curr" ]; then - if [ "$curr" != "" ]; then - printf "\n" - fi - printf "%s:" "$new" - curr=$new - fi - printf "%s " "$file" -done -printf "\n" diff --git a/util/docker/coreboot.org-status/board-status.html/foreword.html b/util/docker/coreboot.org-status/board-status.html/foreword.html deleted file mode 100644 index 3e7c584..0000000 --- a/util/docker/coreboot.org-status/board-status.html/foreword.html +++ /dev/null @@ -1,41 +0,0 @@ -<h1>Mainboards supported by coreboot</h1> - -<p>This page shows two representations of the same data:</p> - -<p>First a list of all mainboards supported by coreboot (current within -one hour) ordered by category. For each mainboard the table shows the -latest user-contributed report of a successful boot on the device.</p> - -<p>After that, the page provides a time-ordered list of these contributed -reports, with the newest report first.</p> - -<p>Boards without such reports may boot or there may be some maintenance -required. The reports contain the coreboot configuration and precise commit -id, so it is possible to reproduce the build.</p> - -<p>We encourage developers and users to contribute reports so we know which -devices are well-tested. We have -<a href='https://review.coreboot.org/plugins/gitiles/coreboot/+/refs/heads/master/ut…'>a tool in the coreboot repository</a> -to make contributing easy. The data resides in the -<a href='https://review.coreboot.org/plugins/gitiles/board-status/'>board status repository</a>. -Contributing requires an account on review.coreboot.org. After -logging into the site with your preferred OpenID or GitHub/Google -credentials, you can get a user name and password for git pushes on <a -href="https://review.coreboot.org/settings/#HTTPCredentials">gerrit's -settings screen</a>.</p> - -<p>Sometimes the same board is sold under different names, we've tried to -list all known names but some names might be missing.</p> - -<p>If the board is not found in the coreboot's source code, there might -be some form of support that is not ready yet for inclusion in coreboot, -usually people willing to send their patches to coreboot goes through -<a href='https://review.coreboot.org'>gerrit</a>, so looking there could find some -code for boards that are not yet merged.</p> - -<h1>Vendor trees</h1> -<p>Some vendors have their own coreboot trees/fork, for instance: -<ul> - <li><a href='https://chromium.googlesource.com/chromiumos/third_party/coreboot/'>chrome/chromium's tree</a> -</ul> -</p> diff --git a/util/docker/coreboot.org-status/board-status.html/status-to-html.sh b/util/docker/coreboot.org-status/board-status.html/status-to-html.sh deleted file mode 100755 index 2fb958c..0000000 --- a/util/docker/coreboot.org-status/board-status.html/status-to-html.sh +++ /dev/null @@ -1,2 +0,0 @@ -#!/usr/bin/env sh -ls -d */*/*/*/ | `dirname $0`/bucketize.sh weekly | `dirname $0`/tohtml.sh diff --git a/util/docker/coreboot.org-status/board-status.html/tohtml.sh b/util/docker/coreboot.org-status/board-status.html/tohtml.sh deleted file mode 100755 index 73134a6..0000000 --- a/util/docker/coreboot.org-status/board-status.html/tohtml.sh +++ /dev/null @@ -1,600 +0,0 @@ -#!/usr/bin/env sh -export COREBOOT_DIR="../coreboot.git" -export GIT_DIR="$COREBOOT_DIR/.git" -CODE_GITWEB="https://review.coreboot.org/plugins/gitiles/coreboot/+/" -STATUS_GITWEB="https://review.coreboot.org/plugins/gitiles/board-status/+/refs/heads/maste…" - -cat <<EOF -<html> -<head> - <meta charset="utf-8"> - <title>status report for coreboot boards</title> -</head> -<body> -EOF - -if [ -f `dirname $0`/foreword.html ]; then - cat `dirname $0`/foreword.html -fi -detailed= -nl=" -" -have= -while read line; do - timeframe=`echo $line | cut -d: -f1` - rest=`echo $line | cut -d: -f2-` - detailed="$detailed<h1>$timeframe</h1>$nl" - for i in $rest; do - vendor_board=`echo $i | cut -d/ -f1-2` - commit=`echo $i | cut -d/ -f3` - datetime_path=`echo $i | cut -d/ -f4` - datetime=`echo $datetime_path | tr _ :` - datetime_human=`LC_ALL=C TZ=UTC0 date --date="$datetime"` - upstream=`grep "^Upstream revision:" $vendor_board/$commit/$datetime_path/revision.txt |cut -d: -f2-` - upstream=`git log -1 --format=%H $upstream` - if ! echo "$have"| grep "^$vendor_board:" > /dev/null; then - detailed="$detailed<span id=\"$vendor_board\"></span>$nl" - have="$have$vendor_board:$datetime$nl" - fi - - detailed="$detailed<a href='https://www.coreboot.org/Board:$vendor_board'>$vendor_board</a> at $datetime_human$nl" - detailed="$detailed<a href='$CODE_GITWEB$upstream'>upstream tree</a> ($nl" - for file in "$vendor_board/$commit/$datetime_path/"*; do - if [ "$file" = "$vendor_board/$commit/$datetime_path/revision.txt" ]; then - continue - fi - detailed="$detailed<a href='$STATUS_GITWEB$file'>`basename $file`</a> $nl" - done - detailed="$detailed)<br />" - done -done - -cat <<EOF -<h1>Motherboards supported in coreboot</h1> - -<table border="0" style="font-size: smaller"> -<tr bgcolor="#6699ff"> -<td>Vendor</td> -<td>Mainboard</td> -<td>Latest known good</td> -<td>Northbridge</td> -<td>Southbridge</td> -<td>Super I/O</td> -<td>CPU</td> -<td>Socket</td> -<td><span title="ROM chip package">ROM <sup>1</sup></span></td> -<td><span title="ROM chip protocol">P <sup>2</sup></span></td> -<td><span title="ROM chip socketed?">S <sup>3</sup></span></td> -<td><span title="Board supported by flashrom?">F <sup>4</sup></span></td> -<td><span title="Vendor Cooperation Score">VCS<sup>5</sup></span></td> -</tr> -EOF - -for category in laptop server desktop half mini settop "eval" sbc emulation misc unclass; do - last_vendor= - color=eeeeee - case "$category" in - desktop) - cat <<EOF -<tr bgcolor="#6699ff"> -<td colspan="13"><h4>Desktops / Workstations</h4></td> -</tr> - -EOF - ;; - server) - cat <<EOF -<tr bgcolor="#6699ff"> -<td colspan="13"><h4>Servers</h4></td> -</tr> - -EOF - ;; - laptop) - cat <<EOF -<tr bgcolor="#6699ff"> -<td colspan="13"><h4>Laptops</h4></td> -</tr> - -EOF - ;; - half) - cat <<EOF -<tr bgcolor="#6699ff"> -<td colspan="13"><h4>Embedded / PC/104 / Half-size boards</h4></td> -</tr> - -EOF - ;; - mini) - cat <<EOF -<tr bgcolor="#6699ff"> -<td colspan="13"><h4>Mini-ITX / Micro-ITX / Nano-ITX</h4></td> -</tr> - -EOF - ;; - settop) - cat <<EOF -<tr bgcolor="#6699ff"> -<td colspan="13"><h4>Set-top-boxes / Thin clients</h4></td> -</tr> - -EOF - ;; - "eval") - cat <<EOF -<tr bgcolor="#6699ff"> -<td colspan="13"><h4>Devel/Eval Boards</h4></td> -</tr> - -EOF - ;; - sbc) - cat <<EOF -<tr bgcolor="#6699ff"> -<td colspan="13"><h4>Single-Board computer</h4></td> -</tr> - -EOF - ;; - emulation) - cat <<EOF -<tr bgcolor="#6699ff"> -<td colspan="13"><h4>Emulation</h4></td> -</tr> - -EOF - ;; - misc) - cat <<EOF -<tr bgcolor="#6699ff"> -<td colspan="13"><h4>Miscellaneous</h4></td> -</tr> - -EOF - ;; - unclass) - cat <<EOF -<tr bgcolor="#6699ff"> -<td colspan="13"><h4>Unclassified</h4></td> -</tr> - -EOF - ;; - esac - - for vendor_board_dir in "$COREBOOT_DIR"/src/mainboard/*/* ; do - board="$(basename "$vendor_board_dir")" - vendor="$(basename "$(dirname "$vendor_board_dir")")" - if [ "$board" = Kconfig ] || [ "$board" = Kconfig.name ]; then - continue - fi - - if [ -f "$vendor_board_dir/board_info.txt" ]; then - cur_category="$(sed -n "/^[[:space:]]*Category:/ s,^[[:space:]]*Category:[[:space:]]*,,p" "$vendor_board_dir/board_info.txt")" - else - cur_category= - fi - - case "$cur_category" in - desktop|server|laptop|half|mini|settop|"eval"|emulation|sbc|misc) - ;; - *) - cur_category=unclass - ;; - esac - if [ "$cur_category" != "$category" ]; then - continue - fi - - if [ -f "$vendor_board_dir/board_info.txt" ]; then - vendor_2nd="$(sed -n "/^[[:space:]]*Vendor name:/ s,^[[:space:]]*Vendor name:[[:space:]]*,,p" "$vendor_board_dir/board_info.txt")" - board_nice="$(sed -n "/^[[:space:]]*Board name:/ s,^[[:space:]]*Board name:[[:space:]]*,,p" "$vendor_board_dir/board_info.txt")" - rom_package="$(sed -n "/^[[:space:]]*ROM package:/ s,^[[:space:]]*ROM package:[[:space:]]*,,p" "$vendor_board_dir/board_info.txt")" - rom_protocol="$(sed -n "/^[[:space:]]*ROM protocol:/ s,^[[:space:]]*ROM protocol:[[:space:]]*,,p" "$vendor_board_dir/board_info.txt")" - rom_socketed="$(sed -n "/^[[:space:]]*ROM socketed:/ s,^[[:space:]]*ROM socketed:[[:space:]]*,,p" "$vendor_board_dir/board_info.txt")" - flashrom_support="$(sed -n "/^[[:space:]]*Flashrom support:/ s,^[[:space:]]*Flashrom support:[[:space:]]*,,p" "$vendor_board_dir/board_info.txt")" - vendor_cooperation_score="$(sed -n "/^[[:space:]]*Vendor cooperation score:/ s,^[[:space:]]*Vendor cooperation score:[[:space:]]*,,p" "$vendor_board_dir/board_info.txt")" - vendor_cooperation_page="$(sed -n "/^[[:space:]]*Vendor cooperation page:/ s,^[[:space:]]*Vendor cooperation page:[[:space:]]*,,p" "$vendor_board_dir/board_info.txt")" - board_url="$(sed -n "/^[[:space:]]*Board URL:/ s,^[[:space:]]*Board URL:[[:space:]]*,,p" "$vendor_board_dir/board_info.txt")" - clone_of="$(sed -n "/^[[:space:]]*Clone of:/ s,^[[:space:]]*Clone of:[[:space:]]*,,p" "$vendor_board_dir/board_info.txt")" - else - vendor_2nd= - board_nice= - rom_package= - rom_protocol= - rom_socketed= - flashrom_support= - vendor_cooperation_score= - vendor_cooperation_page= - board_url= - clone_of= - fi - if [ "$last_vendor" != "$vendor" ]; then - last_vendor="$vendor" - if [ "$color" = dddddd ]; then - color=eeeeee - else - color=dddddd - fi - fi - - vendor_nice="$(grep -A1 -i "config VENDOR_$vendor" "$COREBOOT_DIR"/src/mainboard/$vendor/Kconfig.name|tail -n1|sed -n 's,^[[:space:]]*bool[[:space:]]*"$.*$"[[:space:]]*$,\1,p')" - - if [ -z "$vendor_nice" ]; then - vendor_nice="$(echo "$vendor" |sed -e "s/$.$/\u\1/g")"; - fi - if [ -z "$board_nice" ]; then - board_nice="$(grep -A2 -i "config MAINBOARD_PART_NUMBER" "$COREBOOT_DIR"/src/mainboard/$vendor/$board/Kconfig|tail -n1|sed -n 's,^[[:space:]]*default[[:space:]]*"$.*$"[[:space:]]*$,\1,p')" - fi - if [ -z "$board_nice" ]; then - board_nice="$(echo "$board" |sed -e "s,_, ,g;s/$.$/\u\1/g")"; - fi - - venboard="$vendor/$board" - if [ -n "$clone_of" ]; then - venboard="$clone_of" - fi - - lastgood="$(echo "$have"| sed -n "/^$(echo "$venboard"|sed 's,/,\\/,g'):/ s,^[^:]*:,,gp")" - - vendor_board_dir="$COREBOOT_DIR"/src/mainboard/"$venboard"; - - northbridge="$(sed -n "/^[[:space:]]*select NORTHBRIDGE_/ s,^[[:space:]]*select NORTHBRIDGE_,,p" "$vendor_board_dir/Kconfig")" - northbridge_nice="$(echo "$northbridge"|sed 's,AMD_AGESA_FAMILY$[0-9a-fA-F]*$$.*$,AMD Family \1h\2 (AGESA),g;s,AMD_PI_$.*$,AMD \1 (PI),g;s,INTEL_FSP_$.*$,Intel® \1 (FSP),g;s,AMD_FAMILY$[0-9a-fA-F]*$,AMD Family \1h,g;s,AMD_AMDFAM$[0-9a-fA-F]*$,AMD Family \1h,g;s,_, ,g;s,INTEL,Intel®,g;')" - - southbridge="$(sed -n "/[[:space:]]*select SOUTHBRIDGE_/ s,[[:space:]]*select SOUTHBRIDGE_$[^ ]*$.*$,\1,p" "$vendor_board_dir/Kconfig"|grep -v SKIP_|grep -v DISABLE_)" - southbridge_nice="$(echo "$southbridge"|sed 's,_, ,g;s,INTEL,Intel®,g')" - superio="$(sed -n "/[[:space:]]*select SUPERIO_/ s,[[:space:]]*select SUPERIO_,,p" "$vendor_board_dir/Kconfig"|grep -v OVERRIDE_FANCTL)" - superio_nice="$(echo "$superio"|sed 's,_, ,g;s,WINBOND,Winbond™,g;s,ITE,ITE™,g;s,SMSC,SMSC®,g;s,NUVOTON,Nuvoton ,g')" - cpu="$(sed -n \ - -e "/ select CPU_/ s, select CPU_,,p" \ - -e "/ select SOC_/ s, select SOC_,,p" \ - "$vendor_board_dir/Kconfig" | \ - grep -v "AMD_AGESA_FAMILY" | \ - grep -v CPU_MICROCODE_CBFS_NONE)" - case "$cpu" in - ALLWINNER_A10) - cpu_nice="Allwinner A10" - socket_nice="?";; - AMD_GEODE_*) - cpu_nice="AMD Geode™ ${cpu#AMD_GEODE_}"; - socket_nice="—";; - AMD_SOCKET_754) - cpu_nice="AMD Sempron™ / Athlon™ 64 / Turion™ 64"; - socket_nice="Socket 754";; - AMD_SOCKET_ASB2) - cpu_nice="AMD Turion™ II Neo/Athlon™ II Neo"; - socket_nice="ASB2 (BGA812)";; - AMD_SOCKET_S1G1) - cpu_nice="AMD Turion™ / X2 Sempron™"; - socket_nice="Socket S1G1";; - AMD_SOCKET_G34|AMD_SOCKET_G34_NON_AGESA) - cpu_nice="AMD Opteron™ Magny-Cours/Interlagos"; - socket_nice="Socket G34";; - AMD_SOCKET_C32|AMD_SOCKET_C32_NON_AGESA) - cpu_nice="AMD Opteron™ Magny-Cours/Interlagos"; - socket_nice="Socket C32";; - AMD_SOCKET_AM2) - cpu_nice="?"; - socket_nice="Socket AM2" - ;; - AMD_SOCKET_AM3) - cpu_nice="AMD Athlon™ 64 / FX / X2"; - socket_nice="Socket AM3" - ;; - AMD_SOCKET_AM2R2) - cpu_nice="AMD Athlon™ 64 / X2 / FX, Sempron™"; - socket_nice="Socket AM2+" - ;; - AMD_SOCKET_F) - cpu_nice="AMD Opteron™"; - socket_nice="Socket F" - ;; - AMD_SOCKET_F_1207) - cpu_nice="AMD Opteron™"; - socket_nice="Socket F 1207" - ;; - AMD_SOCKET_940) - cpu_nice="AMD Opteron™"; - socket_nice="Socket 940" - ;; - AMD_SOCKET_939) - cpu_nice="AMD Athlon™ 64 / FX / X2"; - socket_nice="Socket 939" - ;; - AMD_SC520) - cpu_nice="AMD Élan™SC520"; - socket_nice="—";; - AMD_STONEYRIDGE_FP4) - cpu_nice="AMD Stoney Ridge"; - socket_nice="FP4 BGA";; - ARMLTD_CORTEX_A9) - cpu_nice="ARM Cortex A9"; - socket_nice="?";; - DMP_VORTEX86EX) - cpu_nice="DMP VORTEX86EX"; - socket_nice="?";; - MEDIATEK_MT8173) - cpu_nice="MediaTek MT8173"; - socket_nice="—";; - NVIDIA_TEGRA124) - cpu_nice="NVIDIA Tegra 124"; - socket_nice="—";; - NVIDIA_TEGRA210) - cpu_nice="NVIDIA Tegra 210"; - socket_nice="—";; - SAMSUNG_EXYNOS5420) - cpu_nice="Samsung Exynos 5420"; - socket_nice="?";; - SAMSUNG_EXYNOS5250) - cpu_nice="Samsung Exynos 5250"; - socket_nice="?";; - TI_AM335X) - cpu_nice="TI AM335X"; - socket_nice="?";; - INTEL_APOLLOLAKE) - cpu_nice="Intel® Apollo Lake"; - socket_nice="—";; - INTEL_BAYTRAIL) - cpu_nice="Intel® Bay Trail"; - socket_nice="—";; - INTEL_BRASWELL) - cpu_nice="Intel® Braswell"; - socket_nice="—";; - INTEL_BROADWELL) - cpu_nice="Intel® Broadwell"; - socket_nice="—";; - INTEL_DENVERTON_NS) - cpu_nice="Intel® Denverton-NS"; - socket_nice="—";; - INTEL_FSP_BROADWELL_DE) - cpu_nice="Intel® Broadwell-DE"; - socket_nice="—";; - INTEL_GLK) - cpu_nice="Intel® Gemini Lake"; - socket_nice="—";; - INTEL_ICELAKE) - cpu_nice="Intel® Ice Lake"; - socket_nice="—";; - INTEL_KABYLAKE) - cpu_nice="Intel® Kaby Lake"; - socket_nice="—";; - INTEL_SANDYBRIDGE) - cpu_nice="Intel® Sandy Bridge"; - socket_nice="—";; - INTEL_SKYLAKE) - cpu_nice="Intel® Skylake"; - socket_nice="—";; - INTEL_SLOT_1) - cpu_nice="Intel® Pentium® II/III, Celeron®"; - socket_nice="Slot 1";; - INTEL_SOCKET_MPGA604) - cpu_nice="Intel® Xeon®"; - socket_nice="Socket 604";; - INTEL_SOCKET_M) - cpu_nice="Intel® Core™ 2 Duo Mobile, Core™ Duo/Solo, Celeron® M"; - socket_nice="Socket M (mPGA478MT)";; - INTEL_SOCKET_LGA771) - cpu_nice="Intel Xeon™ 5000 series"; - socket_nice="Socket LGA771";; - INTEL_SOCKET_LGA775) - cpu_nice="Intel® Core 2, Pentium 4/D"; - socket_nice="Socket LGA775";; - INTEL_SOCKET_PGA370) - cpu_nice="Intel® Pentium® III-800, Celeron®" - socket_nice="Socket 370";; - INTEL_SOCKET_MPGA479M) - cpu_nice="Intel® Mobile Celeron" - socket_nice="Socket 479" - ;; - INTEL_HASWELL) - cpu_nice="Intel® 4th Gen (Haswell) Core i3/i5/i7" - socket_nice="?" - ;; - INTEL_FSP_RANGELEY) - cpu_nice="Intel® Atom Rangeley (FSP)" - socket_nice="?" - ;; - INTEL_SOCKET_RPGA989|INTEL_SOCKET_LGA1155|INTEL_SOCKET_RPGA988B) - socket_nice="`echo $cpu | sed 's,INTEL_SOCKET_,Socket ,g'`" - case $northbridge in - INTEL_HASWELL) - cpu_nice="Intel® 4th Gen (Haswell) Core i3/i5/i7";; - INTEL_IVYBRIDGE|INTEL_FSP_IVYBRIDGE) - cpu_nice="Intel® 3rd Gen (Ivybridge) Core i3/i5/i7";; - INTEL_SANDYBRIDGE) - cpu_nice="Intel® 2nd Gen (Sandybridge) Core i3/i5/i7";; - *) - cpu_nice="$northbridge";; - esac - ;; - INTEL_SOCKET_441) - cpu_nice="Intel® Atom™ 230"; - socket_nice="Socket 441";; - INTEL_SOCKET_BGA956) - case $northbridge in - INTEL_GM45) - cpu_nice="Intel® Core 2 Duo (Penryn)" - socket_nice="Socket P";; - *) - cpu_nice="Intel® Pentium® M"; - socket_nice="BGA956";; - esac - ;; - INTEL_SOCKET_FC_PGA370) - cpu_nice="Intel® Pentium® III / Celeron®"; - socket_nice="Socket 370" - ;; - INTEL_EP80579) - cpu_nice="Intel® EP80579"; - socket_nice="Intel® EP80579" - ;; - INTEL_SOCKET_MFCBGA479) - cpu_nice="Intel® Mobile Celeron" - socket_nice="Socket 479";; - INTEL_WHISKEYLAKE) - cpu_nice="Intel® Whiskey Lake"; - socket_nice="—";; - QC_IPQ806X) - cpu_nice="Qualcomm IPQ806x"; - socket_nice="—";; - QUALCOMM_QCS405) - cpu_nice="Qualcomm QCS405"; - socket_nice="—";; - ROCKCHIP_RK3288) - cpu_nice="Rockchip RK3288"; - socket_nice="—";; - ROCKCHIP_RK3399) - cpu_nice="Rockchip RK3399"; - socket_nice="—";; - VIA_C3) - cpu_nice="VIA C3™"; - socket_nice="?" - ;; - VIA_C7) - cpu_nice="VIA C7™"; - socket_nice="?" - ;; - VIA_NANO) - cpu_nice="VIA Nano™"; - socket_nice="?" - ;; - QEMU_X86) - cpu_nice="QEMU x86"; - socket_nice="—" - ;; - "") - case $northbridge in - INTEL_IRONLAKE) - cpu_nice="Intel® 1st Gen (Westmere) Core i3/i5/i7" - socket_nice="?";; - RDC_R8610) - cpu_nice="RDC 8610" - socket_nice="—";; - AMD_AGESA_*|AMD_PI_*) - cpu_nice="$northbridge_nice" - socket_nice="?";; - *) - cpu_nice="$northbridge" - socket_nice="$northbridge";; - esac - ;; - *) - cpu_nice="$cpu" - socket_nice="$cpu";; - esac - - echo "<tr bgcolor=\"#$color\">" - - if [ -z "$board_url" ]; then - echo "<td>$vendor_nice" - else - echo "<td><a href='$board_url'>$vendor_nice</a>" - fi - if ! [ -z "$vendor_2nd" ]; then - echo " ($vendor_2nd)" - fi - - echo "</td><td><a href='https://www.coreboot.org/Board:$vendor/$board'>$board_nice</a></td>" - - if [ -z "$lastgood" ]; then - echo "<td style=\"background:red\">Unknown</td>" - else - lastgood_diff=0 - lastgood_ts=$(date -d "$lastgood" "+%s") - if [ "$lastgood_ts" != "" ]; then - current_ts=$(date "+%s") - if [ "$lastgood_ts" -lt "$current_ts" ]; then - lastgood_diff=$(( current_ts - lastgood_ts )) - # Convert seconds to days - lastgood_diff=$(( lastgood_diff / 86400 )) - # Set maximum age at 255 days for convenience of code - if [ $lastgood_diff -gt 255 ]; then - lastgood_diff=255 - fi - fi - fi - lastgood_diff_hex=$(echo "obase=16; $lastgood_diff" | bc) - if [ "$lastgood_diff" -lt 16 ]; then - lastgood_diff_hex="0${lastgood_diff_hex}" - fi - cell_bgcolor="#${lastgood_diff_hex}ff00" - echo "<td style=\"background:${cell_bgcolor}\"><a href='#$venboard'>$lastgood</a></td>" - fi - - echo "<td>$northbridge_nice</td>" - echo "<td>$southbridge_nice</td>" - echo "<td>$superio_nice</td>" - echo "<td>$cpu_nice</td>" - echo "<td>$socket_nice</td>" - if [ "$rom_package" = "" ]; then - echo "<td>?</td>" - else - echo "<td>$rom_package</td>" - fi - if [ "$rom_protocol" = "" ]; then - echo "<td>?</td>" - else - echo "<td>$rom_protocol</td>" - fi - if [ "$rom_socketed" = "y" ]; then - echo "<td style=\"background:lime\">Y</td>" - elif [ "$rom_socketed" = "n" ]; then - echo "<td style=\"background:red\">N</td>" - elif [ "$flashrom_support" = "variable" ]; then - echo "<td>...<sup>7</sup></td>" - elif [ "$rom_socketed" = "" ]; then - echo "<td>?</td>" - else - echo "<td>$rom_socketed</td>" - fi - if [ "$flashrom_support" = "y" ]; then - echo "<td style=\"background:lime\">Y</td>" - elif [ "$flashrom_support" = "n" ]; then - echo "<td style=\"background:red\">N</td>" - elif [ "$flashrom_support" = "coreboot-only" ]; then - echo "<td style=\"background:yellow\">...<sup>6</sup></td>" - elif [ "$flashrom_support" = "" ]; then - echo "<td>?</td>" - else - echo "<td>$flashrom_support</td>" - fi - if [ "$vendor_cooperation_score" = "4" ]; then - echo -n "<td style=\"background:lime\">" - elif [ "$vendor_cooperatio_scoren" = "3" ]; then - echo -n "<td style=\"background:yellow\">" - else - echo -n "<td>" - fi - if [ "$vendor_cooperation_page" != "" ]; then - echo "<a href='http://www.coreboot.org/$vendor_cooperation_page'>$vendor_cooperation_score</a>" - elif [ "$vendor_cooperation_score" = "" ]; then - echo "—" - else - echo "$vendor_cooperation_score" - fi - echo "</td></tr>" - done -done -echo "</table>" - -cat <<EOF -<small> -<sup>1</sup> ROM chip package (PLCC, DIP32, DIP8, SOIC8).<br /> -<sup>2</sup> ROM chip protocol/type (parallel flash, LPC, FWH, SPI).<br /> -<sup>3</sup> ROM chip socketed (Y/N)?<br /> -<sup>4</sup> Board supported by [http://www.flashrom.org flashrom] (Y/N)?<br /> -<sup>5</sup> Vendor Cooperation Score.<br /> -<sup>6</sup> [http://www.flashrom.org flashrom] does not work when the vendor BIOS is booted, but it does work when the machine is booted with coreboot.<br /> -<sup>7</sup> Some boards have ROM sockets, others are soldered.<br /> -</small> -EOF - - -echo "$detailed" -cat <<EOF -</body> -</html> -EOF -- To view, visit https://review.coreboot.org/c/coreboot/+/68960 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I532db49799eadf3214a70297c5fc84aa006bc3f7 Gerrit-Change-Number: 68960 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Georgi <patrick(a)coreboot.org> Gerrit-MessageType: newchange

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[S] Change in coreboot[master]: board-status: Use go-git
by Patrick Georgi (Code Review) 28 Oct '22

28 Oct '22

Patrick Georgi has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/68959 ) Change subject: board-status: Use go-git ...................................................................... board-status: Use go-git Doesn't work yet due to upstream issues with resolving partial hashes Change-Id: I37fac3caf265fd5591eaa2c04fad8bdee3bf5f84 Signed-off-by: Patrick Georgi <patrick(a)coreboot.org> --- M util/docker/coreboot.org-status/board-status.html/logs.go 1 file changed, 31 insertions(+), 7 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/59/68959/1 diff --git a/util/docker/coreboot.org-status/board-status.html/logs.go b/util/docker/coreboot.org-status/board-status.html/logs.go index 21e91f2..f419ad8 100644 --- a/util/docker/coreboot.org-status/board-status.html/logs.go +++ b/util/docker/coreboot.org-status/board-status.html/logs.go @@ -4,11 +4,13 @@ "fmt" "io/fs" "os" - "os/exec" "path/filepath" "sort" "strings" "time" + + "github.com/go-git/go-git/v5" + "github.com/go-git/go-git/v5/plumbing" ) // Color returns a HTML color code between green and yellow based on the @@ -50,6 +52,19 @@ data.VendorBoardReferenced = make(map[string]bool) timeframes := make(map[Timeframe]bool) gitcache := make(map[string]string) + repo, err := git.PlainOpen(cbdir) + if err != nil { + fmt.Fprintf(os.Stderr, "Could not open %s: %v\n", cbdir, err) + return + } + if true { + // Hack to work around issue in go-git + // Adopted from https://github.com/go-git/go-git/issues/148 + hash, _ := repo.ResolveRevision(plumbing.Revision("HEAD")) + commit, _ := repo.CommitObject(*hash) + tree, _ := commit.Tree() + _ = tree + } for dir := range dirs { upstream := "" revB, err := fs.ReadFile(dir.FS, filepath.Join(dir.Name, "revision.txt")) @@ -68,19 +83,16 @@ } if item[0] == "Upstream revision" { upstream = strings.TrimSpace(item[1]) - // tried using go-git, but its resolver - // couldn't expand short hashes despite the - // docs claiming that it can. if val, ok := gitcache[upstream]; ok { upstream = val } else { - res, err := exec.Command("/usr/bin/git", "-C", cbdir, "log", "-n1", "--format=%H", upstream).Output() + res, err := repo.ResolveRevision(plumbing.Revision(upstream)) if err != nil { - fmt.Fprintf(os.Stderr, "revision %s not found \n", upstream) + fmt.Fprintf(os.Stderr, "revision %s not found: %v\n", upstream, err) skipDir = true break } - gitcache[upstream] = strings.TrimSpace(string(res)) + gitcache[upstream] = strings.TrimSpace(res.String()) upstream = gitcache[upstream] } } -- To view, visit https://review.coreboot.org/c/coreboot/+/68959 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I37fac3caf265fd5591eaa2c04fad8bdee3bf5f84 Gerrit-Change-Number: 68959 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Georgi <patrick(a)coreboot.org> Gerrit-MessageType: newchange

1 0

[S] Change in coreboot[master]: mb/amd/mandolin: handle invalid intr_index values in init_tables
by 9elements QA (Code Review) 28 Oct '22

28 Oct '22

9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68848 ) Change subject: mb/amd/mandolin: handle invalid intr_index values in init_tables ...................................................................... Patch Set 2: Automatic boot test returned (PASS/FAIL/TOTAL): 14 / 2 / 16 FAIL: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES_ and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/131545 FAIL: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/131544 PASS: x86_32 "ThinkPad T500" , build config LENOVO_T500 and payload SeaBIOS : https://lava.9esec.io/r/131543 PASS: x86_32 "HP Z220 SFF Workstation" , build config HP_Z220_SFF_WORKSTATION and payload LinuxBoot_BB_kexec : https://lava.9esec.io/r/131542 PASS: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload TianoCore : https://lava.9esec.io/r/131541 PASS: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload SeaBIOS : https://lava.9esec.io/r/131540 PASS: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload TianoCore : https://lava.9esec.io/r/131539 PASS: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload SeaBIOS : https://lava.9esec.io/r/131538 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35_SMM_TSEG and payload TianoCore : https://lava.9esec.io/r/131537 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35_SMM_TSEG and payload SeaBIOS : https://lava.9esec.io/r/131536 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35 and payload TianoCore : https://lava.9esec.io/r/131535 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35 and payload SeaBIOS : https://lava.9esec.io/r/131534 PASS: x86_64 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_X86_64 and payload SeaBIOS : https://lava.9esec.io/r/131533 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ASAN and payload SeaBIOS : https://lava.9esec.io/r/131532 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ and payload SeaBIOS : https://lava.9esec.io/r/131531 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX and payload SeaBIOS : https://lava.9esec.io/r/131530 Please note: This test is under development and might not be accurate at all! -- To view, visit https://review.coreboot.org/c/coreboot/+/68848 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I45ab115f3814b212243c4f6cf706daf77b6ff3b2 Gerrit-Change-Number: 68848 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-Comment-Date: Fri, 28 Oct 2022 16:38:59 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[master]: mb/google/skyrim/var/winterhold: Update DPTC setting for EVT-SMT
by Tim Van Patten (Code Review) 28 Oct '22

28 Oct '22

Attention is currently required from: Raul Rangel, Jason Nien, EricKY Cheng, Paul Menzel, Jon Murphy, Nelson Ye, Chris Wang, Martin Roth, Karthik Ramasubramanian. Tim Van Patten has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68742 ) Change subject: mb/google/skyrim/var/winterhold: Update DPTC setting for EVT-SMT ...................................................................... Patch Set 3: Code-Review+1 (1 comment) File src/mainboard/google/skyrim/variants/winterhold/overridetree.cb: https://review.coreboot.org/c/coreboot/+/68742/comment/18c47793_bf84f513 PS3, Line 7: # Set DPTC confiuration. Table E (EVT-SMT) Please add a TODO, indicating that this needs to be cleaned up before b/232946420 can be resolved, so we have a reminder that the device is being throttled and where to look on what's required to fix it. -- To view, visit https://review.coreboot.org/c/coreboot/+/68742 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4aa90304e1e7bda7d580de2582129191e9eb0e76 Gerrit-Change-Number: 68742 Gerrit-PatchSet: 3 Gerrit-Owner: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Gerrit-Reviewer: Chris Wang <chris.wang(a)amd.corp-partner.google.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Isaac Lee <isaaclee(a)google.com> Gerrit-CC: Nelson Ye <nelson_ye(a)compal.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jon Murphy <jpmurphy(a)google.com> Gerrit-Attention: Nelson Ye <nelson_ye(a)compal.corp-partner.google.com> Gerrit-Attention: Chris Wang <chris.wang(a)amd.corp-partner.google.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Fri, 28 Oct 2022 16:36:44 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

[M] Change in coreboot[master]: mb/google/skyrim/var/winterhold: Override dxio to disable EMMC ASPM
by Tim Van Patten (Code Review) 28 Oct '22

28 Oct '22

Attention is currently required from: Raul Rangel, Jason Nien, EricKY Cheng, Isaac Lee, Jon Murphy, Martin Roth, Eric Peers, Moises Garcia, Karthikeyan Ramasubramanian. Tim Van Patten has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68940 ) Change subject: mb/google/skyrim/var/winterhold: Override dxio to disable EMMC ASPM ...................................................................... Patch Set 2: (3 comments) Patchset: PS2: > T Hm, I'm not sure what happened here. Ignore. File src/mainboard/google/skyrim/port_descriptors.c: https://review.coreboot.org/c/coreboot/+/68940/comment/0a935cf1_65529cee PS2, Line 64: .connector_type = DDI_DP, Why were these DP descriptors changed? File src/mainboard/google/skyrim/variants/winterhold/variant.c: https://review.coreboot.org/c/coreboot/+/68940/comment/5fa8769e_736b97cb PS2, Line 8: dxio_descriptors[SD].link_aspm = ASPM_DISABLED; Why is this necessary if it's disabled in `src/mainboard/google/skyrim/port_descriptors.c` also? -- To view, visit https://review.coreboot.org/c/coreboot/+/68940 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If080cdb517a3f22aa89c8053fb6bba9e931c6f76 Gerrit-Change-Number: 68940 Gerrit-PatchSet: 2 Gerrit-Owner: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Gerrit-Reviewer: Eric Peers <epeers(a)google.com> Gerrit-Reviewer: Isaac Lee <isaaclee(a)google.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Karthikeyan Ramasubramanian <kramasub(a)chromium.org> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Moises Garcia <moisesgarcia(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Gerrit-Attention: Isaac Lee <isaaclee(a)google.com> Gerrit-Attention: Jon Murphy <jpmurphy(a)google.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Eric Peers <epeers(a)google.com> Gerrit-Attention: Moises Garcia <moisesgarcia(a)google.com> Gerrit-Attention: Karthikeyan Ramasubramanian <kramasub(a)chromium.org> Gerrit-Comment-Date: Fri, 28 Oct 2022 16:30:11 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tim Van Patten <timvp(a)google.com> Gerrit-MessageType: comment

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[M] Change in coreboot[master]: mb/google/skyrim/var/winterhold: Override dxio to disable EMMC ASPM
by Tim Van Patten (Code Review) 28 Oct '22

28 Oct '22

Attention is currently required from: Raul Rangel, Jason Nien, EricKY Cheng, Isaac Lee, Jon Murphy, Martin Roth, Eric Peers, Moises Garcia, Karthikeyan Ramasubramanian. Tim Van Patten has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68940 ) Change subject: mb/google/skyrim/var/winterhold: Override dxio to disable EMMC ASPM ...................................................................... Patch Set 2: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/68940/comment/646ee718_cf188eeb PS2, Line 11: BUG=b:249914847 This Whiterun-specific bug is dup'ed to b/245550573, since the issue affects all Skyrim boards. Rather than checking in on-off workarounds, maybe we should disable ASPM for all Skyrim boards until b/245550573 is root-caused/fixed. Patchset: PS2: T -- To view, visit https://review.coreboot.org/c/coreboot/+/68940 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If080cdb517a3f22aa89c8053fb6bba9e931c6f76 Gerrit-Change-Number: 68940 Gerrit-PatchSet: 2 Gerrit-Owner: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Gerrit-Reviewer: Eric Peers <epeers(a)google.com> Gerrit-Reviewer: Isaac Lee <isaaclee(a)google.com> Gerrit-Reviewer: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Reviewer: Jon Murphy <jpmurphy(a)google.com> Gerrit-Reviewer: Karthikeyan Ramasubramanian <kramasub(a)chromium.org> Gerrit-Reviewer: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Reviewer: Moises Garcia <moisesgarcia(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Tim Van Patten <timvp(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Jason Nien <jason.nien(a)amd.corp-partner.google.com> Gerrit-Attention: EricKY Cheng <ericky_cheng(a)compal.corp-partner.google.com> Gerrit-Attention: Isaac Lee <isaaclee(a)google.com> Gerrit-Attention: Jon Murphy <jpmurphy(a)google.com> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Eric Peers <epeers(a)google.com> Gerrit-Attention: Moises Garcia <moisesgarcia(a)google.com> Gerrit-Attention: Karthikeyan Ramasubramanian <kramasub(a)chromium.org> Gerrit-Comment-Date: Fri, 28 Oct 2022 16:27:25 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[XL] Change in coreboot[master]: util/docker/coreboot.org-status: Rewrite parser
by Patrick Georgi (Code Review) 28 Oct '22

28 Oct '22

Attention is currently required from: Patrick Georgi, Martin L Roth, Maxim Polyakov, ron minnich. Hello build bot (Jenkins), Martin L Roth, Maxim Polyakov, Angel Pons, Arthur Heymans, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/59958 to look at the new patch set (#17). Change subject: util/docker/coreboot.org-status: Rewrite parser ...................................................................... util/docker/coreboot.org-status: Rewrite parser The current tool is a shell script that mixes data collection and HTML generation and is generally a pain to work with. It takes 15 minutes to run. The new tool is written in go, collects all data first, then generates the output HTML from the data and a single template, and finishes in 10 seconds. The goal in this version is to produce output as similar as possible to the output of the shell script. Some difference will remain because the shell script returns some trash data whose reproduction would require more effort than is worth. Change-Id: I4fab86d24088e4f9eff434c21ce9caa077f3f9e2 Signed-off-by: Patrick Georgi <pgeorgi(a)google.com> --- A util/docker/coreboot.org-status/board-status.html/boards.go A util/docker/coreboot.org-status/board-status.html/go.mod A util/docker/coreboot.org-status/board-status.html/go.sum A util/docker/coreboot.org-status/board-status.html/logs.go A util/docker/coreboot.org-status/board-status.html/status-to-html.go A util/docker/coreboot.org-status/board-status.html/templates/board-status.html A util/docker/coreboot.org-status/board-status.html/types.go 7 files changed, 1,188 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/58/59958/17 -- To view, visit https://review.coreboot.org/c/coreboot/+/59958 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4fab86d24088e4f9eff434c21ce9caa077f3f9e2 Gerrit-Change-Number: 59958 Gerrit-PatchSet: 17 Gerrit-Owner: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: ron minnich <rminnich(a)gmail.com> Gerrit-Attention: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Attention: ron minnich <rminnich(a)gmail.com> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[master]: lint/checkpatch: consider leading + in the line length limit check
by Felix Held (Code Review) 28 Oct '22

28 Oct '22

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/68869 ) Change subject: lint/checkpatch: consider leading + in the line length limit check ...................................................................... lint/checkpatch: consider leading + in the line length limit check The line length limit in coreboot's coding style guidelines applies to the final file, while checkpatch currently checks the patch line length. Since patches´ lines start with a `+` (only added content is checked), the line length being checked is one character longer than the actual content. Increase max_line_length by 1 to take this into account. Change-Id: I8da45bb0d5fbe7d0e12c8b181cf01e5685186bf6 Signed-off-by: Michael Niewöhner <foss(a)mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/68869 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Tim Wawrzynczak <inforichland(a)gmail.com> --- M util/lint/checkpatch.pl 1 file changed, 22 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Tim Wawrzynczak: Looks good to me, approved diff --git a/util/lint/checkpatch.pl b/util/lint/checkpatch.pl index ef2faee..95296b9 100755 --- a/util/lint/checkpatch.pl +++ b/util/lint/checkpatch.pl @@ -3338,6 +3338,7 @@ # if LONG_LINE is ignored, the other 2 types are also ignored # + $max_line_length += 1; # consider leading + in patches if ($line =~ /^\+/ && $length > $max_line_length) { my $msg_type = "LONG_LINE"; -- To view, visit https://review.coreboot.org/c/coreboot/+/68869 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8da45bb0d5fbe7d0e12c8b181cf01e5685186bf6 Gerrit-Change-Number: 68869 Gerrit-PatchSet: 3 Gerrit-Owner: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[master]: mb/amd/mandolin: introduce mb_get_fch_irq_mapping
by 9elements QA (Code Review) 28 Oct '22

28 Oct '22

9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/68847 ) Change subject: mb/amd/mandolin: introduce mb_get_fch_irq_mapping ...................................................................... Patch Set 2: Automatic boot test returned (PASS/FAIL/TOTAL): 13 / 3 / 16 FAIL: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES_ and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/131528 FAIL: x86_32 "Hermes CFL" , build config PRODRIVE_HERMES and payload TianoCore_UefiPayloadPkg : https://lava.9esec.io/r/131527 PASS: x86_32 "ThinkPad T500" , build config LENOVO_T500 and payload SeaBIOS : https://lava.9esec.io/r/131526 PASS: x86_32 "HP Z220 SFF Workstation" , build config HP_Z220_SFF_WORKSTATION and payload LinuxBoot_BB_kexec : https://lava.9esec.io/r/131525 PASS: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload TianoCore : https://lava.9esec.io/r/131524 PASS: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload SeaBIOS : https://lava.9esec.io/r/131523 PASS: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload TianoCore : https://lava.9esec.io/r/131522 PASS: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload SeaBIOS : https://lava.9esec.io/r/131521 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35_SMM_TSEG and payload TianoCore : https://lava.9esec.io/r/131520 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35_SMM_TSEG and payload SeaBIOS : https://lava.9esec.io/r/131519 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35 and payload TianoCore : https://lava.9esec.io/r/131518 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35 and payload SeaBIOS : https://lava.9esec.io/r/131517 PASS: x86_64 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_X86_64 and payload SeaBIOS : https://lava.9esec.io/r/131516 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ASAN and payload SeaBIOS : https://lava.9esec.io/r/131515 FAIL: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ and payload SeaBIOS : https://lava.9esec.io/r/131514 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX and payload SeaBIOS : https://lava.9esec.io/r/131513 Please note: This test is under development and might not be accurate at all! -- To view, visit https://review.coreboot.org/c/coreboot/+/68847 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9c39ea9de5ebbf70d2c5a87bfdfe270796548c5c Gerrit-Change-Number: 68847 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-Comment-Date: Fri, 28 Oct 2022 15:07:37 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit October 2022