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Change subject: MAINTAINERS: Make Misc Fixes
......................................................................
Patch Set 2:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/68709/comment/1e91a905_599e37ce
PS2, Line 12: - Remove maintainers who don't have +2 rights in gerrit.
> This is rather confusing. […]
To get +2 rights, you need "More than a one-off commit". +2, -1 rights are pretty easy to get. It's merge rights that are hard to get.
Someone with no coreboot commits (and who only reviewed the MAINTAINERS commits that added them) isn't, and isn't going to be able to be, a good maintainer in my opinion. It's not like it's even hard to make a few commits if you're interested in being a maintainer.
This is stated on line 57 in the file.
If you (or anyone else) disagree with me, I'm happy to discuss it in the coreboot meeting. I'm not trying to exclude anyone who wants to be a maintainer, but if you want to be a maintainer, I'd expect a little effort to be put into it.
If you just want to be notified of changes to a particular area, use the tools in gerrit for that.
File MAINTAINERS:
https://review.coreboot.org/c/coreboot/+/68709/comment/5906f3cf_8cad3054
PS2, Line 697: MAINTAINED
> `Maintained` […]
Yeah - it's hard. I'm not adding anyone's name who isn't volunteering for it.
All I'm saying here is that it's maintained, which it is. By Google, AMD and Intel engineers, along with community members.
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Change subject: ec/google/chromec: Add DPTC support for host event 1/2/9
......................................................................
Patch Set 13: Code-Review+1
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Change subject: MAINTAINERS: Add orphaned mainboards
......................................................................
Patch Set 2:
(1 comment)
File MAINTAINERS:
https://review.coreboot.org/c/coreboot/+/68706/comment/80bdb90d_6def42c0
PS1, Line 481: y
> typo: u
thanks. fixed.
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Change subject: allocator_v4: Use memranges only for toplevel
......................................................................
Patch Set 11:
(1 comment)
Patchset:
PS11:
Hi Nico, I took the liberty to rebase your patch.
Only change I made is to define assign_resource_cb() as a static function to avoid this check_patch complain:
open brace '{' following function definitions go on the next line
Please help to review.
Thanks, Jonathan
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Change subject: allocator_v4: Use memranges only for toplevel
......................................................................
allocator_v4: Use memranges only for toplevel
During phase 1 of the resource allocation we gather all the size
requirements. Starting from the leafs of our devicetree, we cal-
culate the requirements per bus, until we reach the resource do-
main.
However, because alignment plays a role, we can't just accumulate
the sizes of all resources on a bus. Instead, we already sort all
the resources per bus to predict their relative placement, inclu-
ding alignment gaps. Then, phase 2 has to perform the final allo-
cations with the exact same relative placement.
This patch introduces a very simple mechanism to avoid repeating
all the calculations: In phase 1, we note the relative `base` of
each resource on a bus. And after we allocated all the resources
directly below the domain in phase 2, we add the absolute `base`
of bridge resources to the relative `base` of child resources.
This saves most of the computational complexity in phase 2. How-
ever, with a shallow devicetree with most devices directly below
the domain, this won't have a measurable impact.
Example after phase 1:
domain
|
`-- bridge #0
| res #0, base 0x000000 (relative),
| size 12M, align 8M
|
|-- device #0
| res #1, base 0x800000 (relative),
| size 4M, align 4M
|
`-- bridge #1
| res #2, base 0x000000 (relative),
| size 8M, align 8M
|
`-- device #1
res #3, base 0x000000 (relative),
size 8M, align 8M
After phase 2 allocation at the domain level (assuming res #0 got
0xa000000 assigned):
domain
|
`-- bridge #0
| res #0, base 0xa000000 (absolute),
| size 12M, align 8M
|
|-- device #0
| res #1, base 0x800000 (relative),
| size 4M, align 4M
|
`-- bridge #1
| res #2, base 0x000000 (relative),
| size 8M, align 8M
|
`-- device #1
res #3, base 0x000000 (relative),
size 8M, align 8M
Now, all we need to do is to add the `base` of bridge resources
recursively. Starting with resources on the bus below bridge #0:
domain
|
`-- bridge #0
| res #0, base 0xa000000 (absolute),
| size 12M, align 8M
|
|-- device #0
| res #1, base 0xa800000 (absolute),
| size 4M, align 4M
|
`-- bridge #1
| res #2, base 0xa000000 (absolute),
| size 8M, align 8M
|
`-- device #1
res #3, base 0x000000 (relative),
size 8M, align 8M
And finally for resources on the bus below bridge #1:
domain
|
`-- bridge #0
| res #0, base 0xa000000 (absolute),
| size 12M, align 8M
|
|-- device #0
| res #1, base 0xa800000 (absolute),
| size 4M, align 4M
|
`-- bridge #1
| res #2, base 0xa000000 (absolute),
| size 8M, align 8M
|
`-- device #1
res #3, base 0xa000000 (absolute),
size 8M, align 8M
Change-Id: I70c700318a85f6760f27597730bc9c9a86dbe6b3
Signed-off-by: Nico Huber <nico.h(a)gmx.de>
---
M src/device/resource_allocator_v4.c
1 file changed, 257 insertions(+), 143 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/20/65420/11
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Change subject: allocator_v4: Use memranges only for toplevel
......................................................................
Patch Set 10:
(1 comment)
File src/device/resource_allocator_v4.c:
Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-161595):
https://review.coreboot.org/c/coreboot/+/65420/comment/3efa1d66_97318ee4
PS10, Line 561: void assign_resource_cb(void *param, struct device *dev, struct resource *res)
open brace '{' following function definitions go on the next line
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Jonathan Zhang has uploaded a new patch set (#10) to the change originally created by Nico Huber. ( https://review.coreboot.org/c/coreboot/+/65420 )
Change subject: allocator_v4: Use memranges only for toplevel
......................................................................
allocator_v4: Use memranges only for toplevel
During phase 1 of the resource allocation we gather all the size
requirements. Starting from the leafs of our devicetree, we cal-
culate the requirements per bus, until we reach the resource do-
main.
However, because alignment plays a role, we can't just accumulate
the sizes of all resources on a bus. Instead, we already sort all
the resources per bus to predict their relative placement, inclu-
ding alignment gaps. Then, phase 2 has to perform the final allo-
cations with the exact same relative placement.
This patch introduces a very simple mechanism to avoid repeating
all the calculations: In phase 1, we note the relative `base` of
each resource on a bus. And after we allocated all the resources
directly below the domain in phase 2, we add the absolute `base`
of bridge resources to the relative `base` of child resources.
This saves most of the computational complexity in phase 2. How-
ever, with a shallow devicetree with most devices directly below
the domain, this won't have a measurable impact.
Example after phase 1:
domain
|
`-- bridge #0
| res #0, base 0x000000 (relative),
| size 12M, align 8M
|
|-- device #0
| res #1, base 0x800000 (relative),
| size 4M, align 4M
|
`-- bridge #1
| res #2, base 0x000000 (relative),
| size 8M, align 8M
|
`-- device #1
res #3, base 0x000000 (relative),
size 8M, align 8M
After phase 2 allocation at the domain level (assuming res #0 got
0xa000000 assigned):
domain
|
`-- bridge #0
| res #0, base 0xa000000 (absolute),
| size 12M, align 8M
|
|-- device #0
| res #1, base 0x800000 (relative),
| size 4M, align 4M
|
`-- bridge #1
| res #2, base 0x000000 (relative),
| size 8M, align 8M
|
`-- device #1
res #3, base 0x000000 (relative),
size 8M, align 8M
Now, all we need to do is to add the `base` of bridge resources
recursively. Starting with resources on the bus below bridge #0:
domain
|
`-- bridge #0
| res #0, base 0xa000000 (absolute),
| size 12M, align 8M
|
|-- device #0
| res #1, base 0xa800000 (absolute),
| size 4M, align 4M
|
`-- bridge #1
| res #2, base 0xa000000 (absolute),
| size 8M, align 8M
|
`-- device #1
res #3, base 0x000000 (relative),
size 8M, align 8M
And finally for resources on the bus below bridge #1:
domain
|
`-- bridge #0
| res #0, base 0xa000000 (absolute),
| size 12M, align 8M
|
|-- device #0
| res #1, base 0xa800000 (absolute),
| size 4M, align 4M
|
`-- bridge #1
| res #2, base 0xa000000 (absolute),
| size 8M, align 8M
|
`-- device #1
res #3, base 0xa000000 (absolute),
size 8M, align 8M
Change-Id: I70c700318a85f6760f27597730bc9c9a86dbe6b3
Signed-off-by: Nico Huber <nico.h(a)gmx.de>
---
M src/device/resource_allocator_v4.c
1 file changed, 258 insertions(+), 144 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/20/65420/10
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Hello build bot (Jenkins), Angel Pons,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/68707
to look at the new patch set (#2).
Change subject: MAINTAINERS: Update mainboards
......................................................................
MAINTAINERS: Update mainboards
- AMD reference boards are maintained at least for odd fixes.
- Google panther has become a variant of Beltino, so remove it.
- Remove people whose email addresses are bouncing email.
- Alphabetize list
Signed-off-by: Martin Roth <gaumless(a)gmail.com>
Change-Id: Ic6ecaae77df2f2edaf724160bce04c038cbd115e
---
M MAINTAINERS
1 file changed, 24 insertions(+), 20 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/68707/2
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