coreboot-gerrit January 2022

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Change in coreboot[master]: soc/mediatek/mt8186: Increase CBFS_MCACHE size to 8KiB
by Paul Menzel (Code Review) 04 Jan '22

04 Jan '22

Attention is currently required from: Hung-Te Lin, Rex-BC Chen. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60529 ) Change subject: soc/mediatek/mt8186: Increase CBFS_MCACHE size to 8KiB ...................................................................... Patch Set 9: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/60529 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1e627ede3774665575006f752f89101e3c5bde9f Gerrit-Change-Number: 60529 Gerrit-PatchSet: 9 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Comment-Date: Tue, 04 Jan 2022 14:03:08 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya/var/kano: Disable autonomous GPIO power management
by Paul Menzel (Code Review) 04 Jan '22

04 Jan '22

Attention is currently required from: David Wu, Nick Vaccaro. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60388 ) Change subject: mb/google/brya/var/kano: Disable autonomous GPIO power management ...................................................................... Patch Set 3: (3 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/60388/comment/ff5f8ac0_2b0417e3 PS3, Line 11: Is the cr50 FW being fixed, so this is just a workaround? File src/mainboard/google/brya/variants/kano/overridetree.cb: https://review.coreboot.org/c/coreboot/+/60388/comment/c195541b_33aeff49 PS3, Line 18: disabled disables https://review.coreboot.org/c/coreboot/+/60388/comment/fd7100b1_4d15bc71 PS3, Line 18: otherwise since? -- To view, visit https://review.coreboot.org/c/coreboot/+/60388 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9607af42a00c1b5f38c6e4e0effdeeaba18af5ff Gerrit-Change-Number: 60388 Gerrit-PatchSet: 3 Gerrit-Owner: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Tue, 04 Jan 2022 14:02:27 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya/var/taeko: Run-time probe for NVMe SSD and MMC
by Paul Menzel (Code Review) 04 Jan '22

04 Jan '22

Attention is currently required from: Kevin Chang, Joey Peng, YH Lin. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60341 ) Change subject: mb/google/brya/var/taeko: Run-time probe for NVMe SSD and MMC ...................................................................... Patch Set 14: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/60341 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4486f23ea02374c84a9b1ce04f568d78aeabd573 Gerrit-Change-Number: 60341 Gerrit-PatchSet: 14 Gerrit-Owner: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: YH Lin <yueherngl(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Joey Peng <joey.peng(a)lcfc.corp-partner.google.com> Gerrit-CC: Melo Chuang <melo.chuang(a)lcfc.corp-partner.google.com> Gerrit-CC: Rasheed Hsueh <rasheed.hsueh(a)lcfc.corp-partner.google.com> Gerrit-Attention: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com> Gerrit-Attention: Joey Peng <joey.peng(a)lcfc.corp-partner.google.com> Gerrit-Attention: YH Lin <yueherngl(a)chromium.org> Gerrit-Comment-Date: Tue, 04 Jan 2022 14:00:42 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya/var/brask: Change TPM I2C to I2C1
by Paul Menzel (Code Review) 04 Jan '22

04 Jan '22

Attention is currently required from: David Wu, Tim Wawrzynczak, Nick Vaccaro, Alan Huang, Zhuohao Lee. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60439 ) Change subject: mb/google/brya/var/brask: Change TPM I2C to I2C1 ...................................................................... Patch Set 4: Code-Review+1 (3 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/60439/comment/367a9715_86ab9cef PS4, Line 9: latest schematics Boards with older schematics were not sold, right? https://review.coreboot.org/c/coreboot/+/60439/comment/70e6bc97_ac43bc25 PS4, Line 9: The latest schematics changes the TPM I2C from I2C3 to I2C1. : This patch moves the TPM I2C setting from the board layer to the : baseboard and fixes the TPM I2C bus assignment. Please either add a blank line between paragraphs, or reflow for 72 characters per line. File src/mainboard/google/brya/variants/baseboard/brask/devicetree.cb: https://review.coreboot.org/c/coreboot/+/60439/comment/4e972149_478c08ad PS4, Line 91: .rise_time_ns = 600, : .fall_time_ns = 400, : .data_hold_time_ns = 50, Where are these values from? -- To view, visit https://review.coreboot.org/c/coreboot/+/60439 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I70d5a8fde1866c5dd4587ab5af2d41724c60ee0c Gerrit-Change-Number: 60439 Gerrit-PatchSet: 4 Gerrit-Owner: Zhuohao Lee <zhuohao(a)chromium.org> Gerrit-Reviewer: Alan Huang <alan-huang(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-CC: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Attention: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Alan Huang <alan-huang(a)quanta.corp-partner.google.com> Gerrit-Attention: Zhuohao Lee <zhuohao(a)chromium.org> Gerrit-Comment-Date: Tue, 04 Jan 2022 14:00:10 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: payloads/tianocore: Add option to use F7 as Boot Manager key
by Sean Rhodes (Code Review) 04 Jan '22

04 Jan '22

Attention is currently required from: Martin Roth - Personal, Stefan Reinauer. Hello build bot (Jenkins), Martin Roth - Personal, Stefan Reinauer, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/60761 to look at the new patch set (#3). Change subject: payloads/tianocore: Add option to use F7 as Boot Manager key ...................................................................... payloads/tianocore: Add option to use F7 as Boot Manager key The coreboot version of Tianocore maps Escape to the boot menu. This is problematic for many Linux distributions that use GRUB, as this also maps Escape to access it's menu. This option can be used to use F7 to replace Escape Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Change-Id: Ided23e82161488768aa3b7d54ab17e9c922d6d11 --- M payloads/external/Makefile.inc M payloads/external/tianocore/Kconfig M payloads/external/tianocore/Makefile 3 files changed, 12 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/61/60761/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/60761 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ided23e82161488768aa3b7d54ab17e9c922d6d11 Gerrit-Change-Number: 60761 Gerrit-PatchSet: 3 Gerrit-Owner: Sean Rhodes <admin(a)starlabs.systems> Gerrit-Reviewer: Martin Roth - Personal <martinroth(a)google.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Martin Roth - Personal <martinroth(a)google.com> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: sb/intel: Use `bool` for PCIe coalescing option
by 9elements QA (Code Review) 04 Jan '22

04 Jan '22

9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60416 ) Change subject: sb/intel: Use `bool` for PCIe coalescing option ...................................................................... Patch Set 2: Automatic boot test returned (PASS/FAIL/TOTAL): 9 / 1 / 10 PASS: x86_32 "ThinkPad T500" , build config LENOVO_T500 and payload SeaBIOS : https://lava.9esec.io/r/87497 PASS: x86_32 "HP Z220 SFF Workstation" , build config HP_Z220_SFF_WORKSTATION and payload LinuxBoot_BB_kexec : https://lava.9esec.io/r/87496 PASS: x86_64 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC.X86_64 and payload SeaBIOS : https://lava.9esec.io/r/87495 PASS: x86_32 "HP Compaq 8200 Elite SFF PC" , build config HP_COMPAQ_8200_ELITE_SFF_PC and payload SeaBIOS : https://lava.9esec.io/r/87494 FAIL: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35_SMM_TSEG and payload SeaBIOS : https://lava.9esec.io/r/87493 PASS: x86_32 "QEMU x86 q35/ich9" , build config EMULATION_QEMU_X86_Q35 and payload SeaBIOS : https://lava.9esec.io/r/87492 PASS: x86_64 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_X86_64 and payload SeaBIOS : https://lava.9esec.io/r/87491 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ASAN and payload SeaBIOS : https://lava.9esec.io/r/87490 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX_ and payload SeaBIOS : https://lava.9esec.io/r/87489 PASS: x86_32 "QEMU x86 i440fx/piix4" , build config EMULATION_QEMU_X86_I440FX and payload SeaBIOS : https://lava.9esec.io/r/87488 Please note: This test is under development and might not be accurate at all! -- To view, visit https://review.coreboot.org/c/coreboot/+/60416 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6a4dfe277a8f83a9eb58515fc4eaa2fee0747ddb Gerrit-Change-Number: 60416 Gerrit-PatchSet: 2 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Evgeny Zinoviev <me(a)ch1p.io> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: 9elements QA <hardwaretestrobot(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Tue, 04 Jan 2022 13:21:30 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/mediatek/mt8186: Increase CBFS_MCACHE size to 8KiB
by Rex-BC Chen (Code Review) 04 Jan '22

04 Jan '22

Attention is currently required from: Hung-Te Lin, Paul Menzel. Rex-BC Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60529 ) Change subject: soc/mediatek/mt8186: Increase CBFS_MCACHE size to 8KiB ...................................................................... Patch Set 10: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/60529 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1e627ede3774665575006f752f89101e3c5bde9f Gerrit-Change-Number: 60529 Gerrit-PatchSet: 10 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Tue, 04 Jan 2022 13:19:13 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/mediatek/mt8186: Increase CBFS_MCACHE size to 8KiB
by Rex-BC Chen (Code Review) 04 Jan '22

04 Jan '22

Attention is currently required from: Hung-Te Lin, Paul Menzel. Rex-BC Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60529 ) Change subject: soc/mediatek/mt8186: Increase CBFS_MCACHE size to 8KiB ...................................................................... Patch Set 10: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/60529/comment/b9854910_79e1e8f5 PS9, Line 10: increase it by 1KiB. > maybe: […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/60529 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1e627ede3774665575006f752f89101e3c5bde9f Gerrit-Change-Number: 60529 Gerrit-PatchSet: 10 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Tue, 04 Jan 2022 13:18:51 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Hung-Te Lin <hungte(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/mediatek/mt8186: Increase CBFS_MCACHE size to 8KiB
by Rex-BC Chen (Code Review) 04 Jan '22

04 Jan '22

Attention is currently required from: Rex-BC Chen, Paul Menzel. Hello Hung-Te Lin, build bot (Jenkins), Yu-Ping Wu, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/60529 to look at the new patch set (#10). Change subject: soc/mediatek/mt8186: Increase CBFS_MCACHE size to 8KiB ...................................................................... soc/mediatek/mt8186: Increase CBFS_MCACHE size to 8KiB The current CBFS mcache size (roughly 7KiB) is insufficient for mt8186, so we need to increase it by 1KiB (and decrease the stack by 1KiB). Error logs: CBFS ERROR: mcache overflow, should increase CBFS_MCACHE size! CBFS: mcache @0x0010e004 built for 63 files, used 0xde4 of 0xdfc bytes BUG=b:202871018 TEST=no cbfs error logs. Signed-off-by: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Change-Id: I1e627ede3774665575006f752f89101e3c5bde9f --- M src/soc/mediatek/mt8186/include/soc/memlayout.ld 1 file changed, 7 insertions(+), 7 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/60529/10 -- To view, visit https://review.coreboot.org/c/coreboot/+/60529 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1e627ede3774665575006f752f89101e3c5bde9f Gerrit-Change-Number: 60529 Gerrit-PatchSet: 10 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/mediatek/mt8186: Increase CBFS_MCACHE size to 8 KiB
by Hung-Te Lin (Code Review) 04 Jan '22

04 Jan '22

Attention is currently required from: Rex-BC Chen, Paul Menzel. Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60529 ) Change subject: soc/mediatek/mt8186: Increase CBFS_MCACHE size to 8 KiB ...................................................................... Patch Set 9: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/60529/comment/2e5c9bc8_278e24ae PS9, Line 10: increase it by 1KiB. maybe: we need to increase it by 1KiB (and decrease the stack by 1KiB). -- To view, visit https://review.coreboot.org/c/coreboot/+/60529 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1e627ede3774665575006f752f89101e3c5bde9f Gerrit-Change-Number: 60529 Gerrit-PatchSet: 9 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Tue, 04 Jan 2022 13:02:46 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit January 2022