coreboot-gerrit January 2022

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: [TESTME]util/lint: update checkpatch.pl to latest linux version
by Paul Menzel (Code Review) 05 Jan '22

05 Jan '22

Attention is currently required from: Martin Roth, HAOUAS Elyes. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60804 ) Change subject: [TESTME]util/lint: update checkpatch.pl to latest linux version ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/60804/comment/96feffa4_d0a50df5 PS2, Line 7: latest Please mention the exact tag/version. -- To view, visit https://review.coreboot.org/c/coreboot/+/60804 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ife95563ba61083cc19a383f3a9372466625e2ee6 Gerrit-Change-Number: 60804 Gerrit-PatchSet: 2 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Comment-Date: Wed, 05 Jan 2022 22:14:51 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: util/ifdtool: Add additional regions for platforms that support them.
by Jeff Daly (Code Review) 05 Jan '22

05 Jan '22

Attention is currently required from: Paul Menzel, Stefan Reinauer, Angel Pons, Kyösti Mälkki. Hello build bot (Jenkins), Stefan Reinauer, Angel Pons, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/60736 to look at the new patch set (#5). Change subject: util/ifdtool: Add additional regions for platforms that support them. ...................................................................... util/ifdtool: Add additional regions for platforms that support them. Some Intel SoCs support additional IFD regions for things like embedded LAN firmware or Innovation Engine firmware, etc. Signed-off-by: Jeff Daly <jeffd(a)silicom-usa.com> Change-Id: I64cc1d787f15a01dff7db89218410228fd0082a6 --- M util/ifdtool/ifdtool.c M util/ifdtool/ifdtool.h 2 files changed, 30 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/60736/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/60736 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I64cc1d787f15a01dff7db89218410228fd0082a6 Gerrit-Change-Number: 60736 Gerrit-PatchSet: 5 Gerrit-Owner: Jeff Daly <jeffd(a)silicom-usa.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/brya/var/taniks:Change probe for audio 4 channel speaker
by Tim Wawrzynczak (Code Review) 05 Jan '22

05 Jan '22

Attention is currently required from: YH Lin, Joey Peng, Nick Vaccaro. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60532 ) Change subject: mb/google/brya/var/taniks:Change probe for audio 4 channel speaker ...................................................................... Patch Set 2: Code-Review+1 (3 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/60532/comment/c17bc6a9_47a4a1e0 PS2, Line 7: :C nit: space after `:` https://review.coreboot.org/c/coreboot/+/60532/comment/86ef4a01_62fa595e PS2, Line 9: .C nit: space after `.` Patchset: PS2: +Nick, https://crrev.com/c/3358671 will need a Cq-Depend on this one when it lands in the chromium tree -- To view, visit https://review.coreboot.org/c/coreboot/+/60532 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2986bd212cef47f70dfeedc642a8db3314c947f6 Gerrit-Change-Number: 60532 Gerrit-PatchSet: 2 Gerrit-Owner: Joey Peng <joey.peng(a)lcfc.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: YH Lin <yueherngl(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Allen Cheng <allen.cheng(a)lcfc.corp-partner.google.com> Gerrit-CC: Jerry2 Huang <jerry2.huang(a)lcfc.corp-partner.google.com> Gerrit-CC: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com> Gerrit-CC: Sunshine Chao <sunshine.chao(a)lcfc.corp-partner.google.com> Gerrit-Attention: YH Lin <yueherngl(a)google.com> Gerrit-Attention: Joey Peng <joey.peng(a)lcfc.corp-partner.google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Comment-Date: Wed, 05 Jan 2022 21:48:47 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya/var/vell: Add MIPI camera info
by Tim Wawrzynczak (Code Review) 05 Jan '22

05 Jan '22

Attention is currently required from: Kevin Chiu, Jimmy Su, Robert Chen, Wisley Chen, Shon Wang. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60276 ) Change subject: mb/google/brya/var/vell: Add MIPI camera info ...................................................................... Patch Set 14: (1 comment) Patchset: PS14: Please rebase on master; the build error is not this patch. -- To view, visit https://review.coreboot.org/c/coreboot/+/60276 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I43de859cd0cdd9fe21c16cabfad511ed0b368ee3 Gerrit-Change-Number: 60276 Gerrit-PatchSet: 14 Gerrit-Owner: Shon Wang <shon.wang(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Kevin Chiu <Kevin.Chiu(a)quantatw.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Wisley Chen <wisley.chen(a)quanta.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jimmy Su <jimmy.su(a)intel.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Robert Chen <robert.chen(a)quanta.corp-partner.google.com> Gerrit-Attention: Kevin Chiu <Kevin.Chiu(a)quantatw.com> Gerrit-Attention: Jimmy Su <jimmy.su(a)intel.corp-partner.google.com> Gerrit-Attention: Robert Chen <robert.chen(a)quanta.corp-partner.google.com> Gerrit-Attention: Wisley Chen <wisley.chen(a)quanta.corp-partner.google.com> Gerrit-Attention: Shon Wang <shon.wang(a)quanta.corp-partner.google.com> Gerrit-Comment-Date: Wed, 05 Jan 2022 21:42:22 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/volteer/var/delbin: Add fw_config probe for ALC5682-VD & VS
by Tim Wawrzynczak (Code Review) 05 Jan '22

05 Jan '22

Tim Wawrzynczak has submitted this change. ( https://review.coreboot.org/c/coreboot/+/59557 ) Change subject: mb/google/volteer/var/delbin: Add fw_config probe for ALC5682-VD & VS ...................................................................... mb/google/volteer/var/delbin: Add fw_config probe for ALC5682-VD & VS ALC5682-VD/ALC5682I-VS load different kernel driver by different hid name. Update hid name depending on the AUDIO_CODEC_SOURCE field of fw_config. Define FW_CONFIG bits 41 - 43 (SSFC bits 9 - 11) for codec selection. ALC5682-VD: _HID = "10EC5682" ALC5682I-VS: _HID = "RTL5682" BUG=b:204523176 BRANCH=volteer TEST=ALC5682-VD/ALC5682I-VS audio codec can work Signed-off-by: FrankChu <frank_chu(a)pegatron.corp-partner.google.com> Change-Id: Ieef638f78edd3428e572a76f06fb9c8757278971 Reviewed-on: https://review.coreboot.org/c/coreboot/+/59557 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Reviewed-by: Nick Vaccaro <nvaccaro(a)google.com> --- M src/mainboard/google/volteer/Kconfig M src/mainboard/google/volteer/variants/delbin/Makefile.inc M src/mainboard/google/volteer/variants/delbin/overridetree.cb A src/mainboard/google/volteer/variants/delbin/variant.c 4 files changed, 45 insertions(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Nick Vaccaro: Looks good to me, approved Tim Wawrzynczak: Looks good to me, approved diff --git a/src/mainboard/google/volteer/Kconfig b/src/mainboard/google/volteer/Kconfig index ced8d9d..c4d8e88 100644 --- a/src/mainboard/google/volteer/Kconfig +++ b/src/mainboard/google/volteer/Kconfig @@ -18,6 +18,7 @@ select DRIVERS_USB_ACPI select EC_GOOGLE_CHROMEEC select EC_GOOGLE_CHROMEEC_BOARDID + select EC_GOOGLE_CHROMEEC_INCLUDE_SSFC_IN_FW_CONFIG select EC_GOOGLE_CHROMEEC_LPC select EC_GOOGLE_CHROMEEC_SKUID select FW_CONFIG diff --git a/src/mainboard/google/volteer/variants/delbin/Makefile.inc b/src/mainboard/google/volteer/variants/delbin/Makefile.inc index 343c7db..2af91aa 100644 --- a/src/mainboard/google/volteer/variants/delbin/Makefile.inc +++ b/src/mainboard/google/volteer/variants/delbin/Makefile.inc @@ -5,3 +5,5 @@ bootblock-y += gpio.c ramstage-y += gpio.c + +ramstage-y += variant.c diff --git a/src/mainboard/google/volteer/variants/delbin/overridetree.cb b/src/mainboard/google/volteer/variants/delbin/overridetree.cb index 378d4e2..3ff6bb2 100644 --- a/src/mainboard/google/volteer/variants/delbin/overridetree.cb +++ b/src/mainboard/google/volteer/variants/delbin/overridetree.cb @@ -1,3 +1,10 @@ +fw_config + field AUDIO_CODEC_SOURCE 41 43 + option AUDIO_CODEC_UNPROVISIONED 0 + option AUDIO_CODEC_ALC5682 1 + option AUDIO_CODEC_ALC5682I_VS 2 + end +end chip soc/intel/tigerlake register "DdiPort1Hpd" = "0" register "DdiPort2Hpd" = "0" @@ -129,7 +136,7 @@ end # DPTF 0x9A03 device ref i2c0 on chip drivers/i2c/generic - register "hid" = ""10EC5682"" + # register "hid" is set in variant.c because of FW_CONFIG register "name" = ""RT58"" register "desc" = ""Headset Codec"" register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_F8)" diff --git a/src/mainboard/google/volteer/variants/delbin/variant.c b/src/mainboard/google/volteer/variants/delbin/variant.c new file mode 100644 index 0000000..f502a1a --- /dev/null +++ b/src/mainboard/google/volteer/variants/delbin/variant.c @@ -0,0 +1,34 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <baseboard/variants.h> +#include <fw_config.h> +#include <drivers/i2c/generic/chip.h> +#include <soc/pci_devs.h> + +extern struct chip_operations drivers_i2c_generic_ops; +static void audio_codec_update(void) +{ + const struct device_path codec_path[] = { + {.type = DEVICE_PATH_PCI, .pci.devfn = PCH_DEVFN_I2C0}, + {.type = DEVICE_PATH_I2C, .i2c.device = 0x1a} + }; + const struct device *codec = + find_dev_nested_path(pci_root_bus(), codec_path, + ARRAY_SIZE(codec_path)); + struct drivers_i2c_generic_config *config; + + if (!codec || (codec->chip_ops != &drivers_i2c_generic_ops) || + !codec->chip_info) + return; + config = codec->chip_info; + + if (fw_config_probe(FW_CONFIG(AUDIO_CODEC_SOURCE, AUDIO_CODEC_ALC5682))) + config->hid = "10EC5682"; + else if (fw_config_probe(FW_CONFIG(AUDIO_CODEC_SOURCE, + AUDIO_CODEC_ALC5682I_VS))) + config->hid = "RTL5682"; +} +void variant_devtree_update(void) +{ + audio_codec_update(); +} -- To view, visit https://review.coreboot.org/c/coreboot/+/59557 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ieef638f78edd3428e572a76f06fb9c8757278971 Gerrit-Change-Number: 59557 Gerrit-PatchSet: 10 Gerrit-Owner: Frank Chu <frank_chu(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Anson Tseng <ansontseng(a)google.com> Gerrit-Reviewer: Frank Chu <frank_chu(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Hank Lin <hank2_lin(a)pegatron.corp-partner.google.com> Gerrit-CC: Kane Chen <kane_chen(a)pegatron.corp-partner.google.com> Gerrit-CC: Ken Lu <ken_lu(a)pegatron.corp-partner.google.com> Gerrit-MessageType: merged

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Change in coreboot[master]: mb/google/volteer/var/delbin: Add fw_config probe for ALC5682-VD & VS
by Tim Wawrzynczak (Code Review) 05 Jan '22

05 Jan '22

Attention is currently required from: Anson Tseng, Frank Chu, Nick Vaccaro, Zhuohao Lee. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/59557 ) Change subject: mb/google/volteer/var/delbin: Add fw_config probe for ALC5682-VD & VS ...................................................................... Patch Set 9: Code-Review+2 (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/59557/comment/089f9bb9_282e0844 PS8, Line 18: TEST > ``` […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/59557 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ieef638f78edd3428e572a76f06fb9c8757278971 Gerrit-Change-Number: 59557 Gerrit-PatchSet: 9 Gerrit-Owner: Frank Chu <frank_chu(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Anson Tseng <ansontseng(a)google.com> Gerrit-Reviewer: Frank Chu <frank_chu(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Hank Lin <hank2_lin(a)pegatron.corp-partner.google.com> Gerrit-CC: Kane Chen <kane_chen(a)pegatron.corp-partner.google.com> Gerrit-CC: Ken Lu <ken_lu(a)pegatron.corp-partner.google.com> Gerrit-Attention: Anson Tseng <ansontseng(a)google.com> Gerrit-Attention: Frank Chu <frank_chu(a)pegatron.corp-partner.google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Attention: Zhuohao Lee <zhuohao(a)google.com> Gerrit-Comment-Date: Wed, 05 Jan 2022 21:41:41 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/common/block/pcie/rtd3: Update ACPI methods for CPU PCIe RPs
by Tim Wawrzynczak (Code Review) 05 Jan '22

05 Jan '22

Attention is currently required from: Tim Crawford, Cliff Huang, Subrata Banik, Maulik V Vaghela, Patrick Rudolph. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60183 ) Change subject: soc/intel/common/block/pcie/rtd3: Update ACPI methods for CPU PCIe RPs ...................................................................... Patch Set 4: (3 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/60183/comment/42fc428f_b8f95f4e PS4, Line 10: > next line may be? Done https://review.coreboot.org/c/coreboot/+/60183/comment/ff952ed3_65866d86 PS4, Line 12: > can you please also highlight here that you have dropped unused argument from pcie_rtd3_acpi_method_ […] Done File src/soc/intel/common/block/pcie/rtd3/rtd3.c: https://review.coreboot.org/c/coreboot/+/60183/comment/8eaec8fc_c08ab470 PS4, Line 269: /* Read port number of root port that this device is attached to. */ : pcie_rp = pci_read_config8(parent, PCH_PCIE_CFG_LCAP_PN); : if (pcie_rp == 0 || pcie_rp > CONFIG_MAX_ROOT_PORTS) { : printk(BIOS_ERR, "%s: Invalid root port number: %u\n", __func__, pcie_rp); : return; : } : /* Port number is 1-based, PMC IPC method expects 0-based. */ : pcie_rp--; > suggestion: can you please consider creating a static helper function that return the pch pci_rp num […] 👍 -- To view, visit https://review.coreboot.org/c/coreboot/+/60183 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I84a1affb32cb53e686dbe825d3c3a424715df873 Gerrit-Change-Number: 60183 Gerrit-PatchSet: 4 Gerrit-Owner: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.corp-partner.google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Crawford <tcrawford(a)system76.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Wed, 05 Jan 2022 21:40:56 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/common/block/pcie/rtd3: Update ACPI methods for CPU PCIe RPs
by Tim Wawrzynczak (Code Review) 05 Jan '22

05 Jan '22

Attention is currently required from: Tim Crawford, Cliff Huang, Maulik V Vaghela, Tim Wawrzynczak, Subrata Banik, Patrick Rudolph. Hello Tim Crawford, build bot (Jenkins), Cliff Huang, Cliff Huang, Subrata Banik, Maulik V Vaghela, Subrata Banik, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/60183 to look at the new patch set (#5). Change subject: soc/intel/common/block/pcie/rtd3: Update ACPI methods for CPU PCIe RPs ...................................................................... soc/intel/common/block/pcie/rtd3: Update ACPI methods for CPU PCIe RPs The PMC IPC method that is used for RTD3 support expects to be provided the virtual wire index instead of the LCAP PN for CPU PCIe RPs. Therefore, use the prior patches to update pcie_rp for CPU RPs. Note that an unused argument to pcie_rtd3_acpi_method_status() was also dropped. BUG=b:197983574 TEST=add rtd3 node under pcie4_0 in overridetree for brya0, boot and inspect the SSDT to see the PMC IPC parameters are as expected for the CPU RP, and the ModPhy power gating code is not found in the AML for the PEG port. Signed-off-by: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Change-Id: I84a1affb32cb53e686dbe825d3c3a424715df873 --- M src/soc/intel/common/block/pcie/rtd3/rtd3.c 1 file changed, 29 insertions(+), 11 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/83/60183/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/60183 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I84a1affb32cb53e686dbe825d3c3a424715df873 Gerrit-Change-Number: 60183 Gerrit-PatchSet: 5 Gerrit-Owner: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.corp-partner.google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Crawford <tcrawford(a)system76.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/alderlake: Hook up FSP-S CPU PCIe UPDs
by Tim Wawrzynczak (Code Review) 05 Jan '22

05 Jan '22

Attention is currently required from: Tim Crawford, Cliff Huang, Maulik V Vaghela, Patrick Rudolph, EricR Lai. Hello Tim Crawford, build bot (Jenkins), Cliff Huang, Subrata Banik, Maulik V Vaghela, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/60182 to look at the new patch set (#5). Change subject: soc/intel/alderlake: Hook up FSP-S CPU PCIe UPDs ...................................................................... soc/intel/alderlake: Hook up FSP-S CPU PCIe UPDs The Alder Lake chip.h file has pcie_rp_config entries for the CPU PCIe ports, but the UPDs are not set. This patch hooks up those config structs to the appropriate FSP-S UPDs. Signed-off-by: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Change-Id: Ibb2375e66d53b4b7567dbe88b941cd720fdad927 --- M src/soc/intel/alderlake/fsp_params.c 1 file changed, 22 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/60182/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/60182 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibb2375e66d53b4b7567dbe88b941cd720fdad927 Gerrit-Change-Number: 60182 Gerrit-PatchSet: 5 Gerrit-Owner: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Attention: Tim Crawford <tcrawford(a)system76.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/alderlake: Hook up FSP-S CPU PCIe UPDs
by Tim Wawrzynczak (Code Review) 05 Jan '22

05 Jan '22

Attention is currently required from: Tim Crawford, Cliff Huang, Maulik V Vaghela, Patrick Rudolph, EricR Lai. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60182 ) Change subject: soc/intel/alderlake: Hook up FSP-S CPU PCIe UPDs ...................................................................... Patch Set 4: (1 comment) Patchset: PS4: > Pcie UPDs are split between FSP-M and FSP-S, so we might need to program those accordingly :( FSP-M only controls which ones are enabled, while FSP-S programs LTR, etc. -- To view, visit https://review.coreboot.org/c/coreboot/+/60182 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibb2375e66d53b4b7567dbe88b941cd720fdad927 Gerrit-Change-Number: 60182 Gerrit-PatchSet: 4 Gerrit-Owner: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Attention: Tim Crawford <tcrawford(a)system76.com> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Comment-Date: Wed, 05 Jan 2022 21:29:08 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-MessageType: comment

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coreboot-gerrit January 2022