coreboot-gerrit July 2021

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: soc: common: gpio: Define a macro for the gpio offset
by Ravi Kumar Bokka (Code Review) 03 Jul '21

03 Jul '21

Attention is currently required from: Shelley Chen, Ravi kumar, Taniya Das. Ravi Kumar Bokka has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55948 ) Change subject: soc: common: gpio: Define a macro for the gpio offset ...................................................................... Patch Set 1: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/55948/comment/a0935317_6efee1b0 PS1, Line 7: soc: common: gpio > soc/qualcomm/common/gpio Ack -- To view, visit https://review.coreboot.org/c/coreboot/+/55948 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iefdde8f8331cf1df2e88a2c8915aefb4fa091d65 Gerrit-Change-Number: 55948 Gerrit-PatchSet: 1 Gerrit-Owner: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Reviewer: Taniya Das <tdas(a)codeaurora.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Gerrit-CC: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Attention: Taniya Das <tdas(a)codeaurora.org> Gerrit-Comment-Date: Fri, 02 Jul 2021 15:07:55 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Shelley Chen <shchen(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: [TESTONLY]do we use cbfs-relative base addresses as input??
by Arthur Heymans (Code Review) 03 Jul '21

03 Jul '21

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/56044 ) Change subject: [TESTONLY]do we use cbfs-relative base addresses as input?? ...................................................................... [TESTONLY]do we use cbfs-relative base addresses as input?? If no-one is using this, we might as well get rid of it? Change-Id: I87349e98d6aeac5d3f79c8a067982cd136a0b863 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M util/cbfstool/cbfstool.c 1 file changed, 7 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/44/56044/1 diff --git a/util/cbfstool/cbfstool.c b/util/cbfstool/cbfstool.c index 318104d..e42ddf8 100644 --- a/util/cbfstool/cbfstool.c +++ b/util/cbfstool/cbfstool.c @@ -799,6 +799,11 @@ size_t len_align = 0; uint32_t offset = param.baseaddress_assigned ? param.baseaddress : 0; + if (!IS_HOST_SPACE_ADDRESS(offset)) { + ERROR("TEST ERROR, do you use this?"); + return 1; + } + if (param.alignment && param.baseaddress_assigned) { ERROR("Cannot specify both alignment and base address\n"); return 1; @@ -1834,10 +1839,8 @@ " expand [-r fmap-region] " "Expand CBFS to span entire region\n" "OFFSETs:\n" - " Numbers accompanying the -b switch may be provided\n" - " in two possible formats: if their value is greater than\n" - " 0x80000000, they are interpreted as a top-aligned x86 memory\n" - " address; otherwise, they are treated as an offset into flash.\n" + " Numbers accompanying the -b switch are x86 memory mapped\n" + " flash addresses.\n" "ARCHes:\n", name, name ); print_supported_architectures(); -- To view, visit https://review.coreboot.org/c/coreboot/+/56044 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I87349e98d6aeac5d3f79c8a067982cd136a0b863 Gerrit-Change-Number: 56044 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newchange

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Change in coreboot[master]: Add public gerrit account
by Public Gerrit (Code Review) 03 Jul '21

03 Jul '21

Attention is currently required from: Martin Roth, Stefan Reinauer, David Hendricks, Angel Pons, Werner Zeh. Public Gerrit has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51208 ) Change subject: Add public gerrit account ...................................................................... Patch Set 4: (2 comments) Patchset: PS4: > Thanks Done File Documentation/getting_started/gerrit_guidelines.md: https://review.coreboot.org/c/coreboot/+/51208/comment/c029bea1_3df3a430 PS4, Line 323: edit anonymous > It was unclear to me at first what this was intended for - I somehow thought it was for commenting o […] This account is unlikely to be used inappropriately. When you want to do bad things, you use fake data and not some account like this one. Its not a problem to get some private informations from people. Either get the fully public available ones or buy for a dollar a package with over 1000 real name+address+phonenumbers+bank details and so on. This public account is for not requiring email-address + names from people that for example just want to edit a link from http... to https... or quickly fix other things they found. Its the same like Wikipedia where you can just press edit and edit the website and press save it. Coreboot dont have such a quick edit function recently. https://ticket.coreboot.org/ seems to have bigger issues. The accounts there seem to have to be approved by hand. -- To view, visit https://review.coreboot.org/c/coreboot/+/51208 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibf6d7c47bba10d89956cbb683b8da2e8e04e269d Gerrit-Change-Number: 51208 Gerrit-PatchSet: 4 Gerrit-Owner: Public Gerrit <public-gerrit(a)guerrillamail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Stefan Reinauer <reinauer(a)chromium.org> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Stefan Reinauer <reinauer(a)chromium.org> Gerrit-Attention: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Comment-Date: Fri, 02 Jul 2021 15:00:38 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: David Hendricks <david.hendricks(a)gmail.com> Comment-In-Reply-To: Public Gerrit <public-gerrit(a)guerrillamail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: intel/harcuvar/Kconfig: Clean up unused code
by Arthur Heymans (Code Review) 02 Jul '21

02 Jul '21

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/56043 ) Change subject: intel/harcuvar/Kconfig: Clean up unused code ...................................................................... intel/harcuvar/Kconfig: Clean up unused code This was only used in the sample and it's just a bad way of doing things. One should use a leaked mmaped address to the spd bin instead of hardcoding it. Change-Id: I7f243d8ef4682bfc51fb6ba5af939308a875a0d1 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/mainboard/intel/harcuvar/Kconfig M src/mainboard/intel/harcuvar/romstage.c M src/mainboard/intel/harcuvar/spd/Makefile.inc 3 files changed, 1 insertion(+), 23 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/43/56043/1 diff --git a/src/mainboard/intel/harcuvar/Kconfig b/src/mainboard/intel/harcuvar/Kconfig index 05a8d2d..fd4b6ad050 100644 --- a/src/mainboard/intel/harcuvar/Kconfig +++ b/src/mainboard/intel/harcuvar/Kconfig @@ -23,11 +23,4 @@ help Select this option to enable Memory Down function. -config SPD_LOC - depends on ENABLE_FSP_MEMORY_DOWN - hex "SPD binary location in cbfs" - default 0xfffdf000 - help - Location of SPD binary for memory down function. - endif # BOARD_INTEL_HARCUVAR diff --git a/src/mainboard/intel/harcuvar/romstage.c b/src/mainboard/intel/harcuvar/romstage.c index 027c56e..1f502be 100644 --- a/src/mainboard/intel/harcuvar/romstage.c +++ b/src/mainboard/intel/harcuvar/romstage.c @@ -33,22 +33,9 @@ * DIMM Mapping of SlotState & SpdDataPtr: * * {{CH0DIMM0, CH0DIMM1}, {CH1DIMM0, CH1DIMM1}} - * - * Sample: Channel 0 is memory down and channel 1 is physical slot. - * - * const MEMORY_DOWN_CONFIG mMemoryDownConfig = { - * .SlotState = { - * {STATE_MEMORY_DOWN, STATE_MEMORY_DOWN}, - * {STATE_MEMORY_SLOT, STATE_MEMORY_SLOT} - * }, - * .SpdDataLen = MAX_SPD_BYTES, - * .SpdDataPtr = { - * {(void *)CONFIG_SPD_LOC, (void *)CONFIG_SPD_LOC}, - * {(void *)NULL, (void *)NULL} - * } - * } */ + const MEMORY_DOWN_CONFIG mMemoryDownConfig = { .SlotState = { {STATE_MEMORY_SLOT, STATE_MEMORY_SLOT}, diff --git a/src/mainboard/intel/harcuvar/spd/Makefile.inc b/src/mainboard/intel/harcuvar/spd/Makefile.inc index ec07cfb..57b8e9b 100644 --- a/src/mainboard/intel/harcuvar/spd/Makefile.inc +++ b/src/mainboard/intel/harcuvar/spd/Makefile.inc @@ -5,5 +5,3 @@ # Order matters for SPD sources. The following indices # define the SPD data to use. SPD_SOURCES = micron_4GiB_dimm_MTA9ASF51272PZ-2G1A2 - -spd.bin-position := $(CONFIG_SPD_LOC) -- To view, visit https://review.coreboot.org/c/coreboot/+/56043 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7f243d8ef4682bfc51fb6ba5af939308a875a0d1 Gerrit-Change-Number: 56043 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newchange

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Change in coreboot[master]: configs/config.foxconn_g41m: Buildtest with X86_64
by Arthur Heymans (Code Review) 02 Jul '21

02 Jul '21

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/56042 ) Change subject: configs/config.foxconn_g41m: Buildtest with X86_64 ...................................................................... configs/config.foxconn_g41m: Buildtest with X86_64 Change-Id: I755f2037bc9368e610eb97a2633aa66da7f626b0 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- A configs/config.foxconn_g41m 1 file changed, 3 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/42/56042/1 diff --git a/configs/config.foxconn_g41m b/configs/config.foxconn_g41m new file mode 100644 index 0000000..f5deea5 --- /dev/null +++ b/configs/config.foxconn_g41m @@ -0,0 +1,3 @@ +CONFIG_VENDOR_FOXCONN=y +CONFIG_BOARD_FOXCONN_G41M=y +CONFIG_USE_EXP_X86_64_SUPPORT=y -- To view, visit https://review.coreboot.org/c/coreboot/+/56042 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I755f2037bc9368e610eb97a2633aa66da7f626b0 Gerrit-Change-Number: 56042 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newchange

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Change in coreboot[master]: nb/intel/x4x: Expose x86_64 support
by Arthur Heymans (Code Review) 02 Jul '21

02 Jul '21

Attention is currently required from: Damien Zammit, Patrick Rudolph. Hello build bot (Jenkins), Damien Zammit, Angel Pons, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/56022 to look at the new patch set (#4). Change subject: nb/intel/x4x: Expose x86_64 support ...................................................................... nb/intel/x4x: Expose x86_64 support TESTED on foxconn g41m. Change-Id: I2d5d5dfbd76a84aa400e44b4bc2ac4f3b5b6f739 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/northbridge/intel/x4x/Kconfig 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/56022/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/56022 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2d5d5dfbd76a84aa400e44b4bc2ac4f3b5b6f739 Gerrit-Change-Number: 56022 Gerrit-PatchSet: 4 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Damien Zammit Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Damien Zammit Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: sb/intel/i82801gx: Prepare for x86_64
by Arthur Heymans (Code Review) 02 Jul '21

02 Jul '21

Attention is currently required from: Patrick Rudolph. Hello build bot (Jenkins), Angel Pons, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/56020 to look at the new patch set (#3). Change subject: sb/intel/i82801gx: Prepare for x86_64 ...................................................................... sb/intel/i82801gx: Prepare for x86_64 Do the usual int conversions. TESTED: BUILD_TIMELESS=1 produces identical image on foxconn/g41m. Change-Id: Idebfe4669854b307bee653df6d93e46ae3f39dec Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/southbridge/intel/i82801gx/azalia.c 1 file changed, 2 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/20/56020/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/56020 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Idebfe4669854b307bee653df6d93e46ae3f39dec Gerrit-Change-Number: 56020 Gerrit-PatchSet: 3 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: cpu/intel/car/p4: Add x86_64 support
by Arthur Heymans (Code Review) 02 Jul '21

02 Jul '21

Attention is currently required from: Patrick Rudolph. Hello build bot (Jenkins), Angel Pons, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/56021 to look at the new patch set (#4). Change subject: cpu/intel/car/p4: Add x86_64 support ...................................................................... cpu/intel/car/p4: Add x86_64 support Change-Id: I77516e3cd5f0d3b7442be660c005a65b00454343 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/cpu/intel/car/p4-netburst/cache_as_ram.S 1 file changed, 12 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/56021/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/56021 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I77516e3cd5f0d3b7442be660c005a65b00454343 Gerrit-Change-Number: 56021 Gerrit-PatchSet: 4 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: nb/intel/x4x: Use write32p and read32p
by Arthur Heymans (Code Review) 02 Jul '21

02 Jul '21

Attention is currently required from: Damien Zammit, Arthur Heymans, Patrick Rudolph. Hello build bot (Jenkins), Damien Zammit, Angel Pons, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/56029 to look at the new patch set (#2). Change subject: nb/intel/x4x: Use write32p and read32p ...................................................................... nb/intel/x4x: Use write32p and read32p This removes the need for type conversions all over the place. Change-Id: I633a453aff17f1cbbe06b60e3efb67661733d06c Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/northbridge/intel/x4x/dq_dqs.c M src/northbridge/intel/x4x/raminit_ddr23.c M src/northbridge/intel/x4x/rcven.c 3 files changed, 13 insertions(+), 13 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/56029/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/56029 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I633a453aff17f1cbbe06b60e3efb67661733d06c Gerrit-Change-Number: 56029 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Damien Zammit Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Damien Zammit Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: lib/cbfs,commonlib/mem_pool: Make cbfs_free take const pointer
by Raul Rangel (Code Review) 02 Jul '21

02 Jul '21

Raul Rangel has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/56002 ) Change subject: lib/cbfs,commonlib/mem_pool: Make cbfs_free take const pointer ...................................................................... Abandoned Going to refactor my code instead. -- To view, visit https://review.coreboot.org/c/coreboot/+/56002 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie570825f9255d6499e977f6eace58589115e2552 Gerrit-Change-Number: 56002 Gerrit-PatchSet: 1 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: abandon

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coreboot-gerrit July 2021