coreboot-gerrit July 2021

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: sc7280: Add PCIe RC driver in Coreboot
by Ravi kumar (Code Review) 02 Jul '21

02 Jul '21

Attention is currently required from: Shelley Chen, Ravi kumar, Julius Werner, Prasad Malisetty, mturney mturney. Hello Shelley Chen, build bot (Jenkins), Julius Werner, Prasad Malisetty, mturney mturney, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/53902 to look at the new patch set (#19). Change subject: sc7280: Add PCIe RC driver in Coreboot ...................................................................... sc7280: Add PCIe RC driver in Coreboot In coreboot ram stage, PCIe root complex driver initialize the PCIe core, QMP PHY and does the bus enumeration. Upon successful detection of EP(NVMe), PCIe RC driver allocates the resources and set the configuration parameters. Below are the changes added. (a) PCIe Core reset, init, link training. (b) Bus enumeration and resource allocation (c) QMP PHY 3x2 initialization To enable NVMe LDO's, need to set gpio19 pin in SKU1 and gpio51 in SKU2. BUG=b:182963902 TEST=Validated on qualcomm sc7280 development board Change-Id: Iccf60aa56541f5230fa9c3f821d7709615c36631 Signed-off-by: Prasad Malisetty <pmaliset(a)codeaurora.org> --- M src/mainboard/google/herobrine/mainboard.c M src/soc/qualcomm/sc7280/Makefile.inc M src/soc/qualcomm/sc7280/include/soc/addressmap.h A src/soc/qualcomm/sc7280/include/soc/pcie.h A src/soc/qualcomm/sc7280/include/soc/qcom_qmp_phy.h A src/soc/qualcomm/sc7280/pcie_host.c 6 files changed, 1,733 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/53902/19 -- To view, visit https://review.coreboot.org/c/coreboot/+/53902 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iccf60aa56541f5230fa9c3f821d7709615c36631 Gerrit-Change-Number: 53902 Gerrit-PatchSet: 19 Gerrit-Owner: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Prasad Malisetty <pmaliset(a)qualcomm.corp-partner.google.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: mturney mturney <mturney(a)codeaurora.org> Gerrit-CC: Furquan Shaikh <furquan(a)google.com> Gerrit-CC: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Prasad Malisetty <pmaliset(a)qualcomm.corp-partner.google.com> Gerrit-Attention: mturney mturney <mturney(a)codeaurora.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: sc7280: Refactor UART driver
by Ravi kumar (Code Review) 02 Jul '21

02 Jul '21

Attention is currently required from: Shelley Chen, Ravi kumar, mturney mturney, Julius Werner. Hello Shelley Chen, build bot (Jenkins), mturney mturney, Julius Werner, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/55963 to look at the new patch set (#2). Change subject: sc7280: Refactor UART driver ...................................................................... sc7280: Refactor UART driver Refactor UART driver by separating common and SoC specific driver code. BUG=b:182963902 TEST=Validated on qualcomm sc7280 development board Signed-off-by: Rajesh Patil <rajpat(a)codeaurora.org> Change-Id: I015e21081391bfe85edf667685bf117401a9ec00 --- M src/soc/qualcomm/sc7280/Kconfig M src/soc/qualcomm/sc7280/Makefile.inc 2 files changed, 12 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/63/55963/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/55963 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I015e21081391bfe85edf667685bf117401a9ec00 Gerrit-Change-Number: 55963 Gerrit-PatchSet: 2 Gerrit-Owner: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: mturney mturney <mturney(a)codeaurora.org> Gerrit-CC: Rajesh Patil <rajpat(a)qualcomm.corp-partner.google.com> Gerrit-CC: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Gerrit-CC: Roja Rani Yarubandi <c_rojay(a)qualcomm.corp-partner.google.com> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Attention: mturney mturney <mturney(a)codeaurora.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mainboard/google/herobrine: Configure SDCC clock
by Ravi kumar (Code Review) 02 Jul '21

02 Jul '21

Attention is currently required from: Shelley Chen, Ravi kumar, mturney mturney, Julius Werner. Hello Shelley Chen, build bot (Jenkins), Sajida Bhanu, mturney mturney, Julius Werner, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/50585 to look at the new patch set (#51). Change subject: mainboard/google/herobrine: Configure SDCC clock ...................................................................... mainboard/google/herobrine: Configure SDCC clock Configure clocks for eMMC and SD card BUG=b:182963902 TEST=Validated on qualcomm sc7280 development board Change-Id: I8acbce58614add0228adc39289762da10937cbe2 Signed-off-by: Shaik Sajida Bhanu <sbhanu(a)codeaurora.org> --- M src/mainboard/google/herobrine/mainboard.c 1 file changed, 5 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/85/50585/51 -- To view, visit https://review.coreboot.org/c/coreboot/+/50585 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8acbce58614add0228adc39289762da10937cbe2 Gerrit-Change-Number: 50585 Gerrit-PatchSet: 51 Gerrit-Owner: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Sajida Bhanu <sbhanu(a)codeaurora.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: mturney mturney <mturney(a)codeaurora.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Attention: mturney mturney <mturney(a)codeaurora.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/qualcomm: move aop firmware loading changes to common
by Ravi kumar (Code Review) 02 Jul '21

02 Jul '21

Attention is currently required from: Ravi kumar, Shelley Chen, Julius Werner. Hello Shelley Chen, build bot (Jenkins), Patrick Georgi, Julius Werner, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/49767 to look at the new patch set (#51). Change subject: soc/qualcomm: move aop firmware loading changes to common ...................................................................... soc/qualcomm: move aop firmware loading changes to common Add AOP firmware support Developer/Reviewer, be aware of this patch from Napali: https://review.coreboot.org/c/coreboot/+/25210/85 BUG=b:182963902 TEST=Validated on qualcomm sc7280 development board Change-Id: I90b0f48e15df390970e027bff2065b7a89b14cec Signed-off-by: Ravi Kumar Bokka <rbokka(a)codeaurora.org> --- R src/soc/qualcomm/common/aop_load_reset.c A src/soc/qualcomm/common/include/soc/aop_common.h M src/soc/qualcomm/common/mmu.c M src/soc/qualcomm/sc7180/Makefile.inc D src/soc/qualcomm/sc7180/include/soc/aop.h M src/soc/qualcomm/sc7180/mmu.c M src/soc/qualcomm/sc7180/soc.c M src/soc/qualcomm/sc7280/Makefile.inc M src/soc/qualcomm/sc7280/memlayout.ld M src/soc/qualcomm/sc7280/soc.c 10 files changed, 35 insertions(+), 23 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/67/49767/51 -- To view, visit https://review.coreboot.org/c/coreboot/+/49767 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I90b0f48e15df390970e027bff2065b7a89b14cec Gerrit-Change-Number: 49767 Gerrit-PatchSet: 51 Gerrit-Owner: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Gerrit-Attention: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: herobrine: sc7280: Load GSI FW in ramstage
by Ravi kumar (Code Review) 02 Jul '21

02 Jul '21

Attention is currently required from: Shelley Chen, Ravi kumar, mturney mturney, Julius Werner. Hello Shelley Chen, build bot (Jenkins), mturney mturney, Julius Werner, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/55964 to look at the new patch set (#2). Change subject: herobrine: sc7280: Load GSI FW in ramstage ...................................................................... herobrine: sc7280: Load GSI FW in ramstage Load GSI FW in ramstage and make it part of RW As part of the code clean up, update the header files of the QUP drivers with the correct path. BUG=b:182963902 TEST=Validated on qualcomm sc7180 and sc7280 development board. Signed-off-by: Rajesh Patil <rajpat(a)codeaurora.org> Change-Id: I3d9caa0921fcf9ad67f1071cdf769a99fb6d1a30 --- M src/mainboard/google/herobrine/bootblock.c M src/mainboard/google/herobrine/mainboard.c 2 files changed, 22 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/55964/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/55964 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3d9caa0921fcf9ad67f1071cdf769a99fb6d1a30 Gerrit-Change-Number: 55964 Gerrit-PatchSet: 2 Gerrit-Owner: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: mturney mturney <mturney(a)codeaurora.org> Gerrit-CC: Rajesh Patil <rajpat(a)qualcomm.corp-partner.google.com> Gerrit-CC: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Gerrit-CC: Roja Rani Yarubandi <c_rojay(a)qualcomm.corp-partner.google.com> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Attention: mturney mturney <mturney(a)codeaurora.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/qualcomm/sc7280: DDR One-Time-Training Support
by Ravi kumar (Code Review) 02 Jul '21

02 Jul '21

Attention is currently required from: Shelley Chen, Ravi kumar. Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/54352 to look at the new patch set (#16). Change subject: soc/qualcomm/sc7280: DDR One-Time-Training Support ...................................................................... soc/qualcomm/sc7280: DDR One-Time-Training Support One-Time-Training feature support added in Qclib stage BUG=b:182963902 TEST=Validated on qualcomm sc7280 development board Change-Id: I81038c5c7802c154f4310509c6c64710580b8ce4 Signed-off-by: Sudheer Kumar Amrabadi <samrabad(a)codeaurora.org> --- M src/mainboard/google/herobrine/chromeos.fmd M src/soc/qualcomm/sc7280/memlayout.ld 2 files changed, 3 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/54352/16 -- To view, visit https://review.coreboot.org/c/coreboot/+/54352 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I81038c5c7802c154f4310509c6c64710580b8ce4 Gerrit-Change-Number: 54352 Gerrit-PatchSet: 16 Gerrit-Owner: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mainboard/google/herobrine: Add configuration for SD card detect pin
by Ravi kumar (Code Review) 02 Jul '21

02 Jul '21

Attention is currently required from: Shelley Chen, Ravi kumar, Paul Menzel, mturney mturney, Julius Werner. Hello Shelley Chen, build bot (Jenkins), Sajida Bhanu, mturney mturney, Julius Werner, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/50584 to look at the new patch set (#50). Change subject: mainboard/google/herobrine: Add configuration for SD card detect pin ...................................................................... mainboard/google/herobrine: Add configuration for SD card detect pin Without this configuration, even though there is no SD card it shows as SD card is present and host controller waits for card to respond. BUG=b:182963902 TEST=Validated on qualcomm sc7280 development board with SD card and without SD card, make sure if SD card not present then host controller should not wait for card to respond. Change-Id: I5dc5ba10c98d606d98e7d4f4c41c3e4f45e94452 Signed-off-by: Shaik Sajida Bhanu <sbhanu(a)codeaurora.org> --- M src/mainboard/google/herobrine/board.h M src/mainboard/google/herobrine/chromeos.c 2 files changed, 8 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/84/50584/50 -- To view, visit https://review.coreboot.org/c/coreboot/+/50584 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5dc5ba10c98d606d98e7d4f4c41c3e4f45e94452 Gerrit-Change-Number: 50584 Gerrit-PatchSet: 50 Gerrit-Owner: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Sajida Bhanu <sbhanu(a)codeaurora.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: mturney mturney <mturney(a)codeaurora.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: mturney mturney <mturney(a)codeaurora.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: util/abuild: Check if buildtest configurations having invalid options
by Arthur Heymans (Code Review) 02 Jul '21

02 Jul '21

Attention is currently required from: Martin Roth, Arthur Heymans. Hello build bot (Jenkins), Patrick Georgi, Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/56037 to look at the new patch set (#3). Change subject: util/abuild: Check if buildtest configurations having invalid options ...................................................................... util/abuild: Check if buildtest configurations having invalid options Change-Id: I83a316dad31f8567fad68171b68ee546bfe548f0 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M util/abuild/abuild 1 file changed, 20 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/37/56037/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/56037 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I83a316dad31f8567fad68171b68ee546bfe548f0 Gerrit-Change-Number: 56037 Gerrit-PatchSet: 3 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: superio/nuvoton/nct5567d: Add NCT5567D support
by Marvin Drees (Code Review) 02 Jul '21

02 Jul '21

Attention is currently required from: Angel Pons, Felix Held. Marvin Drees has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55895 ) Change subject: superio/nuvoton/nct5567d: Add NCT5567D support ...................................................................... Patch Set 6: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/55895/comment/be17b8d2_2715276c PS2, Line 7: [WIP] superio/nuvoton/nct5567d: Add NCT5567D support > I imagine you used some other chip's code (NCT5539D?) as a base for this. […] Done File src/superio/nuvoton/nct5567d/nct5567d.h: https://review.coreboot.org/c/coreboot/+/55895/comment/7921e92f_344dbf67 PS1, Line 12: #define NCT5567D_WDT1_WDT3 0x08 /* WDT1, WDT3, GPIO Base & KBC P20 */ > > please, no space before tabs […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/55895 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0a9fab2bb1fb7dc777b14e70a741e04636b967b8 Gerrit-Change-Number: 55895 Gerrit-PatchSet: 6 Gerrit-Owner: Marvin Drees <marvin.drees(a)9elements.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 02 Jul 2021 13:10:42 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: superio/nuvoton/nct5567d: Add NCT5567D support
by Marvin Drees (Code Review) 02 Jul '21

02 Jul '21

Attention is currently required from: Felix Held. Hello build bot (Jenkins), Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/55895 to look at the new patch set (#6). Change subject: superio/nuvoton/nct5567d: Add NCT5567D support ...................................................................... superio/nuvoton/nct5567d: Add NCT5567D support Based off of superio/nuvoton/nct5539d as this chip gets detected as one by superiotool. Confirmed working and checked values using this datasheet: https://github.com/oreboot/datasheets/blob/master/nuvoton/NCT5567D-B_Datash… Signed-off-by: Marvin Drees <marvin.drees(a)9elements.com> Change-Id: I0a9fab2bb1fb7dc777b14e70a741e04636b967b8 --- M src/superio/nuvoton/Makefile.inc A src/superio/nuvoton/nct5567d/Kconfig A src/superio/nuvoton/nct5567d/Makefile.inc A src/superio/nuvoton/nct5567d/nct5567d.h A src/superio/nuvoton/nct5567d/superio.c 5 files changed, 147 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/95/55895/6 -- To view, visit https://review.coreboot.org/c/coreboot/+/55895 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0a9fab2bb1fb7dc777b14e70a741e04636b967b8 Gerrit-Change-Number: 55895 Gerrit-PatchSet: 6 Gerrit-Owner: Marvin Drees <marvin.drees(a)9elements.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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coreboot-gerrit July 2021