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Change subject: supermicro/x11-lga1151-series: Remove SkipExtGfxScan = 1
......................................................................
Patch Set 3:
(1 comment)
Patchset:
PS2:
> Does just `PrimaryDisplay = Display_PEG` work with both an external GPU and the BMC VGA?
`PrimaryDisplay = Display_PEG` works with the BMC VGA, but I do not have a PCIe GPU to test.
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Change subject: supermicro/x11-lga1151-series: Remove SkipExtGfxScan = 1
......................................................................
Patch Set 3:
(1 comment)
Patchset:
PS2:
> I tried both `SkipExtGfxScan = 1 && PrimaryDisplay = Display_PEG` and `SkipExtGfxScan = 1 && Primary […]
Does just `PrimaryDisplay = Display_PEG` work with both an external GPU and the BMC VGA?
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Change subject: supermicro/x11-lga1151-series: Remove SkipExtGfxScan = 1
......................................................................
Patch Set 3:
(1 comment)
Patchset:
PS2:
> SkipExtGfxScan=0 let's FSP scan for PCIe graphics. If found, it sets PrimaryDisplay=PCI. […]
I tried both `SkipExtGfxScan = 1 && PrimaryDisplay = Display_PEG` and `SkipExtGfxScan = 1 && PrimaryDisplay = Display_PCH_PCIe` and both do not work with VGA_TEXT_FRAMEBUFFER. I don't get any video signal.
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Change subject: drivers/intel/gma: Define structure for Opregion version
......................................................................
Patch Set 4:
(1 comment)
File src/drivers/intel/gma/opregion.h:
https://review.coreboot.org/c/coreboot/+/56168/comment/d422b153_7bfcefbd
PS4, Line 25: over
suggestion:
`opver`
I keep reading this as the English word "over"
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Change subject: soc/intel/alderlake: Add (and fix) devices in IRQ table
......................................................................
Patch Set 2:
(1 comment)
File src/soc/intel/alderlake/fsp_params.c:
https://review.coreboot.org/c/coreboot/+/56175/comment/7c26a20a_1a6ee51a
PS2, Line 51: FIXED_INT_PIRQ
> Just curious: Is this requirement in the BWG? Or how was it determined that some of these devies req […]
EDS and both say INT_LINE is RW for IGD and IPU (and indeed, they appear programmable from lspci's reporting), but empirically, S0ix fails if they are not set to 16 (their pin is RO set to PCI_INT_A).
The CPU_6 slot is just more PCIe RPs, so are programmed the same as the the PCH side (according to their `function number % 4`)
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Hello build bot (Jenkins), Patrick Rudolph,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/56175
to look at the new patch set (#3).
Change subject: soc/intel/alderlake: Add (and fix) devices in IRQ table
......................................................................
soc/intel/alderlake: Add (and fix) devices in IRQ table
Some devices were missing from the IRQ table, and this lack of
IRQ programming for the devices (although unused), was causing S0ix
entry to fail.
BUG=b:176858827
TEST=suspend_stress_test -c10 passes, EC observes SLP_S0IX# toggle
correctly upon entry/exit from S0ix
Signed-off-by: Tim Wawrzynczak <twawrzynczak(a)chromium.org>
Change-Id: Ia7612ee008842ba2b8dcd36deb201f4f26130660
---
M src/soc/intel/alderlake/fsp_params.c
1 file changed, 42 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/75/56175/3
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Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56071 )
Change subject: supermicro/x11-lga1151-series: Remove SkipExtGfxScan = 1
......................................................................
Patch Set 3:
(1 comment)
Patchset:
PS2:
> > FSP does this: […]
SkipExtGfxScan=0 let's FSP scan for PCIe graphics. If found, it sets PrimaryDisplay=PCI. Then it scans for PEG. If found, PrimaryDisplay becomes PEG, but only of PCI was not found... so, PCI would even take precedence over PEG.
With SkipExtGfxScan=1 the difference between PEG and PCI is gone, so you're right, that we just must not set Auto or IGD.
=> we should keep SkipExtGfxScan=1 (or maybe even drop the dt option and set it statically?) and set PrimaryDisplay=PCI/PEG
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Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56024 )
Change subject: drivers/usb/acpi: Create function to get PLD information
......................................................................
Patch Set 8: Code-Review+2
(1 comment)
File src/drivers/usb/acpi/usb_acpi.c:
https://review.coreboot.org/c/coreboot/+/56024/comment/a600f995_255d1be9
PS6, Line 129: struct acpi_pld pld;
:
: if (!usb_device || !usb_device->chip_info ||
: usb_device->chip_ops != &drivers_usb_acpi_ops)
: return NULL;
:
: if (config->use_custom_pld)
: memcpy(&pld, &config->custom_pld, sizeof(pld));
: else
: acpi_pld_fill_usb(&pld, config->type, &config->group);
:
: return &pld;
> I have changed current function to have pld pointer as input from caller, so that we don't need to w […]
that works 😊
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