coreboot-gerrit July 2021

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: mb/google/brya: Update the FIVR configurations
by Casper Chang (Code Review) 13 Jul '21

13 Jul '21

Attention is currently required from: Malik Hsu, Mark Hsieh, Anfernee Chen, Casper Chang. Hello build bot (Jenkins), Malik Hsu, Tim Wawrzynczak, Mark Hsieh, Anfernee Chen, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/56165 to look at the new patch set (#4). Change subject: mb/google/brya: Update the FIVR configurations ...................................................................... mb/google/brya: Update the FIVR configurations This patch sets the disable the external voltage rails since brya board doesn't have V1p05 and Vnn bypass rails implemented. Reference CB:55704 BUG=b:191897776, b:191213263 Signed-off-by: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Change-Id: I5c6b97e0b003560e1e22c96c5c3a1328fe876f47 --- M src/mainboard/google/brya/variants/baseboard/devicetree.cb M src/mainboard/google/brya/variants/brya0/overridetree.cb 2 files changed, 6 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/65/56165/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/56165 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5c6b97e0b003560e1e22c96c5c3a1328fe876f47 Gerrit-Change-Number: 56165 Gerrit-PatchSet: 4 Gerrit-Owner: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Anfernee Chen <anfernee_chen(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Malik Hsu <malik_hsu(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Scott Chao <scott_chao(a)wistron.corp-partner.google.com> Gerrit-Attention: Malik Hsu <malik_hsu(a)wistron.corp-partner.google.com> Gerrit-Attention: Mark Hsieh <mark_hsieh(a)wistron.corp-partner.google.com> Gerrit-Attention: Anfernee Chen <anfernee_chen(a)wistron.corp-partner.google.com> Gerrit-Attention: Casper Chang <casper_chang(a)wistron.corp-partner.google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mainboard: Add Star Labs labtop series
by Sean Rhodes (Code Review) 13 Jul '21

13 Jul '21

Attention is currently required from: Sean Rhodes. Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/56088 to look at the new patch set (#17). Change subject: mainboard: Add Star Labs labtop series ...................................................................... mainboard: Add Star Labs labtop series Add support for: LabTop Mk III (kbl-r) LabTop Mk IV (cml) StarBook Mk V (tgl) Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Change-Id: I090971a9e8d2be5b08be886d00d304607304b645 --- M Documentation/distributions.md M Documentation/mainboard/index.md A Documentation/mainboard/starlabs/labtop.md M MAINTAINERS A configs/config.starlabs_labtop_cml A configs/config.starlabs_labtop_kbl A configs/config.starlabs_labtop_tgl A src/mainboard/starlabs/Kconfig A src/mainboard/starlabs/Kconfig.name A src/mainboard/starlabs/labtop/Kconfig A src/mainboard/starlabs/labtop/Kconfig.name A src/mainboard/starlabs/labtop/Makefile.inc A src/mainboard/starlabs/labtop/acpi/ec.asl A src/mainboard/starlabs/labtop/acpi/mainboard.asl A src/mainboard/starlabs/labtop/acpi/sleep.asl A src/mainboard/starlabs/labtop/acpi/superio.asl A src/mainboard/starlabs/labtop/board_info.txt A src/mainboard/starlabs/labtop/bootblock.c A src/mainboard/starlabs/labtop/cmos.default A src/mainboard/starlabs/labtop/cmos.layout A src/mainboard/starlabs/labtop/dsdt.asl A src/mainboard/starlabs/labtop/hda_verb.c A src/mainboard/starlabs/labtop/mainboard.c A src/mainboard/starlabs/labtop/mainboard.c.save A src/mainboard/starlabs/labtop/ramstage.c A src/mainboard/starlabs/labtop/spd/Makefile.inc A src/mainboard/starlabs/labtop/spd/empty_ddr4.spd.hex A src/mainboard/starlabs/labtop/spd/micron-MT40A1G16KD-062E-E.spd.hex A src/mainboard/starlabs/labtop/spd/samsung-K4A8G165WB-BCRC.spd.hex A src/mainboard/starlabs/labtop/spd/spd.h A src/mainboard/starlabs/labtop/spd/spd_util.c A src/mainboard/starlabs/labtop/variants/baseboard/include/baseboard/memory.h A src/mainboard/starlabs/labtop/variants/baseboard/include/baseboard/romstage.h A src/mainboard/starlabs/labtop/variants/baseboard/include/baseboard/variants.h A src/mainboard/starlabs/labtop/variants/cml/Makefile.inc A src/mainboard/starlabs/labtop/variants/cml/board.fmd A src/mainboard/starlabs/labtop/variants/cml/data.vbt A src/mainboard/starlabs/labtop/variants/cml/devicetree.cb A src/mainboard/starlabs/labtop/variants/cml/devtree.c A src/mainboard/starlabs/labtop/variants/cml/gma-mainboard.ads A src/mainboard/starlabs/labtop/variants/cml/gpio.c A src/mainboard/starlabs/labtop/variants/cml/hda_verb.c A src/mainboard/starlabs/labtop/variants/cml/include/variant/ec.h A src/mainboard/starlabs/labtop/variants/cml/romstage.c A src/mainboard/starlabs/labtop/variants/kbl/Makefile.inc A src/mainboard/starlabs/labtop/variants/kbl/board.fmd A src/mainboard/starlabs/labtop/variants/kbl/data.vbt A src/mainboard/starlabs/labtop/variants/kbl/devicetree.cb A src/mainboard/starlabs/labtop/variants/kbl/devtree.c A src/mainboard/starlabs/labtop/variants/kbl/gma-mainboard.ads A src/mainboard/starlabs/labtop/variants/kbl/gpio.c A src/mainboard/starlabs/labtop/variants/kbl/hda_verb.c A src/mainboard/starlabs/labtop/variants/kbl/include/variant/ec.h A src/mainboard/starlabs/labtop/variants/kbl/include/variant/gpio.c A src/mainboard/starlabs/labtop/variants/kbl/include/variant/hda_verb.c A src/mainboard/starlabs/labtop/variants/kbl/romstage.c A src/mainboard/starlabs/labtop/variants/tgl/Makefile.inc A src/mainboard/starlabs/labtop/variants/tgl/board.fmd A src/mainboard/starlabs/labtop/variants/tgl/data.vbt A src/mainboard/starlabs/labtop/variants/tgl/devicetree.cb A src/mainboard/starlabs/labtop/variants/tgl/devtree.c A src/mainboard/starlabs/labtop/variants/tgl/gma-mainboard.ads A src/mainboard/starlabs/labtop/variants/tgl/gpio.c A src/mainboard/starlabs/labtop/variants/tgl/hda_verb.c A src/mainboard/starlabs/labtop/variants/tgl/include/variant/ec.h A src/mainboard/starlabs/labtop/variants/tgl/romstage.c 66 files changed, 3,470 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/88/56088/17 -- To view, visit https://review.coreboot.org/c/coreboot/+/56088 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I090971a9e8d2be5b08be886d00d304607304b645 Gerrit-Change-Number: 56088 Gerrit-PatchSet: 17 Gerrit-Owner: Sean Rhodes <admin(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Sean Rhodes <admin(a)starlabs.systems> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/intel/adlrvp: Fix Tmode setting for ADL P RVP
by Meera Ravindranath (Code Review) 13 Jul '21

13 Jul '21

Attention is currently required from: Furquan Shaikh, Sugnan Prabhu S, Subrata Banik, Sathya Prakash M R. Meera Ravindranath has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56208 ) Change subject: mb/intel/adlrvp: Fix Tmode setting for ADL P RVP ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/56208 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia39a33f5da2fea0dc2eaf4eae45999a711c61c33 Gerrit-Change-Number: 56208 Gerrit-PatchSet: 1 Gerrit-Owner: Sathya Prakash M R <sathya.prakash.m.r(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Sugnan Prabhu S <sugnan.prabhu.s(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Sugnan Prabhu S <sugnan.prabhu.s(a)intel.com> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Sathya Prakash M R <sathya.prakash.m.r(a)intel.com> Gerrit-Comment-Date: Tue, 13 Jul 2021 07:54:46 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/intel/adlrvp: Disable xDCI in devicetree
by Meera Ravindranath (Code Review) 13 Jul '21

13 Jul '21

Attention is currently required from: Meera Ravindranath, Archana Patni. Hello build bot (Jenkins), Sridhar Siricilla, Archana Patni, monika.a(a)intel.com, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/52262 to look at the new patch set (#5). Change subject: mb/intel/adlrvp: Disable xDCI in devicetree ...................................................................... mb/intel/adlrvp: Disable xDCI in devicetree Disable tcss_xdci as it is not used. Signed-off-by: Meera Ravindranath <meera.ravindranath(a)intel.com> Change-Id: I94102240b13d2b96e0295f41bc2b0ba078faf342 --- M src/mainboard/intel/adlrvp/devicetree.cb 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/62/52262/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/52262 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I94102240b13d2b96e0295f41bc2b0ba078faf342 Gerrit-Change-Number: 52262 Gerrit-PatchSet: 5 Gerrit-Owner: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Archana Patni <archana.patni(a)intel.com> Gerrit-Reviewer: Sridhar Siricilla <sridhar.siricilla(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: monika.a(a)intel.com Gerrit-Attention: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Attention: Archana Patni <archana.patni(a)intel.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/cherry: add configuration for tomato
by Rex-BC Chen (Code Review) 13 Jul '21

13 Jul '21

Rex-BC Chen has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/56253 ) Change subject: mb/google/cherry: add configuration for tomato ...................................................................... mb/google/cherry: add configuration for tomato Signed-off-by: Rex-BC Chen <rex-bc.chen(a)mediatek.com> Change-Id: I972c70773d4d928e75098efbf78f174d7c3ebf50 --- M src/mainboard/google/cherry/Kconfig M src/mainboard/google/cherry/Kconfig.name 2 files changed, 5 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/56253/1 diff --git a/src/mainboard/google/cherry/Kconfig b/src/mainboard/google/cherry/Kconfig index dd0b4571..09b21d2 100644 --- a/src/mainboard/google/cherry/Kconfig +++ b/src/mainboard/google/cherry/Kconfig @@ -35,6 +35,7 @@ config MAINBOARD_PART_NUMBER string default "Cherry" if BOARD_GOOGLE_CHERRY + default "Tomato" if BOARD_GOOGLE_TOMATO config DRIVER_TPM_I2C_BUS hex diff --git a/src/mainboard/google/cherry/Kconfig.name b/src/mainboard/google/cherry/Kconfig.name index 8690b22..7a65ada 100644 --- a/src/mainboard/google/cherry/Kconfig.name +++ b/src/mainboard/google/cherry/Kconfig.name @@ -3,3 +3,7 @@ config BOARD_GOOGLE_CHERRY bool "-> Cherry" select BOARD_GOOGLE_CHERRY_COMMON + +config BOARD_GOOGLE_TOMATO + bool "-> Tomato" + select BOARD_GOOGLE_CHERRY_COMMON -- To view, visit https://review.coreboot.org/c/coreboot/+/56253 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I972c70773d4d928e75098efbf78f174d7c3ebf50 Gerrit-Change-Number: 56253 Gerrit-PatchSet: 1 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/intel/alderlake: Add virtual GPIOs for community 1
by Maulik V Vaghela (Code Review) 13 Jul '21

13 Jul '21

Attention is currently required from: Furquan Shaikh, Tim Wawrzynczak, Sugnan Prabhu S, Subrata Banik, Patrick Rudolph. Maulik V Vaghela has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55270 ) Change subject: soc/intel/alderlake: Add virtual GPIOs for community 1 ...................................................................... Patch Set 8: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/55270/comment/2fa32dbb_0527347a PS5, Line 7: soc/intel/alderlake: Add definition for virtual GPIOs > suggestion: […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/55270 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4d48553d14465df50e5aaaf27ab26c6a1b70d4cf Gerrit-Change-Number: 55270 Gerrit-PatchSet: 8 Gerrit-Owner: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-CC: Sugnan Prabhu S <sugnan.prabhu.s(a)intel.com> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Sugnan Prabhu S <sugnan.prabhu.s(a)intel.com> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Tue, 13 Jul 2021 07:40:20 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/alderlake: Add virtual GPIOs for community 1
by Maulik V Vaghela (Code Review) 13 Jul '21

13 Jul '21

Attention is currently required from: Furquan Shaikh, Maulik V Vaghela, Sugnan Prabhu S, Subrata Banik, Patrick Rudolph. Hello build bot (Jenkins), Furquan Shaikh, Tim Wawrzynczak, Subrata Banik, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/55270 to look at the new patch set (#8). Change subject: soc/intel/alderlake: Add virtual GPIOs for community 1 ...................................................................... soc/intel/alderlake: Add virtual GPIOs for community 1 Alder Lake SoC has virtual GPIOs for community 1 which was being programmed by FSP and hence was skipped by coreboot. As part of moving most of the GPIO programming to coreboot, we're skipping this programming in FSP now. TEST=Check register offset to see if programming is correct. Change-Id: I4d48553d14465df50e5aaaf27ab26c6a1b70d4cf Signed-off-by: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> --- M src/soc/intel/alderlake/gpio.c M src/soc/intel/alderlake/include/soc/gpio_soc_defs.h 2 files changed, 281 insertions(+), 223 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/70/55270/8 -- To view, visit https://review.coreboot.org/c/coreboot/+/55270 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4d48553d14465df50e5aaaf27ab26c6a1b70d4cf Gerrit-Change-Number: 55270 Gerrit-PatchSet: 8 Gerrit-Owner: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-CC: Sugnan Prabhu S <sugnan.prabhu.s(a)intel.com> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Sugnan Prabhu S <sugnan.prabhu.s(a)intel.com> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: drivers/intel/gma: Restructure Opregion version info code
by Maulik V Vaghela (Code Review) 13 Jul '21

13 Jul '21

Attention is currently required from: Tim Wawrzynczak, Meera Ravindranath, Subrata Banik, Angel Pons, Patrick Rudolph. Maulik V Vaghela has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56168 ) Change subject: drivers/intel/gma: Restructure Opregion version info code ...................................................................... Patch Set 9: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/56168 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I93a9f2df186002a4e38caa910f867bce0b97ac2b Gerrit-Change-Number: 56168 Gerrit-PatchSet: 9 Gerrit-Owner: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Angel Pons <angel.pons(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Angel Pons <angel.pons(a)9elements.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Tue, 13 Jul 2021 07:37:44 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: drivers/pc80/mc146818rtc: Check date and time for sanity
by Werner Zeh (Code Review) 13 Jul '21

13 Jul '21

Werner Zeh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/54914 ) Change subject: drivers/pc80/mc146818rtc: Check date and time for sanity ...................................................................... Patch Set 5: (1 comment) File src/lib/Makefile.inc: https://review.coreboot.org/c/coreboot/+/54914/comment/094181d7_e7ac60f0 PS5, Line 62: bootblcok > um This is needed for one of the google boards which uses rtc in bootblock, too. -- To view, visit https://review.coreboot.org/c/coreboot/+/54914 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5bc600c78bab50c70372600347f63156df127012 Gerrit-Change-Number: 54914 Gerrit-PatchSet: 5 Gerrit-Owner: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Tue, 13 Jul 2021 06:58:36 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/mediatek/mt8195: Get DRAM size from DRAM calibration result
by Yu-Ping Wu (Code Review) 13 Jul '21

13 Jul '21

Attention is currently required from: Hung-Te Lin. Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56204 ) Change subject: soc/mediatek/mt8195: Get DRAM size from DRAM calibration result ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/56204 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic34f29d1692b94284b2cf6c5d91d323df736c76f Gerrit-Change-Number: 56204 Gerrit-PatchSet: 2 Gerrit-Owner: Rex-BC Chen <rex-bc.chen(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Ryan Chuang <ryan.chuang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Comment-Date: Tue, 13 Jul 2021 06:44:32 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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coreboot-gerrit July 2021