coreboot-gerrit July 2021

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: src/soc/intel/*: Change legacy_8254_timer to CMOS option
by build bot (Jenkins) (Code Review) 13 Jul '21

13 Jul '21

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Change in coreboot[master]: src/soc/intel/*: Change legacy_8254_timer to CMOS option
by Sean Rhodes (Code Review) 13 Jul '21

13 Jul '21

Attention is currently required from: Jeremy Soller, Tim Wawrzynczak, Angel Pons, Patrick Rudolph. Hello build bot (Jenkins), Jeremy Soller, Tim Wawrzynczak, Angel Pons, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/56256 to look at the new patch set (#6). Change subject: src/soc/intel/*: Change legacy_8254_timer to CMOS option ...................................................................... src/soc/intel/*: Change legacy_8254_timer to CMOS option Change legacy_8254_timer to be CMOS option rather than Kconfig to allow it to be changed at runtime. Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Change-Id: Ic82c7f25cdf6587de5c40f59441579cfc92ff2f1 --- M src/soc/intel/alderlake/fsp_params.c M src/soc/intel/cannonlake/fsp_params.c M src/soc/intel/elkhartlake/fsp_params.c M src/soc/intel/icelake/fsp_params.c M src/soc/intel/jasperlake/fsp_params.c M src/soc/intel/skylake/chip.c M src/soc/intel/tigerlake/fsp_params.c 7 files changed, 40 insertions(+), 13 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/56256/6 -- To view, visit https://review.coreboot.org/c/coreboot/+/56256 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic82c7f25cdf6587de5c40f59441579cfc92ff2f1 Gerrit-Change-Number: 56256 Gerrit-PatchSet: 6 Gerrit-Owner: Sean Rhodes <admin(a)starlabs.systems> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jeremy Soller <jeremy(a)system76.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: src/soc/intel/*: Change legacy_8254_timer to CMOS option
by build bot (Jenkins) (Code Review) 13 Jul '21

13 Jul '21

Attention is currently required from: Jeremy Soller, Tim Wawrzynczak, Angel Pons, Patrick Rudolph. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56256 ) Change subject: src/soc/intel/*: Change legacy_8254_timer to CMOS option ...................................................................... Patch Set 5: (7 comments) File src/soc/intel/alderlake/fsp_params.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-123950): https://review.coreboot.org/c/coreboot/+/56256/comment/a14e2e47_fcc109e3 PS5, Line 494: const unsigned int legacy_8254_timer = get_uint_option("legacy_8254_timer", CONFIG(USE_LEGACY_8254_TIMER)); line over 96 characters File src/soc/intel/cannonlake/fsp_params.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-123950): https://review.coreboot.org/c/coreboot/+/56256/comment/0e2326c1_488e4705 PS5, Line 430: const unsigned int legacy_8254_timer = get_uint_option("legacy_8254_timer", CONFIG(USE_LEGACY_8254_TIMER)); line over 96 characters File src/soc/intel/elkhartlake/fsp_params.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-123950): https://review.coreboot.org/c/coreboot/+/56256/comment/19fb5ddd_66b92abe PS5, Line 147: const unsigned int legacy_8254_timer = get_uint_option("legacy_8254_timer", CONFIG(USE_LEGACY_8254_TIMER)); line over 96 characters File src/soc/intel/icelake/fsp_params.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-123950): https://review.coreboot.org/c/coreboot/+/56256/comment/1ba45db6_53beb9f6 PS5, Line 98: const unsigned int legacy_8254_timer = get_uint_option("legacy_8254_timer", CONFIG(USE_LEGACY_8254_TIMER)); line over 96 characters File src/soc/intel/jasperlake/fsp_params.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-123950): https://review.coreboot.org/c/coreboot/+/56256/comment/6f9d744f_0c45928e PS5, Line 90: const unsigned int legacy_8254_timer = get_uint_option("legacy_8254_timer", CONFIG(USE_LEGACY_8254_TIMER)); line over 96 characters File src/soc/intel/skylake/chip.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-123950): https://review.coreboot.org/c/coreboot/+/56256/comment/d2c53af7_af87ba55 PS5, Line 346: const unsigned int legacy_8254_timer = get_uint_option("legacy_8254_timer", CONFIG(USE_LEGACY_8254_TIMER)); line over 96 characters File src/soc/intel/tigerlake/fsp_params.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-123950): https://review.coreboot.org/c/coreboot/+/56256/comment/e8dff2bf_1c178c57 PS5, Line 552: const unsigned int legacy_8254_timer = get_uint_option("legacy_8254_timer", CONFIG(USE_LEGACY_8254_TIMER)); line over 96 characters -- To view, visit https://review.coreboot.org/c/coreboot/+/56256 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic82c7f25cdf6587de5c40f59441579cfc92ff2f1 Gerrit-Change-Number: 56256 Gerrit-PatchSet: 5 Gerrit-Owner: Sean Rhodes <admin(a)starlabs.systems> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jeremy Soller <jeremy(a)system76.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Tue, 13 Jul 2021 13:18:05 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: src/soc/intel/*: Change legacy_8254_timer to CMOS option
by Sean Rhodes (Code Review) 13 Jul '21

13 Jul '21

Attention is currently required from: Jeremy Soller, Tim Wawrzynczak, Angel Pons, Patrick Rudolph. Sean Rhodes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56256 ) Change subject: src/soc/intel/*: Change legacy_8254_timer to CMOS option ...................................................................... Patch Set 5: (2 comments) File src/mainboard/hp/280_g2/cmos.default: https://review.coreboot.org/c/coreboot/+/56256/comment/699eb061_570737db PS4, Line 1: legacy_8254_timer=Disable > Why `Disable`? The default for this board is to enable 8254. Moreover, this file and cmos. […] Ack File src/soc/intel/skylake/chip.c: https://review.coreboot.org/c/coreboot/+/56256/comment/11ef151a_1b6e3f43 PS4, Line 346: 1 > If you leave the Kconfig option as-is and use `CONFIG(USE_LEGACY_8254_TIMER)` as the argument for `f […] Ack -- To view, visit https://review.coreboot.org/c/coreboot/+/56256 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic82c7f25cdf6587de5c40f59441579cfc92ff2f1 Gerrit-Change-Number: 56256 Gerrit-PatchSet: 5 Gerrit-Owner: Sean Rhodes <admin(a)starlabs.systems> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jeremy Soller <jeremy(a)system76.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Tue, 13 Jul 2021 13:15:44 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/dedede/var/cret: Enable/disable Touchscreen based on FW_CONFIG
by Ian Feng (Code Review) 13 Jul '21

13 Jul '21

Attention is currently required from: Dtrain Hsu, Henry Sun, Paul Menzel, Shou-Chieh Hsu, Karthik Ramasubramanian. Ian Feng has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56248 ) Change subject: mb/google/dedede/var/cret: Enable/disable Touchscreen based on FW_CONFIG ...................................................................... Patch Set 4: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/56248/comment/f5de40cb_b23a2f58 PS3, Line 10: The Touchscreen settings are included GPIO settings and I2C bus settings. > Done Done File src/mainboard/google/dedede/variants/cret/gpio.c: https://review.coreboot.org/c/coreboot/+/56248/comment/4dda71d8_3317bd48 PS3, Line 103: // Audio codec > Done Done -- To view, visit https://review.coreboot.org/c/coreboot/+/56248 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ice517c034e2dab93bb27e75dccf06d9a0936526b Gerrit-Change-Number: 56248 Gerrit-PatchSet: 4 Gerrit-Owner: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Henry Sun <henrysun(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Alan Lee <alan_lee(a)compal.corp-partner.google.com> Gerrit-CC: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-CC: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Attention: Henry Sun <henrysun(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Tue, 13 Jul 2021 13:11:11 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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Change in coreboot[master]: src/soc/intel/*: Change legacy_8254_timer to CMOS option
by Sean Rhodes (Code Review) 13 Jul '21

13 Jul '21

Attention is currently required from: Sean Rhodes, Jeremy Soller, Tim Wawrzynczak, Patrick Rudolph. Hello build bot (Jenkins), Jeremy Soller, Tim Wawrzynczak, Angel Pons, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/56256 to look at the new patch set (#5). Change subject: src/soc/intel/*: Change legacy_8254_timer to CMOS option ...................................................................... src/soc/intel/*: Change legacy_8254_timer to CMOS option Change legacy_8254_timer to be CMOS option rather than Kconfig to allow it to be changed at runtime. Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Change-Id: Ic82c7f25cdf6587de5c40f59441579cfc92ff2f1 --- M src/soc/intel/alderlake/fsp_params.c M src/soc/intel/cannonlake/fsp_params.c M src/soc/intel/elkhartlake/fsp_params.c M src/soc/intel/icelake/fsp_params.c M src/soc/intel/jasperlake/fsp_params.c M src/soc/intel/skylake/chip.c M src/soc/intel/tigerlake/fsp_params.c 7 files changed, 34 insertions(+), 13 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/56256/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/56256 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic82c7f25cdf6587de5c40f59441579cfc92ff2f1 Gerrit-Change-Number: 56256 Gerrit-PatchSet: 5 Gerrit-Owner: Sean Rhodes <admin(a)starlabs.systems> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Sean Rhodes <admin(a)starlabs.systems> Gerrit-Attention: Jeremy Soller <jeremy(a)system76.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/volteer/baseboard: Configure chipset_lockdown seperately
by Felix Singer (Code Review) 13 Jul '21

13 Jul '21

Attention is currently required from: Furquan Shaikh, Tim Wawrzynczak, Angel Pons. Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56209 ) Change subject: mb/google/volteer/baseboard: Configure chipset_lockdown seperately ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/56209/comment/44f6a87a_ba3c0f2d PS2, Line 15: : Thus, move `chipset_lockdown` out of `common_soc_config` in the : baseboard devicetree and configure it seperately. : > It should be a Kconfig. And default to CHIPSET_LOCKDOWN_COREBOOT. My initial idea was to swap the two enum values in `soc/intel/common/block/include/intelblocks/cfg.h`, that `CHIPSET_LOCKDOWN_COREBOOT` becomes 0 and thus the default, but that requires all boards using this setting or we need to identify the boards where `CHIPSET_LOCKDOWN_FSP` should be used. We discussed this in IRC yesterday. Other possible options would be just dropping `CHIPSET_LOCKDOWN_FSP` and enforcing `CHIPSET_LOCKDOWN_COREBOOT` or replacing the devicetree option by a Kconfig option, as Angel mentioned. -- To view, visit https://review.coreboot.org/c/coreboot/+/56209 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I595c042cf62680d61f60965710d382bfdcd81671 Gerrit-Change-Number: 56209 Gerrit-PatchSet: 2 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Furquan Shaikh <furquan(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Tue, 13 Jul 2021 13:10:14 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Furquan Shaikh <furquan(a)google.com> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/dedede/var/cret: Enable/disable Touchscreen based on FW_CONFIG
by Ian Feng (Code Review) 13 Jul '21

13 Jul '21

Attention is currently required from: Dtrain Hsu, Henry Sun, Paul Menzel, Shou-Chieh Hsu, Karthik Ramasubramanian. Ian Feng has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56248 ) Change subject: mb/google/dedede/var/cret: Enable/disable Touchscreen based on FW_CONFIG ...................................................................... Patch Set 4: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/56248/comment/44559a86_d0b01137 PS3, Line 10: The Touchscreen settings are included GPIO settings and I2C bus settings. > Can you please rephrase this, as I do not fully understand the sentence? Done File src/mainboard/google/dedede/variants/cret/gpio.c: https://review.coreboot.org/c/coreboot/+/56248/comment/de7609e5_a104246b PS3, Line 103: // Audio codec > Please use C89 comment style for consistency. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/56248 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ice517c034e2dab93bb27e75dccf06d9a0936526b Gerrit-Change-Number: 56248 Gerrit-PatchSet: 4 Gerrit-Owner: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Henry Sun <henrysun(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Alan Lee <alan_lee(a)compal.corp-partner.google.com> Gerrit-CC: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-CC: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Attention: Henry Sun <henrysun(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Tue, 13 Jul 2021 13:08:20 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/dedede/var/cret: Enable/disable Touchscreen based on FW_CONFIG
by Ian Feng (Code Review) 13 Jul '21

13 Jul '21

Attention is currently required from: Dtrain Hsu, Henry Sun, Shou-Chieh Hsu, Karthik Ramasubramanian. Ian Feng has uploaded a new patch set (#4) to the change originally created by Dtrain Hsu. ( https://review.coreboot.org/c/coreboot/+/56248 ) Change subject: mb/google/dedede/var/cret: Enable/disable Touchscreen based on FW_CONFIG ...................................................................... mb/google/dedede/var/cret: Enable/disable Touchscreen based on FW_CONFIG Enable/disable Touchscreen function based on Touchscreen bit of FW_CONFIG. BUG=b:193482999 BRANCH=dedede TEST=Build and test the change on cret. Signed-off-by: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Change-Id: Ice517c034e2dab93bb27e75dccf06d9a0936526b --- M src/mainboard/google/dedede/variants/baseboard/devicetree.cb M src/mainboard/google/dedede/variants/cret/gpio.c M src/mainboard/google/dedede/variants/cret/overridetree.cb 3 files changed, 37 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/56248/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/56248 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ice517c034e2dab93bb27e75dccf06d9a0936526b Gerrit-Change-Number: 56248 Gerrit-PatchSet: 4 Gerrit-Owner: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Reviewer: Henry Sun <henrysun(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Alan Lee <alan_lee(a)compal.corp-partner.google.com> Gerrit-CC: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-CC: Ian Feng <ian_feng(a)compal.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Dtrain Hsu <dtrain_hsu(a)compal.corp-partner.google.com> Gerrit-Attention: Henry Sun <henrysun(a)google.com> Gerrit-Attention: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: tests: Add lib/libgcc-test test case
by Jakub Czapiga (Code Review) 13 Jul '21

13 Jul '21

Jakub Czapiga has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/56257 ) Change subject: tests: Add lib/libgcc-test test case ...................................................................... tests: Add lib/libgcc-test test case Add tests for src/lib/libgcc.c __clzsi2() implementation. Unlike GCC implementation, coreboot one can handle zero input. Signed-off-by: Jakub Czapiga <jacz(a)semihalf.com> Change-Id: I3f46071d0921e8c5edc5df3c296d11c77de01c88 --- M tests/lib/Makefile.inc A tests/lib/libgcc-test.c 2 files changed, 79 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/56257/1 diff --git a/tests/lib/Makefile.inc b/tests/lib/Makefile.inc index 6750353..028db73 100644 --- a/tests/lib/Makefile.inc +++ b/tests/lib/Makefile.inc @@ -31,6 +31,7 @@ tests-y += spd_cache-ddr3-test tests-y += spd_cache-ddr4-test tests-y += cbmem_stage_cache-test +tests-y += libgcc-test string-test-srcs += tests/lib/string-test.c string-test-srcs += src/lib/string.c @@ -177,3 +178,5 @@ cbmem_stage_cache-test-cflags += -I 3rdparty/vboot/firmware/include cbmem_stage_cache-test-cflags += -I $(src)/commonlib/include cbmem_stage_cache-test-config += CONFIG_CBMEM_STAGE_CACHE=1 + +libgcc-test-srcs += tests/lib/libgcc-test.c diff --git a/tests/lib/libgcc-test.c b/tests/lib/libgcc-test.c new file mode 100644 index 0000000..a35c537 --- /dev/null +++ b/tests/lib/libgcc-test.c @@ -0,0 +1,76 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include "../lib/libgcc.c" + +#include <tests/test.h> +#include <stdlib.h> +#include <string.h> + +struct { + u32 value; + int expected_output; +} test_data[] = { + /* GCC documentation says, __clzsi2() has undefined result for zero as an input value, + but coreboot implementation can handle this. */ + { .value = 0, .expected_output = 32 }, + + { .value = 1, .expected_output = 31 }, + { .value = 2, .expected_output = 30 }, + { .value = 3, .expected_output = 30 }, + { .value = 4, .expected_output = 29 }, + { .value = 5, .expected_output = 29 }, + { .value = 6, .expected_output = 29 }, + { .value = 7, .expected_output = 29 }, + + { .value = 0xF, .expected_output = 28 }, + { .value = 0x10, .expected_output = 27 }, + { .value = 0x25, .expected_output = 26 }, + { .value = 0x5D, .expected_output = 25 }, + { .value = 0xB7, .expected_output = 24 }, + + { .value = 0x133, .expected_output = 23 }, + { .value = 0x3DC, .expected_output = 22 }, + { .value = 0x6F1, .expected_output = 21 }, + { .value = 0x897, .expected_output = 20 }, + + { .value = 0x1FFF, .expected_output = 19 }, + { .value = 0x2222, .expected_output = 18 }, + { .value = 0x7BAD, .expected_output = 17 }, + { .value = 0xE708, .expected_output = 16 }, + + { .value = 0x1DABD, .expected_output = 15 }, + { .value = 0x29876, .expected_output = 14 }, + { .value = 0x56665, .expected_output = 13 }, + { .value = 0xABCDE, .expected_output = 12 }, + + { .value = 0x18365F, .expected_output = 11 }, + { .value = 0x3D0115, .expected_output = 10 }, + { .value = 0x4B07EB, .expected_output = 9 }, + { .value = 0xCCC74D, .expected_output = 8 }, + + { .value = 0x17933ED, .expected_output = 7 }, + { .value = 0x2B00071, .expected_output = 6 }, + { .value = 0x4D4C1A5, .expected_output = 5 }, + { .value = 0xAD01FFF, .expected_output = 4 }, + + { .value = 0x1C5A8057, .expected_output = 3 }, + { .value = 0x35AB23C3, .expected_output = 2 }, + { .value = 0x7017013B, .expected_output = 1 }, + { .value = 0xAD01EB15, .expected_output = 0 }, +}; + +void test_clzsi2_with_data(void **state) +{ + for (int i = 0; i < ARRAY_SIZE(test_data); ++i) + assert_int_equal(test_data[i].expected_output, __clzsi2(test_data[i].value)); +} + +int main(void) +{ + const struct CMUnitTest tests[] = { + cmocka_unit_test(test_clzsi2_with_data), + }; + + + return cmocka_run_group_tests(tests, NULL, NULL); +} -- To view, visit https://review.coreboot.org/c/coreboot/+/56257 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3f46071d0921e8c5edc5df3c296d11c77de01c88 Gerrit-Change-Number: 56257 Gerrit-PatchSet: 1 Gerrit-Owner: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-MessageType: newchange

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coreboot-gerrit July 2021