coreboot-gerrit July 2021

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Change in coreboot[master]: soc/intel/tigerlake: Make use of `cpu/intel/cpu_ids.h'
by EricR Lai (Code Review) 16 Jul '21

16 Jul '21

Attention is currently required from: Wonkyu Kim, Furquan Shaikh, Tim Wawrzynczak, Subrata Banik, Angel Pons, Patrick Rudolph. EricR Lai has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56369 ) Change subject: soc/intel/tigerlake: Make use of `cpu/intel/cpu_ids.h' ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/56369 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I773114a703d62bf469aa74b128c697cc0924cc3d Gerrit-Change-Number: 56369 Gerrit-PatchSet: 3 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: Wonkyu Kim Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Wonkyu Kim Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Fri, 16 Jul 2021 06:58:34 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: x86/smp/spinlock: Disable thread coop when taking spinlock
by Furquan Shaikh (Code Review) 16 Jul '21

16 Jul '21

Attention is currently required from: Raul Rangel. Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56320 ) Change subject: x86/smp/spinlock: Disable thread coop when taking spinlock ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/56320 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1b929070b7f175965d4f37be693462fef26be052 Gerrit-Change-Number: 56320 Gerrit-PatchSet: 3 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Comment-Date: Fri, 16 Jul 2021 06:56:45 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: lib/thread: Rename thread_cooperate and thread_prevent_coop
by Furquan Shaikh (Code Review) 16 Jul '21

16 Jul '21

Attention is currently required from: Raul Rangel. Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56357 ) Change subject: lib/thread: Rename thread_cooperate and thread_prevent_coop ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/56357 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1d70c18965f53e733e871ca03107270612efa4fc Gerrit-Change-Number: 56357 Gerrit-PatchSet: 1 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Comment-Date: Fri, 16 Jul 2021 06:56:17 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: lib/thread: Allow nesting thread_cooperate and thread_prevent_coop
by Furquan Shaikh (Code Review) 16 Jul '21

16 Jul '21

Attention is currently required from: Raul Rangel. Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56350 ) Change subject: lib/thread: Allow nesting thread_cooperate and thread_prevent_coop ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/56350 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I325ab6181b17c5c084ca1e2c181b4df235020557 Gerrit-Change-Number: 56350 Gerrit-PatchSet: 2 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Comment-Date: Fri, 16 Jul 2021 06:55:46 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: vboot/secdata_tpm: Add WRITE_STCLEAR attr to kernel ARB space
by Andrey Pronin (Code Review) 16 Jul '21

16 Jul '21

Attention is currently required from: Furquan Shaikh, Aseda Aboagye. Andrey Pronin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56358 ) Change subject: vboot/secdata_tpm: Add WRITE_STCLEAR attr to kernel ARB space ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/56358 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3181b4c18acd908e924ad858b677e891312423fe Gerrit-Change-Number: 56358 Gerrit-PatchSet: 1 Gerrit-Owner: Aseda Aboagye <aaboagye(a)google.com> Gerrit-Reviewer: Andrey Pronin <apronin(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Aseda Aboagye <aaboagye(a)google.com> Gerrit-Comment-Date: Fri, 16 Jul 2021 06:54:07 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/elkhartlake: Expose FIVR config to mainboard
by Werner Zeh (Code Review) 16 Jul '21

16 Jul '21

Attention is currently required from: Maulik V Vaghela, Mario Scheithauer, Subrata Banik, Lean Sheng Tan, Patrick Rudolph. Werner Zeh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55861 ) Change subject: soc/intel/elkhartlake: Expose FIVR config to mainboard ...................................................................... Patch Set 4: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/55861 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie1b0e0cc908ba69805dec7682100dfccb3b9d8b5 Gerrit-Change-Number: 55861 Gerrit-PatchSet: 4 Gerrit-Owner: Lean Sheng Tan <lean.sheng.tan(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Lean Sheng Tan <lean.sheng.tan(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Fri, 16 Jul 2021 06:53:33 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/skylake: Make use of `cpu/intel/cpu_ids.h'
by Subrata Banik (Code Review) 16 Jul '21

16 Jul '21

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/56371 ) Change subject: soc/intel/skylake: Make use of `cpu/intel/cpu_ids.h' ...................................................................... soc/intel/skylake: Make use of `cpu/intel/cpu_ids.h' Remove inclusion of mp_init.h for getting CPUIDs and use dedicated cpu_ids.h file in SoC directory. Change-Id: I2123a081baaf6fd254fe81d64eaeee1e3248dd34 Signed-off-by: Subrata Banik <subrata.banik(a)intel.com> --- M src/soc/intel/skylake/bootblock/report_platform.c M src/soc/intel/skylake/chip.c 2 files changed, 1 insertion(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/71/56371/1 diff --git a/src/soc/intel/skylake/bootblock/report_platform.c b/src/soc/intel/skylake/bootblock/report_platform.c index df3d4c8..4af51d60 100644 --- a/src/soc/intel/skylake/bootblock/report_platform.c +++ b/src/soc/intel/skylake/bootblock/report_platform.c @@ -3,12 +3,12 @@ #include <arch/cpu.h> #include <device/pci_ops.h> #include <console/console.h> +#include <cpu/intel/cpu_ids.h> #include <cpu/intel/microcode.h> #include <cpu/x86/msr.h> #include <cpu/x86/name.h> #include <device/pci.h> #include <device/pci_ids.h> -#include <intelblocks/mp_init.h> #include <soc/bootblock.h> #include <soc/cpu.h> #include <soc/pch.h> diff --git a/src/soc/intel/skylake/chip.c b/src/soc/intel/skylake/chip.c index 2599e12..354a6ee 100644 --- a/src/soc/intel/skylake/chip.c +++ b/src/soc/intel/skylake/chip.c @@ -12,7 +12,6 @@ #include <intelblocks/cfg.h> #include <intelblocks/itss.h> #include <intelblocks/lpc_lib.h> -#include <intelblocks/mp_init.h> #include <intelblocks/pcie_rp.h> #include <intelblocks/power_limit.h> #include <intelblocks/xdci.h> -- To view, visit https://review.coreboot.org/c/coreboot/+/56371 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2123a081baaf6fd254fe81d64eaeee1e3248dd34 Gerrit-Change-Number: 56371 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: lib/thread: Clean up initialization sequence
by Furquan Shaikh (Code Review) 16 Jul '21

16 Jul '21

Attention is currently required from: Raul Rangel. Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/56356 ) Change subject: lib/thread: Clean up initialization sequence ...................................................................... Patch Set 1: (1 comment) File src/lib/thread.c: https://review.coreboot.org/c/coreboot/+/56356/comment/02fe00dd_a92cdca9 PS1, Line 261: t->can_yield = 1; Why do we need to set this explicitly at this point? `prepare_thread()` always marks new threads as "can_yeild" (line 191). -- To view, visit https://review.coreboot.org/c/coreboot/+/56356 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7f1d6afac3b0622612565b37c61fbd2cd2481552 Gerrit-Change-Number: 56356 Gerrit-PatchSet: 1 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Comment-Date: Fri, 16 Jul 2021 06:50:31 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/amd/cezanne: enable crypto in PSP
by Kangheui Won (Code Review) 16 Jul '21

16 Jul '21

Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson, Felix Held. Hello build bot (Jenkins), Jason Glenesk, Raul Rangel, Marshall Dawson, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/55833 to look at the new patch set (#2). Change subject: soc/amd/cezanne: enable crypto in PSP ...................................................................... soc/amd/cezanne: enable crypto in PSP Enable crypto functions for cezanne PSP since support has been added. Signed-off-by: Kangheui Won <khwon(a)chromium.org> Change-Id: I725b0cac801ac0429f362a83aa58a8b9de158550 --- M src/soc/amd/cezanne/psp_verstage/chipset.c M src/soc/amd/cezanne/psp_verstage/svc.c M src/soc/amd/common/psp_verstage/Makefile.inc M src/soc/amd/common/psp_verstage/include/psp_verstage.h M src/soc/amd/common/psp_verstage/vboot_crypto.c M src/soc/amd/picasso/psp_verstage/chipset.c M src/vendorcode/amd/fsp/cezanne/include/bl_uapp/bl_syscall_public.h 7 files changed, 100 insertions(+), 16 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/55833/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/55833 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I725b0cac801ac0429f362a83aa58a8b9de158550 Gerrit-Change-Number: 55833 Gerrit-PatchSet: 2 Gerrit-Owner: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/tigerlake: Make use of `cpu/intel/cpu_ids.h'
by Subrata Banik (Code Review) 16 Jul '21

16 Jul '21

Attention is currently required from: Tim Wawrzynczak, Patrick Rudolph. Hello build bot (Jenkins), Tim Wawrzynczak, Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/56369 to look at the new patch set (#3). Change subject: soc/intel/tigerlake: Make use of `cpu/intel/cpu_ids.h' ...................................................................... soc/intel/tigerlake: Make use of `cpu/intel/cpu_ids.h' Remove inclusion of mp_init.h for getting CPUIDs and use dedicated cpu_ids.h file in SoC directory. Change-Id: I773114a703d62bf469aa74b128c697cc0924cc3d Signed-off-by: Subrata Banik <subrata.banik(a)intel.com> --- M src/soc/intel/tigerlake/bootblock/report_platform.c M src/soc/intel/tigerlake/fsp_params.c M src/soc/intel/tigerlake/romstage/fsp_params.c 3 files changed, 3 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/69/56369/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/56369 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I773114a703d62bf469aa74b128c697cc0924cc3d Gerrit-Change-Number: 56369 Gerrit-PatchSet: 3 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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coreboot-gerrit July 2021