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Werner Zeh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55088 )
Change subject: drivers/i2c/designware: Report I2C timings for additional bus speeds
......................................................................
Patch Set 2:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/55088/comment/66f36296_bbffe5bd
PS2, Line 10: chose
> choose
Yep, thanks for catching.
https://review.coreboot.org/c/coreboot/+/55088/comment/fd3a56da_75073860
PS2, Line 17:
> As a test, does the Linux kernel expose those through `/sys` for example?
For my test I have booted into OS and used acpidump and iasl to recover the SSDT. Then, inside the disassembled SSDT, I was able to check the values.
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Rex-BC Chen has uploaded a new patch set (#100) to the change originally created by Yidi Lin. ( https://review.coreboot.org/c/coreboot/+/52260 )
Change subject: DO-NOT-SUBMIT: MT8195 Cherry review ToT
......................................................................
DO-NOT-SUBMIT: MT8195 Cherry review ToT
Signed-off-by: Yidi Lin <yidi.lin(a)mediatek.com>
Change-Id: I3ed96b245bbb52501e9b7d6b89ed42468f505ab0
---
M 3rdparty/amd_blobs
M 3rdparty/blobs
M 3rdparty/intel-microcode
M README.md
4 files changed, 4 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/52260/100
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Hello Hung-Te Lin, build bot (Jenkins), Yu-Ping Wu,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/55051
to look at the new patch set (#7).
Change subject: soc/mediatek: Initialize SSPM
......................................................................
soc/mediatek: Initialize SSPM
Load SSPM firmware and boot up SSPM in ramstage.
DUT info:
CBFS: Found 'sspm.bin' @0x3bd80 size 0xc00f in mcache @0xffffea64
mtk_init_mcu: Loaded (and reset) sspm.bin in 23 msecs (137348 bytes)
TEST=Load SSPM blob ok, and we can see some logs of SSPM from AP.
Signed-off-by: Rex-BC Chen <rex-bc.chen(a)mediatek.com>
Change-Id: Ia227ea9f7d58129068cb36ec2de7d9feb677006b
---
M src/soc/mediatek/mt8195/Kconfig
M src/soc/mediatek/mt8195/Makefile.inc
M src/soc/mediatek/mt8195/soc.c
3 files changed, 11 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/51/55051/7
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Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55051 )
Change subject: soc/mediatek: Initialize SSPM
......................................................................
Patch Set 6:
(1 comment)
File src/soc/mediatek/mt8195/Kconfig:
https://review.coreboot.org/c/coreboot/+/55051/comment/1a440c98_361b24e5
PS2, Line 32: The file name of the MediaTek SSPM firmware.
> I was thinking of the path in the filesystem during build time, where cbfstool takes it from to add […]
That can be easily found in Makefile.inc by searching CONFIG_SSPM_FIRMWARE, so it seems easier to keep it simple here?
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Change subject: soc/mediatek: Initialize SSPM
......................................................................
Patch Set 6:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/55051/comment/76ec50ff_3774f9ed
PS5, Line 11: TEST=Load SSPM blob ok, and we can see some logs of SSPM from AP.
> Do you have timing data? […]
Done
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Rex-BC Chen has uploaded a new patch set (#99) to the change originally created by Yidi Lin. ( https://review.coreboot.org/c/coreboot/+/52260 )
Change subject: DO-NOT-SUBMIT: MT8195 Cherry review ToT
......................................................................
DO-NOT-SUBMIT: MT8195 Cherry review ToT
Signed-off-by: Yidi Lin <yidi.lin(a)mediatek.com>
Change-Id: I3ed96b245bbb52501e9b7d6b89ed42468f505ab0
---
M 3rdparty/amd_blobs
M 3rdparty/blobs
M 3rdparty/intel-microcode
M README.md
4 files changed, 4 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/52260/99
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Hello Hung-Te Lin, build bot (Jenkins), Yu-Ping Wu,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/55051
to look at the new patch set (#6).
Change subject: soc/mediatek: Initialize SSPM
......................................................................
soc/mediatek: Initialize SSPM
Load SSPM firmware and boot up SSPM in ramstage.
TEST=Load SSPM blob ok, and we can see some logs of SSPM from AP.
DUT info:
CBFS: Found 'sspm.bin' @0x3bd80 size 0xc00f in mcache @0xffffea64
mtk_init_mcu: Loaded (and reset) sspm.bin in 23 msecs (137348 bytes)
Signed-off-by: Rex-BC Chen <rex-bc.chen(a)mediatek.com>
Change-Id: Ia227ea9f7d58129068cb36ec2de7d9feb677006b
---
M src/soc/mediatek/mt8195/Kconfig
M src/soc/mediatek/mt8195/Makefile.inc
M src/soc/mediatek/mt8195/soc.c
3 files changed, 11 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/51/55051/6
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