coreboot-gerrit June 2021

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Change in coreboot[master]: src/mainboard: Add Star Labs labtop series
by Star Labs (Code Review) 02 Jun '21

02 Jun '21

Star Labs has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55128 ) Change subject: src/mainboard: Add Star Labs labtop series ...................................................................... Patch Set 4: (1 comment) File src/mainboard/starlabs/labtop/variants/cml/romstage.c: https://review.coreboot.org/c/coreboot/+/55128/comment/c7073a7a_26fe372f PS4, Line 114: const uint8_t ht = get_uint_option("hyper_threading", memupd->FspmConfig.HyperThreading); > line over 96 characters Please fix. -- To view, visit https://review.coreboot.org/c/coreboot/+/55128 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iffa6061b0e600880b0c93746f35b1731e4841e31 Gerrit-Change-Number: 55128 Gerrit-PatchSet: 4 Gerrit-Owner: Star Labs <admin(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 02 Jun 2021 06:45:39 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: cbfstool/linux_trampoline.S: Fixup the e820 table
by Rocky Phagura (Code Review) 02 Jun '21

02 Jun '21

Attention is currently required from: Paul Menzel, Arthur Heymans, Kyösti Mälkki. Rocky Phagura has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55074 ) Change subject: cbfstool/linux_trampoline.S: Fixup the e820 table ...................................................................... Patch Set 2: (1 comment) Patchset: PS2: > Arthur, this fixes the issue I had encountered with unknown memory type (type 16). […] sorry for the typo. Meant to say "Memory is now properly reserved". -- To view, visit https://review.coreboot.org/c/coreboot/+/55074 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie0e41c66e002919e41590327afe0f543e0037369 Gerrit-Change-Number: 55074 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Rocky Phagura Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Comment-Date: Wed, 02 Jun 2021 06:40:51 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Rocky Phagura Gerrit-MessageType: comment

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Change in coreboot[master]: cbfstool/linux_trampoline.S: Fixup the e820 table
by Rocky Phagura (Code Review) 02 Jun '21

02 Jun '21

Attention is currently required from: Paul Menzel, Arthur Heymans, Kyösti Mälkki. Rocky Phagura has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55074 ) Change subject: cbfstool/linux_trampoline.S: Fixup the e820 table ...................................................................... Patch Set 2: Code-Review+1 (1 comment) Patchset: PS2: Arthur, this fixes the issue I had encountered with unknown memory type (type 16). Memory is not properly "reserved". Confirmed on deltalake mainboard (xeon_sp) with both ACPI EINJ and HEST. Thank you -- To view, visit https://review.coreboot.org/c/coreboot/+/55074 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie0e41c66e002919e41590327afe0f543e0037369 Gerrit-Change-Number: 55074 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Rocky Phagura Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Comment-Date: Wed, 02 Jun 2021 06:38:13 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: src/mainboard: Add Star Labs labtop series
by build bot (Jenkins) (Code Review) 02 Jun '21

02 Jun '21

Attention is currently required from: Star Labs. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55128 ) Change subject: src/mainboard: Add Star Labs labtop series ...................................................................... Patch Set 3: (1 comment) File src/mainboard/starlabs/labtop/variants/cml/romstage.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120511): https://review.coreboot.org/c/coreboot/+/55128/comment/d09064d3_ab6d4c13 PS3, Line 114: const uint8_t ht = get_uint_option("hyper_threading", memupd->FspmConfig.HyperThreading); line over 96 characters -- To view, visit https://review.coreboot.org/c/coreboot/+/55128 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iffa6061b0e600880b0c93746f35b1731e4841e31 Gerrit-Change-Number: 55128 Gerrit-PatchSet: 3 Gerrit-Owner: Star Labs <admin(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Star Labs <admin(a)starlabs.systems> Gerrit-Comment-Date: Wed, 02 Jun 2021 06:36:22 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya: move MIPI camera setting into overridetree
by Scott Chao (Code Review) 02 Jun '21

02 Jun '21

Scott Chao has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/55134 ) Change subject: mb/google/brya: move MIPI camera setting into overridetree ...................................................................... mb/google/brya: move MIPI camera setting into overridetree In order to support no MIPI camera variant, move related configuration into variant folder. BUG=b:188272162 BRANCH=none TEST=build no MIPI camera variant without error Signed-off-by: Scott Chao <scott_chao(a)wistron.corp-partner.google.com> Change-Id: I4e64d078a8e39732ad29443c3b09ca008a7e902f --- M src/mainboard/google/brya/variants/baseboard/devicetree.cb M src/mainboard/google/brya/variants/brya0/overridetree.cb 2 files changed, 84 insertions(+), 86 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/34/55134/1 diff --git a/src/mainboard/google/brya/variants/baseboard/devicetree.cb b/src/mainboard/google/brya/variants/baseboard/devicetree.cb index ddb1ece..c8fd53e 100644 --- a/src/mainboard/google/brya/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/brya/variants/baseboard/devicetree.cb @@ -129,19 +129,7 @@ device domain 0 on device ref igpu on end device ref dtt on end - device ref ipu on - chip drivers/intel/mipi_camera - register "acpi_uid" = "0x50000" - register "acpi_name" = ""IPU0"" - register "device_type" = "INTEL_ACPI_CAMERA_CIO2" - - register "cio2_num_ports" = "1" - register "cio2_lanes_used" = "{4}" # 4 CSI Camera lanes are used - register "cio2_lane_endpoint[0]" = ""^I2C0.CAM0"" - register "cio2_prt[0]" = "2" - device generic 0 on end - end - end + device ref ipu on end device ref tbt_pcie_rp0 on end device ref tbt_pcie_rp1 on end device ref tbt_pcie_rp2 on end @@ -156,78 +144,6 @@ device generic 0 on end end end - - device ref i2c0 on - chip drivers/intel/mipi_camera - register "acpi_hid" = ""OVTI8856"" - register "acpi_uid" = "0" - register "acpi_name" = ""CAM0"" - register "chip_name" = ""Ov 8856 Camera"" - register "device_type" = "INTEL_ACPI_CAMERA_SENSOR" - - register "ssdb.lanes_used" = "4" - register "ssdb.link_used" = "0" - register "ssdb.vcm_type" = "0x0C" - register "vcm_name" = ""VCM0"" - register "num_freq_entries" = "2" - register "link_freq[0]" = "360 * MHz" # 360 MHz - register "link_freq[1]" = "180 * MHz" # 180 MHz - register "remote_name" = ""IPU0"" - - register "has_power_resource" = "1" - #Controls - register "clk_panel.clks[0].clknum" = "IMGCLKOUT_3" - register "clk_panel.clks[0].freq" = "FREQ_19_2_MHZ" - - register "gpio_panel.gpio[0].gpio_num" = "GPP_D15" #power_enable_2p8 - register "gpio_panel.gpio[1].gpio_num" = "GPP_D16" #power_enable_1p2 - register "gpio_panel.gpio[2].gpio_num" = "GPP_D3" #reset - - #_ON - register "on_seq.ops_cnt" = "5" - register "on_seq.ops[0]" = "SEQ_OPS_CLK_ENABLE(0, 0)" - register "on_seq.ops[1]" = "SEQ_OPS_GPIO_ENABLE(0, 5)" - register "on_seq.ops[2]" = "SEQ_OPS_GPIO_ENABLE(1, 5)" - register "on_seq.ops[3]" = "SEQ_OPS_GPIO_DISABLE(2, 5)" - register "on_seq.ops[4]" = "SEQ_OPS_GPIO_ENABLE(2, 5)" - - #_OFF - register "off_seq.ops_cnt" = "4" - register "off_seq.ops[0]" = "SEQ_OPS_CLK_DISABLE(0, 0)" - register "off_seq.ops[1]" = "SEQ_OPS_GPIO_DISABLE(2, 0)" - register "off_seq.ops[2]" = "SEQ_OPS_GPIO_DISABLE(1, 0)" - register "off_seq.ops[3]" = "SEQ_OPS_GPIO_DISABLE(0, 0)" - - device i2c 10 on end - end - chip drivers/intel/mipi_camera - register "acpi_uid" = "2" - register "acpi_name" = ""VCM0"" - register "chip_name" = ""DW9768 VCM"" - register "device_type" = "INTEL_ACPI_CAMERA_VCM" - - register "pr0" = ""\\_SB.PCI0.I2C0.CAM0.PRIC"" - register "vcm_compat" = ""dongwoon,dw9768"" - - device i2c 0C on end - end - chip drivers/intel/mipi_camera - register "acpi_uid" = "1" - register "acpi_name" = ""NVM0"" - register "chip_name" = ""AT24 EEPROM"" - register "device_type" = "INTEL_ACPI_CAMERA_NVM" - - register "pr0" = ""\\_SB.PCI0.I2C0.CAM0.PRIC"" - register "nvm_compat" = ""atmel,24c1024"" - - register "nvm_size" = "0x2800" - register "nvm_pagesize" = "0x01" - register "nvm_readonly" = "0x01" - register "nvm_width" = "0x0E" - - device i2c 58 on end - end - end #I2C0 device ref i2c3 on chip drivers/i2c/tpm register "hid" = ""GOOG0005"" diff --git a/src/mainboard/google/brya/variants/brya0/overridetree.cb b/src/mainboard/google/brya/variants/brya0/overridetree.cb index 452e1d8..78fc472 100644 --- a/src/mainboard/google/brya/variants/brya0/overridetree.cb +++ b/src/mainboard/google/brya/variants/brya0/overridetree.cb @@ -116,6 +116,19 @@ device generic 0 on end end end + device ref ipu on + chip drivers/intel/mipi_camera + register "acpi_uid" = "0x50000" + register "acpi_name" = ""IPU0"" + register "device_type" = "INTEL_ACPI_CAMERA_CIO2" + + register "cio2_num_ports" = "1" + register "cio2_lanes_used" = "{4}" # 4 CSI Camera lanes are used + register "cio2_lane_endpoint[0]" = ""^I2C0.CAM0"" + register "cio2_prt[0]" = "2" + device generic 0 on end + end + end device ref cnvi_wifi on chip drivers/wifi/generic register "wake" = "GPE0_PME_B0" @@ -146,7 +159,76 @@ register "property_list[0].integer" = "1" device i2c 1a on end end - end + chip drivers/intel/mipi_camera + register "acpi_hid" = ""OVTI8856"" + register "acpi_uid" = "0" + register "acpi_name" = ""CAM0"" + register "chip_name" = ""Ov 8856 Camera"" + register "device_type" = "INTEL_ACPI_CAMERA_SENSOR" + + register "ssdb.lanes_used" = "4" + register "ssdb.link_used" = "0" + register "ssdb.vcm_type" = "0x0C" + register "vcm_name" = ""VCM0"" + register "num_freq_entries" = "2" + register "link_freq[0]" = "360 * MHz" # 360 MHz + register "link_freq[1]" = "180 * MHz" # 180 MHz + register "remote_name" = ""IPU0"" + + register "has_power_resource" = "1" + #Controls + register "clk_panel.clks[0].clknum" = "IMGCLKOUT_3" + register "clk_panel.clks[0].freq" = "FREQ_19_2_MHZ" + + register "gpio_panel.gpio[0].gpio_num" = "GPP_D15" #power_enable_2p8 + register "gpio_panel.gpio[1].gpio_num" = "GPP_D16" #power_enable_1p2 + register "gpio_panel.gpio[2].gpio_num" = "GPP_D3" #reset + + #_ON + register "on_seq.ops_cnt" = "5" + register "on_seq.ops[0]" = "SEQ_OPS_CLK_ENABLE(0, 0)" + register "on_seq.ops[1]" = "SEQ_OPS_GPIO_ENABLE(0, 5)" + register "on_seq.ops[2]" = "SEQ_OPS_GPIO_ENABLE(1, 5)" + register "on_seq.ops[3]" = "SEQ_OPS_GPIO_DISABLE(2, 5)" + register "on_seq.ops[4]" = "SEQ_OPS_GPIO_ENABLE(2, 5)" + + #_OFF + register "off_seq.ops_cnt" = "4" + register "off_seq.ops[0]" = "SEQ_OPS_CLK_DISABLE(0, 0)" + register "off_seq.ops[1]" = "SEQ_OPS_GPIO_DISABLE(2, 0)" + register "off_seq.ops[2]" = "SEQ_OPS_GPIO_DISABLE(1, 0)" + register "off_seq.ops[3]" = "SEQ_OPS_GPIO_DISABLE(0, 0)" + + device i2c 10 on end + end + chip drivers/intel/mipi_camera + register "acpi_uid" = "2" + register "acpi_name" = ""VCM0"" + register "chip_name" = ""DW9768 VCM"" + register "device_type" = "INTEL_ACPI_CAMERA_VCM" + + register "pr0" = ""\\_SB.PCI0.I2C0.CAM0.PRIC"" + register "vcm_compat" = ""dongwoon,dw9768"" + + device i2c 0C on end + end + chip drivers/intel/mipi_camera + register "acpi_uid" = "1" + register "acpi_name" = ""NVM0"" + register "chip_name" = ""AT24 EEPROM"" + register "device_type" = "INTEL_ACPI_CAMERA_NVM" + + register "pr0" = ""\\_SB.PCI0.I2C0.CAM0.PRIC"" + register "nvm_compat" = ""atmel,24c1024"" + + register "nvm_size" = "0x2800" + register "nvm_pagesize" = "0x01" + register "nvm_readonly" = "0x01" + register "nvm_width" = "0x0E" + + device i2c 58 on end + end + end #I2C0 device ref i2c1 on chip drivers/i2c/hid register "generic.hid" = ""ELAN9050"" -- To view, visit https://review.coreboot.org/c/coreboot/+/55134 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I4e64d078a8e39732ad29443c3b09ca008a7e902f Gerrit-Change-Number: 55134 Gerrit-PatchSet: 1 Gerrit-Owner: Scott Chao <scott_chao(a)wistron.corp-partner.google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: ec: Add Star Labs ITE 8987E support
by Star Labs (Code Review) 02 Jun '21

02 Jun '21

Attention is currently required from: Andy Pont. Star Labs has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52797 ) Change subject: ec: Add Star Labs ITE 8987E support ...................................................................... Patch Set 12: (1 comment) File src/ec/starlabs/it8987/acpi/ec.asl: https://review.coreboot.org/c/coreboot/+/52797/comment/9a47fc03_8a4209c2 PS8, Line 97: Store (0x03, \_SB.PCI0.GFX0.CLID) > This doesn't exist in coreboot, hence being commented out, so we should probably take it out. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/52797 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1967f7c4a7e3cab714f22844bf36749e0c9652b6 Gerrit-Change-Number: 52797 Gerrit-PatchSet: 12 Gerrit-Owner: Star Labs <admin(a)starlabs.systems> Gerrit-Reviewer: Andy Pont <andy.pont(a)sdcsystems.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Andy Pont <andy.pont(a)sdcsystems.com> Gerrit-Comment-Date: Wed, 02 Jun 2021 06:31:23 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Andy Pont <andy.pont(a)sdcsystems.com> Gerrit-MessageType: comment

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Change in coreboot[master]: src/mainboard: Add Star Labs labtop series
by build bot (Jenkins) (Code Review) 02 Jun '21

02 Jun '21

Attention is currently required from: Star Labs. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55128 ) Change subject: src/mainboard: Add Star Labs labtop series ...................................................................... Patch Set 4: (1 comment) File src/mainboard/starlabs/labtop/variants/cml/romstage.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-120509): https://review.coreboot.org/c/coreboot/+/55128/comment/c79acc96_5abe0ef8 PS4, Line 114: const uint8_t ht = get_uint_option("hyper_threading", memupd->FspmConfig.HyperThreading); line over 96 characters -- To view, visit https://review.coreboot.org/c/coreboot/+/55128 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iffa6061b0e600880b0c93746f35b1731e4841e31 Gerrit-Change-Number: 55128 Gerrit-PatchSet: 4 Gerrit-Owner: Star Labs <admin(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Star Labs <admin(a)starlabs.systems> Gerrit-Comment-Date: Wed, 02 Jun 2021 06:27:58 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/guybrush/var/guybrush: Reconfigure left speaker amplifier
by Karthik Ramasubramanian (Code Review) 02 Jun '21

02 Jun '21

Attention is currently required from: Raul Rangel, Furquan Shaikh, Martin Roth, Marshall Dawson. Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55028 ) Change subject: mb/google/guybrush/var/guybrush: Reconfigure left speaker amplifier ...................................................................... Patch Set 2: (1 comment) File src/mainboard/google/guybrush/variants/guybrush/overridetree.cb: https://review.coreboot.org/c/coreboot/+/55028/comment/57b68f98_c3dc46dc PS1, Line 147: device i2c 2a on end > Not that there are two entries with uid=0, does this require "probed" property as well? Done. Updated the uid to 2. Also set the probed property so that the kernel I2C driver can probe and add the concerned I2C device. Tested this on Guybrush board version 1. -- To view, visit https://review.coreboot.org/c/coreboot/+/55028 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I69a7e7dd65a459c2e5629ada1dea1f1660dd9990 Gerrit-Change-Number: 55028 Gerrit-PatchSet: 2 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Eric Peers <epeers(a)google.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Comment-Date: Wed, 02 Jun 2021 06:23:57 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Furquan Shaikh <furquan(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: src/mainboard: Add Star Labs labtop series
by Star Labs (Code Review) 02 Jun '21

02 Jun '21

Attention is currently required from: Star Labs. Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/55128 to look at the new patch set (#4). Change subject: src/mainboard: Add Star Labs labtop series ...................................................................... src/mainboard: Add Star Labs labtop series Add support for LabTop Mk III (kblr) and LabTop Mk IV (cml) Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Change-Id: Iffa6061b0e600880b0c93746f35b1731e4841e31 --- M Documentation/distributions.md M Documentation/mainboard/index.md A src/mainboard/starlabs/Kconfig A src/mainboard/starlabs/Kconfig.name A src/mainboard/starlabs/labtop/Kconfig A src/mainboard/starlabs/labtop/Kconfig.name A src/mainboard/starlabs/labtop/Makefile.inc A src/mainboard/starlabs/labtop/acpi/ec.asl A src/mainboard/starlabs/labtop/acpi/mainboard.asl A src/mainboard/starlabs/labtop/acpi/sleep.asl A src/mainboard/starlabs/labtop/acpi/superio.asl A src/mainboard/starlabs/labtop/board_info.txt A src/mainboard/starlabs/labtop/bootblock.c A src/mainboard/starlabs/labtop/cmos.default A src/mainboard/starlabs/labtop/cmos.layout A src/mainboard/starlabs/labtop/dsdt.asl A src/mainboard/starlabs/labtop/hda_verb.c A src/mainboard/starlabs/labtop/mainboard.c A src/mainboard/starlabs/labtop/ramstage.c A src/mainboard/starlabs/labtop/spd/Makefile.inc A src/mainboard/starlabs/labtop/spd/empty_ddr4.spd.hex A src/mainboard/starlabs/labtop/spd/micron_dimm_MT40A1G16KD-062EE.spd.hex A src/mainboard/starlabs/labtop/spd/samsung-K4A8G165WB-BCRC.spd.hex A src/mainboard/starlabs/labtop/spd/spd.h A src/mainboard/starlabs/labtop/spd/spd_util.c A src/mainboard/starlabs/labtop/variants/baseboard/include/baseboard/memory.h A src/mainboard/starlabs/labtop/variants/baseboard/include/baseboard/romstage.h A src/mainboard/starlabs/labtop/variants/baseboard/include/baseboard/variants.h A src/mainboard/starlabs/labtop/variants/cml/Makefile.inc A src/mainboard/starlabs/labtop/variants/cml/board.fmd A src/mainboard/starlabs/labtop/variants/cml/data.vbt A src/mainboard/starlabs/labtop/variants/cml/devicetree.cb A src/mainboard/starlabs/labtop/variants/cml/gma-mainboard.ads A src/mainboard/starlabs/labtop/variants/cml/include/variant/gpio.h A src/mainboard/starlabs/labtop/variants/cml/include/variant/hda_verb.h A src/mainboard/starlabs/labtop/variants/cml/romstage.c A src/mainboard/starlabs/labtop/variants/kbl/Makefile.inc A src/mainboard/starlabs/labtop/variants/kbl/board.fmd A src/mainboard/starlabs/labtop/variants/kbl/data.vbt A src/mainboard/starlabs/labtop/variants/kbl/devicetree.cb A src/mainboard/starlabs/labtop/variants/kbl/gma-mainboard.ads A src/mainboard/starlabs/labtop/variants/kbl/include/variant/gpio.h A src/mainboard/starlabs/labtop/variants/kbl/include/variant/hda_verb.h A src/mainboard/starlabs/labtop/variants/kbl/romstage.c 44 files changed, 1,989 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/55128/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/55128 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iffa6061b0e600880b0c93746f35b1731e4841e31 Gerrit-Change-Number: 55128 Gerrit-PatchSet: 4 Gerrit-Owner: Star Labs <admin(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Star Labs <admin(a)starlabs.systems> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/guybrush/var/guybrush: Reconfigure left speaker amplifier
by Karthik Ramasubramanian (Code Review) 02 Jun '21

02 Jun '21

Attention is currently required from: Raul Rangel, Martin Roth, Marshall Dawson, Karthik Ramasubramanian. Hello build bot (Jenkins), Raul Rangel, Furquan Shaikh, Martin Roth, Marshall Dawson, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/55028 to look at the new patch set (#2). Change subject: mb/google/guybrush/var/guybrush: Reconfigure left speaker amplifier ...................................................................... mb/google/guybrush/var/guybrush: Reconfigure left speaker amplifier In order to resolve the I2C address conflict with another peripheral in the upcoming hardware build, left speaker amplifier I2C address is reconfigured. BUG=b:188539052 TEST=Build Guybrush mainboard. On Guybrush board ID 1, all the 3 speaker amplifiers are added to the ACPI table. \_SB.I2C2.D028: Realtek SPK AMP L at I2C: 03:28 \_SB.I2C2.D029: Realtek SPK AMP R at I2C: 03:29 \_SB.I2C2.D02A: Realtek SPK AMP L1 at I2C: 03:2a At the OS side, the concerned speaker amplifiers are probed and enumerated. localhost ~ # i2cdetect -y -r 2 0 1 2 3 4 5 6 7 8 9 a b c d e f 00: -- -- -- -- -- -- -- -- -- -- -- -- -- 10: -- -- -- -- -- -- -- -- -- -- UU -- -- -- -- -- 20: -- -- -- -- -- -- -- -- UU UU -- -- -- -- -- -- 30: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 40: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 50: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 60: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 70: -- -- -- -- -- -- -- -- Change-Id: I69a7e7dd65a459c2e5629ada1dea1f1660dd9990 Signed-off-by: Karthikeyan Ramasubramanian <kramasub(a)google.com> --- M src/mainboard/google/guybrush/variants/guybrush/overridetree.cb 1 file changed, 8 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/55028/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/55028 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I69a7e7dd65a459c2e5629ada1dea1f1660dd9990 Gerrit-Change-Number: 55028 Gerrit-PatchSet: 2 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Eric Peers <epeers(a)google.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-MessageType: newpatchset

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coreboot-gerrit June 2021