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Change in coreboot[master]: Documentation: Add documentation for resource allocator
by Furquan Shaikh (Code Review) 25 Aug '21

25 Aug '21

Furquan Shaikh has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/43603 ) Change subject: Documentation: Add documentation for resource allocator ...................................................................... Documentation: Add documentation for resource allocator This change adds documentation for resource allocator in coreboot which captures the expectations from device and platform drivers and details about resource allocator v3 and v4. Change-Id: I887284b44df2bf871f45c3a93fbef9cfc37e42a0 Signed-off-by: Furquan Shaikh <furquan(a)google.com> --- A Documentation/device/index.md A Documentation/device/resource_allocation.md M Documentation/index.md 3 files changed, 95 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/43603/1 diff --git a/Documentation/device/index.md b/Documentation/device/index.md new file mode 100644 index 0000000..9b703d6 --- /dev/null +++ b/Documentation/device/index.md @@ -0,0 +1,6 @@ +# Device management specific documentation + +This section contains documentation about device management in +coreboot. + +- [Resource allocation](resource_allocation.md) diff --git a/Documentation/device/resource_allocation.md b/Documentation/device/resource_allocation.md new file mode 100644 index 0000000..e82b1c1 --- /dev/null +++ b/Documentation/device/resource_allocation.md @@ -0,0 +1,88 @@ +# Resource allocation in coreboot + +## Introduction + +Resource allocator in coreboot is responsible for assigning parts of the address space to devices. It handles two types of resource requests from devices viz. IO (IORESOURCE_IO) and MMIO (IORESOURCE_MEM). It is typically used for PCI devices, but it also keeps track of other assignments to ensure that there are no conflicts + +## Principles followed by the resource allocator + +Resource allocator follows these basic principles: + +* Allocate address space for every device resource as long as its requirement can be satisfied. +* Don’t overlap with resources in fixed locations. +* Don’t overlap with other resource allocations and follow the rules of bridges i.e. downstream devices of bridges should use parts of the address space allocated to the bridge. + +## Pre-allocation and post-allocation requirements + +The main function that is responsible for allocating resources is `allocate_resources()` and gets called in the `BS_DEV_RESOURCES` boot state. The resource allocator depends upon the device and platform drivers to perform pre-allocation and post-allocation operations. Pre-allocation step requires that the device and platform drivers provide a complete map of fixed resources (resources not changed by the allocator) owned by the device/platform and a list of resource requests that need to be satisfied by the allocator. This is done as part of the `read_resources()` device operation. This step is critical to ensure that the resource allocator can perform its operation correctly as per the principles outlined above. In the post-allocation step, the device and platform drivers are expected to assign the address space allocated by the allocator to the resources requested by the device. This is done as part of the `set_resources()` device operation. This allows the resource allocator to perform its operation independent of platform and device type. + +## Input and output rules for the resource allocator + +As mentioned above, the entrypoint into the resource allocator is `allocate_resources()`. One of the important goals of the allocator is to perform its operation independent of platform and device type. In order to accomplish this, it is important to clearly define what goes into the allocator and what comes out of it. This determines the expected behavior from the device and platform drivers. + +The allocator processes all devices in each domain sub-tree and performs allocation for resources of the following types: +* IORESOURCE_IO +* IORESOURCE_MEM + +On the other hand, it does not change resources marked with IORESOURCE_FIXED flag. These are referred to as “fixed resources”. Resources that have the IORESOURCE_BRIDGE flag set are referred to as “bridge resources”. + + +### Input Rules + +1. IORESOURCE_IO and IORESOURCE_MEM are mutually exclusive. Both the flags must never be set for the same resource. +1. Resources that should not be changed by the allocator must be marked with IORESOURCE_FIXED flag. These resources must be pre-assigned a valid `base` address. It is used by the allocator to ensure there are no conflicts during the allocation step. +1. A fixed resource must not overlap with any other fixed resource within the same address space (IO / MEM), unless either of them is a bridge resource. +1. A fixed bridge resource must not overlap with any other fixed resource within the same address space and on the same bus (i.e. same device or its siblings), unless exactly one of them has IORESOURCE_SUBTRACTIVE set. + +### Output Rules + +1. All device attributes (members of `struct device` structure) beside non-fixed resources are left unaltered. +1. The structure of resource lists (`next` pointers) is left unaltered. +1. The `index` and `gran` attributes of all resources are left unaltered. +1. The `size`, `limit` and `align` attributes of all non-bridge resources are left unaltered. +1. All non-fixed assigned resources downstream of a bridge are covered by an assigned bridge resource of that bridge. +1. IORESOURCE_ASSIGNED flag is set for a non-fixed resource only if it is assigned address space by the allocator. If allocation for a non-fixed resource fails for any reason, all the attributes of that resource are left untouched including resource flags. It is the responsibility of the device and platform driver to check the IORESOURCE_ASSIGNED flag before using the values stored in the `base` field of the resource. + +## Resource allocator implementations + +Currently, there are two flavors of resource allocators implemented in coreboot - v3 and v4. + +### Resource Allocator v3 + +This is the older resource allocator which is used only on the following platforms: + +* northbridge/amd/pi/00630F01 +* northbridge/amd/pi/00730F01 +* northbridge/amd/pi/00660F01 +* northbridge/amd/agesa/family14 +* northbridge/amd/agesa/family15tn +* northbridge/amd/agesa/family16kb + +Resource allocator v3 is still retained and used for the above platforms because these platforms do not conform to the requirements of the allocator i.e. not all the fixed resources of the platform are provided during the `read_resources()` operation. This results in the resource allocator not getting a complete view of the address space. These platforms still work okay with the older resource allocator because of the way it performs allocation in a single window of the address space. No platform other than the ones listed above must use resource allocator v3 as it will be deprecated once the above platforms are fixed. It can be enabled by selecting the `RESOURCE_ALLOCATOR_V3` Kconfig option. + +#### Highlights + +* Contains two phases - resource computation phase and resource allocation phase. +* Finds a single window for resource allocation towards the top of addressable memory under 4G boundary. + +#### Limitations + +* Finds a single window for resource allocation towards the top of addressable memory under 4G boundary. +* Does not support allocation above 4G boundary. Thus, it might not be able to allocate resources for devices that request large allocations (e.g. USB4, discrete graphics, etc.). + + +### Resource Allocator v4 + +This is the latest resource allocator that uses multiple ranges for allocating resources. Unlike resource allocator v3, it does not use the topmost available window for allocation. Instead, it uses the first available window within the address space that is available and satisfies the resource request. This allows utilization of the entire available address space and also allows allocation above the 4G boundary. + +#### Highlights + +* Contains two phases - resource computation phase and resource allocation phase. +* In phase 1, the allocator walks in a DFS fashion gathering the requirements from leaf devices and propagates them back up to their upstream bridges until the requirements for all the downstream devices of the domain are gathered. +* Every domain is considered to have a fixed set of resources. These ranges cannot be relaxed based on the requirements of the downstream devices. They represent the available windows from which resources can be allocated to the different devices under the domain. +* In the second phase, the allocator walks down the tree allocating resources to downstream devices as per the resource requirements gathered in the first phase. +* In order to accomplish best fit for the resources, a list of ranges is maintained by each resource type (IO and MEM). +* Domain does not distinguish between mem and prefmem resources. Thus, the resource allocation at domain level considers mem and prefmem together when finding the best fit based on the biggest resource requirement. +* Allocation at bridge level works the same as at the domain level. One major difference at the bridge level is that it considers prefmem resources separately from mem resources. +* Device and platform drivers can request the allocator to perform allocation for a particular resource above 4G boundary by using the flag `IORESOURCE_ABOVE_4G`. + diff --git a/Documentation/index.md b/Documentation/index.md index a7c4869..ec26b4e 100644 --- a/Documentation/index.md +++ b/Documentation/index.md @@ -188,3 +188,4 @@ * [Utilities](util.md) * [Release notes for past releases](releases/index.md) * [Flashing firmware tutorial](flash_tutorial/index.md) +* [Device Management](device/index.md) -- To view, visit https://review.coreboot.org/c/coreboot/+/43603 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I887284b44df2bf871f45c3a93fbef9cfc37e42a0 Gerrit-Change-Number: 43603 Gerrit-PatchSet: 1 Gerrit-Owner: Furquan Shaikh <furquan(a)google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/intel/alderlake: Select USE_CAR_NEM_ENHANCED_V3 for ADL
by Subrata Banik (Code Review) 19 Aug '21

19 Aug '21

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/48345 ) Change subject: soc/intel/alderlake: Select USE_CAR_NEM_ENHANCED_V3 for ADL ...................................................................... soc/intel/alderlake: Select USE_CAR_NEM_ENHANCED_V3 for ADL TEST=Able to build and boot ADLRVP using eNEM mode. Change-Id: I08561c8f50bbc4afe2bcdff4cc50e74d8fa2f68e Signed-off-by: Subrata Banik <subrata.banik(a)intel.com> --- M src/soc/intel/alderlake/Kconfig 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/45/48345/1 diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig index 7e693cb..df2967c 100644 --- a/src/soc/intel/alderlake/Kconfig +++ b/src/soc/intel/alderlake/Kconfig @@ -22,7 +22,6 @@ select INTEL_DESCRIPTOR_MODE_CAPABLE select HAVE_SMI_HANDLER select IDT_IN_EVERY_STAGE - select INTEL_CAR_NEM #TODO - Enable INTEL_CAR_NEM_ENHANCED select INTEL_GMA_ACPI select INTEL_GMA_ADD_VBT if RUN_FSP_GOP select IOAPIC @@ -61,6 +60,7 @@ select UDK_202005_BINDING select DISPLAY_FSP_VERSION_INFO select HECI_DISABLE_USING_SMM + select USE_CAR_NEM_ENHANCED_V3 config MAX_CPUS int -- To view, visit https://review.coreboot.org/c/coreboot/+/48345 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I08561c8f50bbc4afe2bcdff4cc50e74d8fa2f68e Gerrit-Change-Number: 48345 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newchange

3 19

Change in coreboot[master]: tests: Add lib/fmap-test test case
by Name of user not set (Code Review) 17 Aug '21

17 Aug '21

Name of user not set #1003143 has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/48557 ) Change subject: tests: Add lib/fmap-test test case ...................................................................... tests: Add lib/fmap-test test case Signed-off-by: Jakub Czapiga <jacz(a)semihalf.com> Change-Id: I885ea05d509d3b1330de7a18531f310d290c6965 --- A tests/include/lib/fmap/fmap_config.h A tests/include/lib/fmap/fmap_data.h M tests/lib/Makefile.inc A tests/lib/fmap-test.c 4 files changed, 563 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/48557/1 diff --git a/tests/include/lib/fmap/fmap_config.h b/tests/include/lib/fmap/fmap_config.h new file mode 100644 index 0000000..c735330 --- /dev/null +++ b/tests/include/lib/fmap/fmap_config.h @@ -0,0 +1,87 @@ +#ifndef FMAPTOOL_GENERATED_HEADER_H_ +#define FMAPTOOL_GENERATED_HEADER_H_ + +/* + * This file was generated using fmaptool from util/cbfstools using + * src/mainboard/google/octopus/chromeos.fmd + * FMAP_OFFSET was changed to zero for testing purposes. + */ +#define FMAP_OFFSET 0x204000 +#define FMAP_SIZE 0x620 + +#define FMAP_SECTION_FLASH_START 0 +#define FMAP_SECTION_FLASH_SIZE 0x1000000 +#define FMAP_SECTION_WP_RO_START 0 +#define FMAP_SECTION_WP_RO_SIZE 0x400000 +#define FMAP_SECTION_SI_DESC_START 0 +#define FMAP_SECTION_SI_DESC_SIZE 0x1000 +#define FMAP_SECTION_IFWI_START 0x1000 +#define FMAP_SECTION_IFWI_SIZE 0x1ff000 +#define FMAP_SECTION_RO_VPD_START 0x200000 +#define FMAP_SECTION_RO_VPD_SIZE 0x4000 +#define FMAP_SECTION_RO_SECTION_START 0x204000 +#define FMAP_SECTION_RO_SECTION_SIZE 0x1fc000 +#define FMAP_SECTION_FMAP_START 0x204000 +#define FMAP_SECTION_FMAP_SIZE 0x800 +#define FMAP_SECTION_RO_FRID_START 0x204800 +#define FMAP_SECTION_RO_FRID_SIZE 0x40 +#define FMAP_SECTION_RO_FRID_PAD_START 0x204840 +#define FMAP_SECTION_RO_FRID_PAD_SIZE 0x7c0 +#define FMAP_SECTION_COREBOOT_START 0x205000 +#define FMAP_SECTION_COREBOOT_SIZE 0x1f8000 +#define FMAP_SECTION_GBB_START 0x3fd000 +#define FMAP_SECTION_GBB_SIZE 0x3000 +#define FMAP_SECTION_MISC_RW_START 0x400000 +#define FMAP_SECTION_MISC_RW_SIZE 0x30000 +#define FMAP_SECTION_RW_PRESERVE_START 0x400000 +#define FMAP_SECTION_RW_PRESERVE_SIZE 0x21000 +#define FMAP_SECTION_UNIFIED_MRC_CACHE_START 0x400000 +#define FMAP_SECTION_UNIFIED_MRC_CACHE_SIZE 0x21000 +#define FMAP_SECTION_RECOVERY_MRC_CACHE_START 0x400000 +#define FMAP_SECTION_RECOVERY_MRC_CACHE_SIZE 0x10000 +#define FMAP_SECTION_RW_MRC_CACHE_START 0x410000 +#define FMAP_SECTION_RW_MRC_CACHE_SIZE 0x10000 +#define FMAP_SECTION_RW_VAR_MRC_CACHE_START 0x420000 +#define FMAP_SECTION_RW_VAR_MRC_CACHE_SIZE 0x1000 +#define FMAP_SECTION_RW_ELOG_START 0x421000 +#define FMAP_SECTION_RW_ELOG_SIZE 0x3000 +#define FMAP_SECTION_RW_SHARED_START 0x424000 +#define FMAP_SECTION_RW_SHARED_SIZE 0x4000 +#define FMAP_SECTION_SHARED_DATA_START 0x424000 +#define FMAP_SECTION_SHARED_DATA_SIZE 0x2000 +#define FMAP_SECTION_VBLOCK_DEV_START 0x426000 +#define FMAP_SECTION_VBLOCK_DEV_SIZE 0x2000 +#define FMAP_SECTION_RW_VPD_START 0x428000 +#define FMAP_SECTION_RW_VPD_SIZE 0x2000 +#define FMAP_SECTION_RW_NVRAM_START 0x42a000 +#define FMAP_SECTION_RW_NVRAM_SIZE 0x5000 +#define FMAP_SECTION_FPF_STATUS_START 0x42f000 +#define FMAP_SECTION_FPF_STATUS_SIZE 0x1000 +#define FMAP_SECTION_RW_SECTION_A_START 0x430000 +#define FMAP_SECTION_RW_SECTION_A_SIZE 0x480000 +#define FMAP_SECTION_VBLOCK_A_START 0x430000 +#define FMAP_SECTION_VBLOCK_A_SIZE 0x10000 +#define FMAP_SECTION_FW_MAIN_A_START 0x440000 +#define FMAP_SECTION_FW_MAIN_A_SIZE 0x46ffc0 +#define FMAP_SECTION_RW_FWID_A_START 0x8affc0 +#define FMAP_SECTION_RW_FWID_A_SIZE 0x40 +#define FMAP_SECTION_RW_SECTION_B_START 0x8b0000 +#define FMAP_SECTION_RW_SECTION_B_SIZE 0x480000 +#define FMAP_SECTION_VBLOCK_B_START 0x8b0000 +#define FMAP_SECTION_VBLOCK_B_SIZE 0x10000 +#define FMAP_SECTION_FW_MAIN_B_START 0x8c0000 +#define FMAP_SECTION_FW_MAIN_B_SIZE 0x46ffc0 +#define FMAP_SECTION_RW_FWID_B_START 0xd2ffc0 +#define FMAP_SECTION_RW_FWID_B_SIZE 0x40 +#define FMAP_SECTION_SMMSTORE_START 0xd30000 +#define FMAP_SECTION_SMMSTORE_SIZE 0x40000 +#define FMAP_SECTION_RW_LEGACY_START 0xd70000 +#define FMAP_SECTION_RW_LEGACY_SIZE 0x1c0000 +#define FMAP_SECTION_BIOS_UNUSABLE_START 0xf30000 +#define FMAP_SECTION_BIOS_UNUSABLE_SIZE 0x4f000 +#define FMAP_SECTION_DEVICE_EXTENSION_START 0xf7f000 +#define FMAP_SECTION_DEVICE_EXTENSION_SIZE 0x80000 +//#define FMAP_SECTION_UNUSED_HOLE_START 0xfff000 +#define FMAP_SECTION_UNUSED_HOLE_SIZE 0x1000 + +#endif diff --git a/tests/include/lib/fmap/fmap_data.h b/tests/include/lib/fmap/fmap_data.h new file mode 100644 index 0000000..343feef --- /dev/null +++ b/tests/include/lib/fmap/fmap_data.h @@ -0,0 +1,148 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef TESTS_INCLUDE_LIB_FMAP_FMAP_DATA_H_ +#define TESTS_INCLUDE_LIB_FMAP_FMAP_DATA_H_ + +/* + * This file was converted using `xxd -i` from binary output of + * fmaptool from util/cbfstools. Data is based on output generated by + * mentioned tool using src/mainboard/google/octopus/chromeos.fmd file. + */ + +unsigned char tests_fmap_bin[] = { +0x5f, 0x5f, 0x46, 0x4d, 0x41, 0x50, 0x5f, 0x5f, 0x01, 0x01, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x46, 0x4c, +0x41, 0x53, 0x48, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x24, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x40, 0x00, 0x57, 0x50, 0x5f, 0x52, 0x4f, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x53, 0x49, +0x5f, 0x44, 0x45, 0x53, 0x43, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 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cbmem_console-romstage-test tests-y += cbmem_console-ramstage-test tests-y += list-test +tests-y += fmap-test string-test-srcs += tests/lib/string-test.c string-test-srcs += src/lib/string.c @@ -44,3 +45,10 @@ list-test-srcs += tests/lib/list-test.c list-test-srcs += src/lib/list.c +fmap-test-srcs += tests/lib/fmap-test.c +fmap-test-srcs += src/lib/fmap.c +fmap-test-srcs += tests/stubs/console.c +fmap-test-srcs += src/lib/boot_device.c +fmap-test-srcs += src/commonlib/region.c +fmap-test-cflags += -I tests/include/lib/fmap +fmap-test-cflags += -I 3rdparty/vboot/firmware/include diff --git a/tests/lib/fmap-test.c b/tests/lib/fmap-test.c new file mode 100644 index 0000000..2b7605d --- /dev/null +++ b/tests/lib/fmap-test.c @@ -0,0 +1,320 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <stdlib.h> +#include <string.h> + +#include <fmap.h> +#include <commonlib/region.h> + +#include <tests/test.h> + +#include <lib/fmap/fmap_data.h> +#include <lib/fmap/fmap_config.h> + +static struct region_device *rdev_root = NULL; +static char *flash_buffer = NULL; +static size_t flash_buffer_size = 0; + +static void *local_mmap(const struct region_device *rdev, size_t offset, size_t size) +{ + if (offset >= FMAP_SECTION_FLASH_START + && offset < FMAP_SECTION_FLASH_START + FMAP_SECTION_FLASH_SIZE) + return flash_buffer + offset; + + return NULL; +} + +static int local_unmap(const struct region_device *rdev, void *mapping) +{ + return 0; +} + +static ssize_t local_readat(const struct region_device *rdev, void *buffer, + size_t offset, size_t size) +{ + if (size + offset >= flash_buffer_size) + return -1; + + size = MIN(size, flash_buffer_size - offset); + + memcpy(buffer, flash_buffer + offset, size); + + return size; +} + +static ssize_t local_writeat(const struct region_device *rdev, const void *buffer, + size_t offset, size_t size) +{ + if (size + offset >= flash_buffer_size) + return -1; + + size = MIN(size, flash_buffer_size - offset); + + memcpy(flash_buffer + offset, buffer, size); + + return size; +} + +static ssize_t local_eraseat(const struct region_device *rdev, + size_t offset, size_t size) +{ + if (size + offset >= flash_buffer_size) + return -1; + + size = MIN(size, flash_buffer_size - offset); + + memset(flash_buffer + offset, 0, size); + + return size; +} + +static int setup_fmap_region_device(void **state) +{ + // Setup callbacks + struct region_device_ops *rdev_ops = malloc(sizeof(*rdev_ops)); + rdev_ops->mmap = local_mmap; + rdev_ops->munmap = local_unmap; + rdev_ops->readat = local_readat; + rdev_ops->writeat = local_writeat; + rdev_ops->eraseat = local_eraseat; + + // Prepare root region device + struct region_device rdev_new_root = REGION_DEV_INIT(rdev_ops, + FMAP_SECTION_FLASH_START, FMAP_SECTION_FLASH_SIZE); + rdev_root = malloc(sizeof(rdev_new_root)); + memcpy(rdev_root, &rdev_new_root, sizeof(rdev_new_root)); + + // Prepare fmap region device + struct region_device rdev_fmap = REGION_DEV_INIT(rdev_ops, + FMAP_SECTION_FMAP_START, FMAP_SECTION_FMAP_SIZE); + rdev_fmap.root = rdev_root; + + // Pass fmap region device to tests as state + *state = malloc(sizeof(rdev_fmap)); + memcpy(*state, &rdev_fmap, sizeof(rdev_fmap)); + + // Prepare flash buffer with dummy data and FMAP + flash_buffer = malloc(FMAP_SECTION_FLASH_SIZE); + flash_buffer_size = FMAP_SECTION_FLASH_SIZE; + memset(flash_buffer, 0, FMAP_SECTION_FLASH_SIZE); + for (int i = 0; i < FMAP_SECTION_FMAP_START; ++i) + flash_buffer[i] = 'a' + i % ('z' - 'a'); + memcpy(flash_buffer + FMAP_SECTION_FMAP_START, tests_fmap_bin, FMAP_SIZE); + for (int i = FMAP_SECTION_FMAP_START + FMAP_SECTION_FMAP_SIZE; + i < FMAP_SECTION_FLASH_SIZE; ++i) + flash_buffer[i] = 'a' + i % ('z' - 'a'); + + return 0; +} + +static int teardown_fmap_region_device(void **state) +{ + struct region_device *rdev_fmap = *state; + + free((void *)rdev_fmap->ops); + free(rdev_fmap); + + free(rdev_root); + rdev_root = NULL; + + free(flash_buffer); + flash_buffer = NULL; + flash_buffer_size = 0; + + return 0; +} + +void boot_device_init(void) +{ + // Setup in unit test setup function +} + +const struct region_device *boot_device_ro(void) +{ + return rdev_root; +} + +const struct region_device *boot_device_rw(void) +{ + return rdev_root; +} + +static void test_fmap_locate_area_as_rdev(void **state) +{ + struct region_device *rdev = *state; + + assert_int_not_equal(-1, fmap_locate_area_as_rdev("RO_VPD", rdev)); + + // Check if locating area second time works + assert_int_not_equal(-1, fmap_locate_area_as_rdev("RO_VPD", rdev)); + + assert_int_not_equal(-1, fmap_locate_area_as_rdev("RECOVERY_MRC_CACHE", rdev)); + + // Expect error when looking for non-existent area + assert_int_equal(-1, fmap_locate_area_as_rdev("NONEXISTENT_AREA", rdev)); + + assert_int_equal(-1, fmap_locate_area_as_rdev("", rdev)); + + // Expect error when passing invalid references + assert_int_equal(-1, fmap_locate_area_as_rdev(NULL, rdev)); + assert_int_equal(-1, fmap_locate_area_as_rdev("RW_SECTION_A", NULL)); +} + + +static void test_fmap_locate_area_as_rdev_rw(void **state) +{ + struct region_device *rdev = *state; + + assert_int_not_equal(-1, fmap_locate_area_as_rdev_rw("RW_SECTION_A", rdev)); + + // Check if locating area second time works + assert_int_not_equal(-1, fmap_locate_area_as_rdev_rw("RW_SECTION_A", rdev)); + + assert_int_not_equal(-1, fmap_locate_area_as_rdev_rw("MISC_RW", rdev)); + + // Expect error when looking for non-existent area + assert_int_equal(-1, fmap_locate_area_as_rdev_rw("NONEXISTENT_AREA", rdev)); + assert_int_equal(-1, fmap_locate_area_as_rdev_rw("", rdev)); + + // Expect error when passing invalid references + assert_int_equal(-1, fmap_locate_area_as_rdev_rw(NULL, rdev)); + assert_int_equal(-1, fmap_locate_area_as_rdev_rw("RW_SECTION_A", NULL)); +} + +static void test_fmap_locate_area(void **state) +{ + (void)state; + struct region ar; + + assert_int_not_equal(-1, fmap_locate_area("COREBOOT", &ar)); + + // Check if locating area second time works + assert_int_not_equal(-1, fmap_locate_area("COREBOOT", &ar)); + + assert_int_not_equal(-1, fmap_locate_area("GBB", &ar)); + + // Expect error when looking for non-existent area + assert_int_equal(-1, fmap_locate_area("NONEXISTENT_AREA", &ar)); + assert_int_equal(-1, fmap_locate_area("", &ar)); + + // Expect error when passing invalid references + assert_int_equal(-1, fmap_locate_area(NULL, &ar)); + assert_int_equal(-1, fmap_locate_area("SHARED_DATA", NULL)); +} + +static void test_fmap_find_region_name(void **state) +{ + (void)state; + struct region ar; + char found_area_name[FMAP_STRLEN] = ""; + const char *area_name = "RW_PRESERVE"; + + // Find area by name + assert_int_not_equal(-1, fmap_locate_area(area_name, &ar)); + + // Find name by previously find area + assert_int_not_equal(-1, fmap_find_region_name(&ar, found_area_name)); + assert_string_equal(area_name, found_area_name); + + // Expect error when passing invalid buffer + assert_int_equal(-1, fmap_find_region_name(&ar, NULL)); + + // Try to find non-existent area + ar.offset = 2142037; + ar.size = 636; + assert_int_equal(-1, fmap_find_region_name(&ar, found_area_name)); + + // Expect error when passing invalid region pointer + assert_int_equal(-1, fmap_find_region_name(NULL, found_area_name)); +} + +static void test_fmap_read_area(void **state) +{ + (void)state; + struct region ar; + char *buffer = malloc(FMAP_SECTION_RW_SECTION_A_SIZE); + + fmap_locate_area("RW_SECTION_A", &ar); + assert_int_equal(FMAP_SECTION_RW_SECTION_A_SIZE, + fmap_read_area("RW_SECTION_A", buffer, FMAP_SECTION_RW_SECTION_A_SIZE)); + assert_memory_equal(flash_buffer + FMAP_SECTION_RW_SECTION_A_START, buffer, + FMAP_SECTION_RW_SECTION_A_SIZE); + + assert_int_equal(-1, + fmap_read_area("NONEXISTENT_SECTION", + buffer, + FMAP_SECTION_RW_SECTION_A_SIZE)); + + assert_int_equal(-1, fmap_read_area(NULL, buffer, FMAP_SECTION_RW_SECTION_A_SIZE)); + assert_int_equal(-1, + fmap_read_area("RW_SECTION_A", NULL, FMAP_SECTION_RW_SECTION_A_SIZE)); + + free(buffer); +} + +static void test_fmap_overwrite_area(void **state) +{ + (void)state; + struct region ar; + char *buffer1 = malloc(FMAP_SECTION_FW_MAIN_A_SIZE); + char *buffer2 = malloc(FMAP_SECTION_FW_MAIN_A_SIZE); + char *new_data = malloc(FMAP_SECTION_FW_MAIN_A_SIZE); + + fmap_locate_area("FW_MAIN_A", &ar); + assert_int_equal(FMAP_SECTION_FW_MAIN_A_SIZE, + fmap_read_area("FW_MAIN_A", buffer1, FMAP_SECTION_FW_MAIN_A_SIZE)); + + memset(new_data, 0x42, FMAP_SECTION_FW_MAIN_A_SIZE); + assert_int_equal(FMAP_SECTION_FW_MAIN_A_SIZE, + fmap_overwrite_area("FW_MAIN_A", + new_data, + FMAP_SECTION_FW_MAIN_A_SIZE)); + + assert_int_equal(FMAP_SECTION_FW_MAIN_A_SIZE, + fmap_read_area("FW_MAIN_A", buffer2, FMAP_SECTION_FW_MAIN_A_SIZE)); + + assert_memory_not_equal(buffer1, buffer2, FMAP_SECTION_FW_MAIN_A_SIZE); + assert_memory_equal(buffer2, new_data, FMAP_SECTION_FW_MAIN_A_SIZE); + + assert_int_equal(-1, + fmap_overwrite_area("NONEXISTENT_SECTION", + new_data, + FMAP_SECTION_FW_MAIN_A_SIZE)); + + assert_int_equal(-1, + fmap_overwrite_area(NULL, new_data, FMAP_SECTION_FW_MAIN_A_SIZE)); + + assert_int_equal(-1, + fmap_overwrite_area("FW_MAIN_A", NULL, FMAP_SECTION_FW_MAIN_A_SIZE)); + + + free(buffer1); + free(buffer2); + free(new_data); +} + +int main(void) +{ + const struct CMUnitTest tests[] = { + cmocka_unit_test_setup_teardown(test_fmap_locate_area_as_rdev, + setup_fmap_region_device, + teardown_fmap_region_device), + cmocka_unit_test_setup_teardown(test_fmap_locate_area_as_rdev_rw, + setup_fmap_region_device, + teardown_fmap_region_device), + cmocka_unit_test_setup_teardown(test_fmap_locate_area, + setup_fmap_region_device, + teardown_fmap_region_device), + cmocka_unit_test_setup_teardown(test_fmap_find_region_name, + setup_fmap_region_device, + teardown_fmap_region_device), + cmocka_unit_test_setup_teardown(test_fmap_read_area, + setup_fmap_region_device, + teardown_fmap_region_device), + cmocka_unit_test_setup_teardown(test_fmap_overwrite_area, + setup_fmap_region_device, + teardown_fmap_region_device), + }; + + return cmocka_run_group_tests(tests, NULL, NULL); +} -- To view, visit https://review.coreboot.org/c/coreboot/+/48557 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I885ea05d509d3b1330de7a18531f310d290c6965 Gerrit-Change-Number: 48557 Gerrit-PatchSet: 1 Gerrit-Owner: Name of user not set #1003143 Gerrit-MessageType: newchange

5 21

Change in coreboot[master]: [WIP] util/inteltool: add opt to override cores number
by Maxim Polyakov (Code Review) 17 Aug '21

17 Aug '21

Maxim Polyakov has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/35919 ) Change subject: [WIP] util/inteltool: add opt to override cores number ...................................................................... [WIP] util/inteltool: add opt to override cores number In some cases, it is necessary to increase (if the server contains several processors) or decrease (dump should be more compact) the number of CPU cores for dump MSRs. Change-Id: I3a037cf7ac270d2b51d6e453334c358ff47b4105 Signed-off-by: Maxim Polyakov <max.senia.poliak(a)gmail.com> --- M util/inteltool/cpu.c M util/inteltool/inteltool.c M util/inteltool/inteltool.h 3 files changed, 15 insertions(+), 7 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/35919/1 diff --git a/util/inteltool/cpu.c b/util/inteltool/cpu.c index f100851..9ae46c9 100644 --- a/util/inteltool/cpu.c +++ b/util/inteltool/cpu.c @@ -219,7 +219,7 @@ return error; } -int print_intel_core_msrs(void) +int print_intel_core_msrs(unsigned int cores_num) { unsigned int i, core, id; msr_t msr; @@ -2256,8 +2256,10 @@ close(fd_msr); - unsigned int max_core_limit = cpu->max_core_limit ? 8 : cpu->max_core_limit; - for (core = 0; core < max_core_limit; core++) { + if (!cores_num) + cores_num = cpu->max_core_limit; + + for (core = 0; core < cores_num; core++) { #ifndef __DARWIN__ char msrfilename[64]; memset(msrfilename, 0, 64); diff --git a/util/inteltool/inteltool.c b/util/inteltool/inteltool.c index db80bd2..bc9af2b 100644 --- a/util/inteltool/inteltool.c +++ b/util/inteltool/inteltool.c @@ -476,7 +476,7 @@ static void print_usage(const char *name) { - printf("usage: %s [-vh?gGrpmedPMaAsfSRx]\n", name); + printf("usage: %s [-vh?gGrpmedPMcaAsfSRx]\n", name); printf("\n" " -v | --version: print the version\n" " -h | --help: print this help\n\n" @@ -493,6 +493,7 @@ " -d | --dmibar: dump northbridge DMIBAR registers\n" " -P | --pciexpress: dump northbridge PCIEXBAR registers\n\n" " -M | --msrs: dump CPU MSRs\n" + " -c <num> | --cores <num>: override CPU cores number for MSR dump\n\n" " -A | --ambs: dump AMB registers\n" " -x | --sgx: dump SGX status\n" " -a | --all: dump all known (safe) registers\n" @@ -508,6 +509,7 @@ struct pci_dev *sb = NULL, *nb, *gfx = NULL, *ahci = NULL, *dev; const char *dump_spd_file = NULL; int opt, option_index = 0; + unsigned int cores = 0; unsigned int id, i; char *sbname = "unknown", *nbname = "unknown", *gfxname = "unknown"; @@ -532,6 +534,7 @@ {"dmibar", 0, 0, 'd'}, {"pciexpress", 0, 0, 'P'}, {"msrs", 0, 0, 'M'}, + {"cores", required_argument, 0, 'c'}, {"ambs", 0, 0, 'A'}, {"spi", 0, 0, 's'}, {"spd", 0, 0, 'S'}, @@ -543,7 +546,7 @@ {0, 0, 0, 0} }; - while ((opt = getopt_long(argc, argv, "vh?gGrpmedPMaAsfRS:x", + while ((opt = getopt_long(argc, argv, "vh?gGrpmedPMc:aAsfRS:x", long_options, &option_index)) != EOF) { switch (opt) { case 'v': @@ -587,6 +590,9 @@ case 'M': dump_coremsrs = 1; break; + case 'c': + cores = strtoul(optarg, NULL, 0); + break; case 'a': dump_gpios = 1; show_gpio_diffs = 1; @@ -813,7 +819,7 @@ } if (dump_coremsrs) { - print_intel_core_msrs(); + print_intel_core_msrs(cores); printf("\n\n"); } diff --git a/util/inteltool/inteltool.h b/util/inteltool/inteltool.h index fc6dc4b..7708d70 100644 --- a/util/inteltool/inteltool.h +++ b/util/inteltool/inteltool.h @@ -385,7 +385,7 @@ void unmap_physical(void *virt_addr, size_t len); unsigned int cpuid(unsigned int op); -int print_intel_core_msrs(void); +int print_intel_core_msrs(unsigned int cores_num); int print_mchbar(struct pci_dev *nb, struct pci_access *pacc, const char *dump_spd_file); int print_pmbase(struct pci_dev *sb, struct pci_access *pacc); int print_rcba(struct pci_dev *sb); -- To view, visit https://review.coreboot.org/c/coreboot/+/35919 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3a037cf7ac270d2b51d6e453334c358ff47b4105 Gerrit-Change-Number: 35919 Gerrit-PatchSet: 1 Gerrit-Owner: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-MessageType: newchange

4 29

Change in coreboot[master]: soc/intel/common/block/cpu: Introduce USE_CAR_NEM_ENHANCED_V3 Kconfig
by Subrata Banik (Code Review) 16 Aug '21

16 Aug '21

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/48344 ) Change subject: soc/intel/common/block/cpu: Introduce USE_CAR_NEM_ENHANCED_V3 Kconfig ...................................................................... soc/intel/common/block/cpu: Introduce USE_CAR_NEM_ENHANCED_V3 Kconfig List of changes: 1. Default select USE_CAR_NEM_ENHANCED_V1 to use the existing algorithm 2. Select COS_MAPPED_TO_MSB 3. Add new MSR 0xc85 IA32_YMM 4. a. Update eNEM init flow: - Set MSR 0x1891 IA32_CR_SF_QOS_MASK_1 = 0xFFFFF - (2^(non-eviction mask)-1) - Set MSR 0x1892 IA32_CR_SF_QOS_MASK_2 = (2^(non-eviction mask)-1) - Set MSR 0xC85 L3_Protected_ways = (2^(no. of ways)-1) b. Update eNEM teardown flow: - Set MSR 0xC85 L3_Protected_ways = 0x00000 This new eNEM flow can be used for ADL SoC. Change-Id: Idb5a9ec74c50bda371c30e13aeadbb4326887fd6 Signed-off-by: Subrata Banik <subrata.banik(a)intel.com> --- M src/include/cpu/x86/msr.h M src/soc/intel/common/block/cpu/Kconfig M src/soc/intel/common/block/cpu/car/cache_as_ram.S M src/soc/intel/common/block/cpu/car/exit_car.S 4 files changed, 52 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/44/48344/1 diff --git a/src/include/cpu/x86/msr.h b/src/include/cpu/x86/msr.h index 5ae3ddf..1b089c0 100644 --- a/src/include/cpu/x86/msr.h +++ b/src/include/cpu/x86/msr.h @@ -85,6 +85,7 @@ #define IA32_HWP_CAPABILITIES 0x771 #define IA32_HWP_REQUEST 0x774 #define IA32_HWP_STATUS 0x777 +#define IA32_YMM 0xc85 #define IA32_PQR_ASSOC 0xc8f /* MSR bits 33:32 encode slot number 0-3 */ #define IA32_PQR_ASSOC_MASK (1 << 0 | 1 << 1) diff --git a/src/soc/intel/common/block/cpu/Kconfig b/src/soc/intel/common/block/cpu/Kconfig index 9023b58..7af664d 100644 --- a/src/soc/intel/common/block/cpu/Kconfig +++ b/src/soc/intel/common/block/cpu/Kconfig @@ -66,6 +66,14 @@ This config supports INTEL_CAR_NEM_ENHANCED mode on TGL platform. +config USE_CAR_NEM_ENHANCED_V3 + bool + select USE_CAR_NEM_ENHANCED_V1 + select COS_MAPPED_TO_MSB + help + This config supports INTEL_CAR_NEM_ENHANCED mode on + ADL platform. + config COS_MAPPED_TO_MSB bool depends on INTEL_CAR_NEM_ENHANCED diff --git a/src/soc/intel/common/block/cpu/car/cache_as_ram.S b/src/soc/intel/common/block/cpu/car/cache_as_ram.S index 167342f..371ac73 100644 --- a/src/soc/intel/common/block/cpu/car/cache_as_ram.S +++ b/src/soc/intel/common/block/cpu/car/cache_as_ram.S @@ -413,7 +413,11 @@ set_eviction_mask: mov %ebx, %ecx /* back up the number of ways */ - mov %eax, %ebx /* back up the non-eviction mask*/ + mov %eax, %ebx /* back up the non-eviction mask */ +#if CONFIG(USE_CAR_NEM_ENHANCED_V3) + movd %ecx, %mm3 /* Store the number of ways in mm3 for later use */ + movd %ebx, %mm4 /* Store the non-eviction mask in mm4 for later use */ +#endif /* * Set MSR 0xC91 IA32_L3_MASK_1 or MSR 0x1891 IA32_CR_SF_QOS_MASK_1 * This MSR contain one bit per each way of LLC @@ -450,6 +454,37 @@ #endif xorl %edx, %edx wrmsr + +#if CONFIG(USE_CAR_NEM_ENHANCED_V3) + /* Set MSR 0x1891 IA32_CR_SF_QOS_MASK_1 = 0xFFFFF - (2^(non-eviction mask) - 1) */ + movd %mm4, %ecx + movl $0x01, %eax + shl %cl, %eax + subl $0x01, %eax + mov %eax, %ebx + mov $0xFFFFF, %eax + subl %ebx, %eax + xorl %edx, %edx + mov $IA32_CR_SF_QOS_MASK_1, %ecx + wrmsr + + /* Set MSR 0x1892 IA32_CR_SF_QOS_MASK_2 = (2^(non-eviction mask) - 1) */ + movd %mm4, %ecx + movl $0x01, %eax + shl %cl, %eax + subl $0x01, %eax + xorl %edx, %edx + mov $IA32_CR_SF_QOS_MASK_2, %ecx + wrmsr + + /* Set MSR 0xC85 L3_Protected_ways = (2^(no. of ways) - 1) */ + movd %mm3, %ecx + shl %cl, %eax + subl $0x01, %eax + xorl %edx, %edx + mov $IA32_YMM, %ecx + wrmsr +#endif /* * Set IA32_PQR_ASSOC * diff --git a/src/soc/intel/common/block/cpu/car/exit_car.S b/src/soc/intel/common/block/cpu/car/exit_car.S index 191232a..568a502 100644 --- a/src/soc/intel/common/block/cpu/car/exit_car.S +++ b/src/soc/intel/common/block/cpu/car/exit_car.S @@ -96,6 +96,13 @@ rdmsr and $~IA32_PQR_ASSOC_MASK, %edx wrmsr +#if CONFIG(USE_CAR_NEM_ENHANCED_V3) + /* Set MSR 0xC85 L3_Protected_ways = 0x00000 */ + mov $IA32_YMM, %ecx + mov $0x00000, %eax + xorl %edx, %edx + wrmsr +#endif #endif /* Return to caller. */ -- To view, visit https://review.coreboot.org/c/coreboot/+/48344 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Idb5a9ec74c50bda371c30e13aeadbb4326887fd6 Gerrit-Change-Number: 48344 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-MessageType: newchange

6 46

Change in coreboot[master]: mb/google/kukui: add support different ram table for Willow
by Lucas Chen (Code Review) 28 Jul '21

28 Jul '21

Lucas Chen has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45289 ) Change subject: mb/google/kukui: add support different ram table for Willow ...................................................................... mb/google/kukui: add support different ram table for Willow Add support different ram id table base on board_id. BUG=b:160288021 BRANCH=kukui TEST=emerge-jacuzzi coreboot Signed-off-by: Lucas Chen <lucas.chen(a)quanta.corp-partner.google.com> Change-Id: Icee922c647774f755d41bc3c37f6a0d5ffc35df1 --- M src/mainboard/google/kukui/boardid.c 1 file changed, 11 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/89/45289/1 diff --git a/src/mainboard/google/kukui/boardid.c b/src/mainboard/google/kukui/boardid.c old mode 100644 new mode 100755 index 548f36b..546247e --- a/src/mainboard/google/kukui/boardid.c +++ b/src/mainboard/google/kukui/boardid.c @@ -112,8 +112,17 @@ if (cached_ram_code == BOARD_ID_INIT) { cached_ram_code = get_adc_index(RAM_ID_CHANNEL); - /* Model-specific offset - see sdram_configs.c for details. */ - cached_ram_code += CONFIG_BOARD_SDRAM_TABLE_OFFSET; + /* Quirk for Willow: All Rev greater then 5 set SDRAM TABLE OFFSET=0x10. */ + if (CONFIG(BOARD_GOOGLE_WILLOW)) { + if (board_id() >= 6) { + cached_ram_code += 0x10; + } + else + cached_ram_code += CONFIG_BOARD_SDRAM_TABLE_OFFSET; + } + else + /* Model-specific offset - see sdram_configs.c for details. */ + cached_ram_code += CONFIG_BOARD_SDRAM_TABLE_OFFSET; } return cached_ram_code; } -- To view, visit https://review.coreboot.org/c/coreboot/+/45289 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icee922c647774f755d41bc3c37f6a0d5ffc35df1 Gerrit-Change-Number: 45289 Gerrit-PatchSet: 1 Gerrit-Owner: Lucas Chen <lucas.chen(a)quanta.corp-partner.google.com> Gerrit-MessageType: newchange

5 10

Change in coreboot[master]: sc7280: support bitbang UART w/gpio
by Ravi kumar (Code Review) 22 Jul '21

22 Jul '21

Ravi kumar has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/47284 ) Change subject: sc7280: support bitbang UART w/gpio ...................................................................... sc7280: support bitbang UART w/gpio Change-Id: Ic6c70f917a59e233f6ea518d9c39f73fe84991c3 Signed-off-by: Ravi Kumar Bokka <rbokka(a)codeaurora.org> --- M src/soc/qualcomm/sc7280/Kconfig M src/soc/qualcomm/sc7280/Makefile.inc A src/soc/qualcomm/sc7280/uart_bitbang.c 3 files changed, 56 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/84/47284/1 diff --git a/src/soc/qualcomm/sc7280/Kconfig b/src/soc/qualcomm/sc7280/Kconfig index fc2f34b..ed611e8 100644 --- a/src/soc/qualcomm/sc7280/Kconfig +++ b/src/soc/qualcomm/sc7280/Kconfig @@ -11,6 +11,9 @@ select HAVE_MONOTONIC_TIMER select ARM64_USE_ARCH_TIMER select SOC_QUALCOMM_COMMON + select CACHE_MRC_SETTINGS + select HAVE_UART_SPECIAL + select BOOTBLOCK_CONSOLE if SOC_QUALCOMM_SC7280 diff --git a/src/soc/qualcomm/sc7280/Makefile.inc b/src/soc/qualcomm/sc7280/Makefile.inc index 6d07629..3112141 100644 --- a/src/soc/qualcomm/sc7280/Makefile.inc +++ b/src/soc/qualcomm/sc7280/Makefile.inc @@ -6,10 +6,18 @@ bootblock-y += mmu.c bootblock-y += timer.c bootblock-y += spi.c +bootblock-$(CONFIG_SC7280_QSPI) += qspi.c +bootblock-y += clock.c +bootblock-y += gpio.c +bootblock-$(CONFIG_DRIVERS_UART) += uart_bitbang.c ################################################################################ verstage-y += timer.c verstage-y += spi.c +verstage-$(CONFIG_SC7280_QSPI) += qspi.c +verstage-y += clock.c +verstage-y += gpio.c +verstage-$(CONFIG_DRIVERS_UART) += uart_bitbang.c ################################################################################ romstage-y += cbmem.c @@ -19,12 +27,20 @@ romstage-y += ../common/mmu.c romstage-y += mmu.c romstage-y += spi.c +romstage-$(CONFIG_SC7280_QSPI) += qspi.c +romstage-y += clock.c +romstage-y += gpio.c +romstage-$(CONFIG_DRIVERS_UART) += uart_bitbang.c ################################################################################ ramstage-y += soc.c ramstage-y += cbmem.c ramstage-y += timer.c ramstage-y += spi.c +ramstage-$(CONFIG_SC7280_QSPI) += qspi.c +ramstage-y += clock.c +ramstage-y += gpio.c +ramstage-$(CONFIG_DRIVERS_UART) += uart_bitbang.c ################################################################################ diff --git a/src/soc/qualcomm/sc7280/uart_bitbang.c b/src/soc/qualcomm/sc7280/uart_bitbang.c new file mode 100644 index 0000000..7d88a20 --- /dev/null +++ b/src/soc/qualcomm/sc7280/uart_bitbang.c @@ -0,0 +1,37 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <console/uart.h> +#include <gpio.h> +#include <boot/coreboot_tables.h> + +#define UART_TX_PIN GPIO(44) + +void uart_fill_lb(void *data) +{ + +} + +static void set_tx(int line_state) +{ + gpio_set(UART_TX_PIN, line_state); +} + +void uart_init(unsigned int idx) +{ + gpio_output(UART_TX_PIN, 1); +} + +void uart_tx_byte(unsigned int idx, unsigned char data) +{ + uart_bitbang_tx_byte(data, set_tx); +} + +void uart_tx_flush(unsigned int idx) +{ + /* unnecessary, PIO Tx means transaction is over when tx_byte returns */ +} + +unsigned char uart_rx_byte(unsigned int idx) +{ + return 0; /* not implemented */ +} -- To view, visit https://review.coreboot.org/c/coreboot/+/47284 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic6c70f917a59e233f6ea518d9c39f73fe84991c3 Gerrit-Change-Number: 47284 Gerrit-PatchSet: 1 Gerrit-Owner: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-MessageType: newchange

5 23

Change in coreboot[master]: crossgcc: Update to GCC 8.4.0
by Iru Cai (vimacs) (Code Review) 20 Jul '21

20 Jul '21

Hello Iru Cai, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/42159 to review the following change. Change subject: crossgcc: Update to GCC 8.4.0 ...................................................................... crossgcc: Update to GCC 8.4.0 - Remove gnat-bad_constant.patch which is already in GCC 8.4.0 - Backport GNAT exception handler v1 Change-Id: Icfc8430764404a6c272deb490fee23c963bd7ee5 Signed-off-by: Iru Cai <mytbk920423(a)gmail.com> --- M util/crossgcc/buildgcc D util/crossgcc/patches/gcc-8.3.0_gnat-bad_constant.patch R util/crossgcc/patches/gcc-8.4.0_ada-musl_workaround.patch R util/crossgcc/patches/gcc-8.4.0_gnat.patch A util/crossgcc/patches/gcc-8.4.0_gnat_eh.patch R util/crossgcc/patches/gcc-8.4.0_libgcc.patch R util/crossgcc/patches/gcc-8.4.0_nds32_ite.patch D util/crossgcc/sum/gcc-8.3.0.tar.xz.cksum A util/crossgcc/sum/gcc-8.4.0.tar.xz.cksum 9 files changed, 272 insertions(+), 152 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/59/42159/1 diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc index 8770e02..e0827e0 100755 --- a/util/crossgcc/buildgcc +++ b/util/crossgcc/buildgcc @@ -36,7 +36,7 @@ GMP_VERSION=6.1.2 MPFR_VERSION=4.0.2 MPC_VERSION=1.1.0 -GCC_VERSION=8.3.0 +GCC_VERSION=8.4.0 GCC_AUTOCONF_VERSION=2.69 BINUTILS_VERSION=2.33.1 GDB_VERSION=8.3.1 diff --git a/util/crossgcc/patches/gcc-8.3.0_gnat-bad_constant.patch b/util/crossgcc/patches/gcc-8.3.0_gnat-bad_constant.patch deleted file mode 100644 index e98f933..0000000 --- a/util/crossgcc/patches/gcc-8.3.0_gnat-bad_constant.patch +++ /dev/null @@ -1,150 +0,0 @@ -commit b6f742f96c62bab0582021455328ae3be58e16d3 -Author: pmderodat <pmderodat@138bc75d-0d04-0410-961f-82ee72b054a4> -Date: Fri May 25 09:05:10 2018 +0000 - - [Ada] Remove "constant" attribute on Osint.Unknown_Attributes - - 2018-05-25 Arnaud Charlet <charlet(a)adacore.com> - - gcc/ada/ - - * exp_aggr.adb (Convert_To_Positional): Bump default for - Max_Others_Replicate to 32. Update comments. - * osint.ads (Unknown_Attributes): No longer pretend this is a constant. - (No_File_Info_Cache): Initialize separately. - * osint.adb (No_File_Info_Cache): Update initializer. - - git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@260739 138bc75d-0d04-0410-961f-82ee72b054a4 - -diff --git a/gcc/ada/ChangeLog b/gcc/ada/ChangeLog -index e4127e472aa..d56240b7b82 100644 ---- a/gcc/ada/ChangeLog -+++ b/gcc/ada/ChangeLog -@@ -188,6 +188,14 @@ - an allocator if the type is an unconstrained record type with default - discriminant. - -+2018-05-25 Arnaud Charlet <charlet(a)adacore.com> -+ -+ * exp_aggr.adb (Convert_To_Positional): Bump default for -+ Max_Others_Replicate to 32. Update comments. -+ * osint.ads (Unknown_Attributes): No longer pretend this is a constant. -+ (No_File_Info_Cache): Initialize separately. -+ * osint.adb (No_File_Info_Cache): Update initializer. -+ - 2018-05-04 John Marino <gnugcc(a)marino.st> - - PR ada/85635 -diff --git a/gcc/ada/exp_aggr.adb b/gcc/ada/exp_aggr.adb -index f723c1b4d99..ff5210eb4e4 100644 ---- a/gcc/ada/exp_aggr.adb -+++ b/gcc/ada/exp_aggr.adb -@@ -284,14 +284,14 @@ package body Exp_Aggr is - - procedure Convert_To_Positional - (N : Node_Id; -- Max_Others_Replicate : Nat := 5; -+ Max_Others_Replicate : Nat := 32; - Handle_Bit_Packed : Boolean := False); - -- If possible, convert named notation to positional notation. This - -- conversion is possible only in some static cases. If the conversion is - -- possible, then N is rewritten with the analyzed converted aggregate. - -- The parameter Max_Others_Replicate controls the maximum number of - -- values corresponding to an others choice that will be converted to -- -- positional notation (the default of 5 is the normal limit, and reflects -+ -- positional notation (the default of 32 is the normal limit, and reflects - -- the fact that normally the loop is better than a lot of separate - -- assignments). Note that this limit gets overridden in any case if - -- either of the restrictions No_Elaboration_Code or No_Implicit_Loops is -@@ -301,11 +301,6 @@ package body Exp_Aggr is - -- Packed_Array_Aggregate_Handled, we set this parameter to True, since - -- these are cases we handle in there. - -- -- It would seem useful to have a higher default for Max_Others_Replicate, -- -- but aggregates in the compiler make this impossible: the compiler -- -- bootstrap fails if Max_Others_Replicate is greater than 25. This -- -- is unexpected ??? -- - procedure Expand_Array_Aggregate (N : Node_Id); - -- This is the top-level routine to perform array aggregate expansion. - -- N is the N_Aggregate node to be expanded. -@@ -4292,7 +4287,7 @@ package body Exp_Aggr is - - procedure Convert_To_Positional - (N : Node_Id; -- Max_Others_Replicate : Nat := 5; -+ Max_Others_Replicate : Nat := 32; - Handle_Bit_Packed : Boolean := False) - is - Typ : constant Entity_Id := Etype (N); -diff --git a/gcc/ada/osint.adb b/gcc/ada/osint.adb -index 0c23761b6dc..896fbc7ee37 100644 ---- a/gcc/ada/osint.adb -+++ b/gcc/ada/osint.adb -@@ -250,8 +250,7 @@ package body Osint is - Attr : aliased File_Attributes; - end record; - -- No_File_Info_Cache : constant File_Info_Cache := -- (No_File, Unknown_Attributes); -+ No_File_Info_Cache : constant File_Info_Cache := (No_File, (others => 0)); - - package File_Name_Hash_Table is new GNAT.HTable.Simple_HTable ( - Header_Num => File_Hash_Num, -diff --git a/gcc/ada/osint.ads b/gcc/ada/osint.ads -index 65a87fe4ce3..6c75b521456 100644 ---- a/gcc/ada/osint.ads -+++ b/gcc/ada/osint.ads -@@ -255,10 +255,26 @@ package Osint is - -- from the disk and then cached in the File_Attributes parameter (possibly - -- along with other values). - -- type File_Attributes is private; -- Unknown_Attributes : constant File_Attributes; -+ File_Attributes_Size : constant Natural := 32; -+ -- This should be big enough to fit a "struct file_attributes" on any -+ -- system. It doesn't cause any malfunction if it is too big (which avoids -+ -- the need for either mapping the struct exactly or importing the sizeof -+ -- from C, which would result in dynamic code). However, it does waste -+ -- space (e.g. when a component of this type appears in a record, if it is -+ -- unnecessarily large). Note: for runtime units, use System.OS_Constants. -+ -- SIZEOF_struct_file_attributes instead, which has the exact value. -+ -+ type File_Attributes is -+ array (1 .. File_Attributes_Size) -+ of System.Storage_Elements.Storage_Element; -+ for File_Attributes'Alignment use Standard'Maximum_Alignment; -+ -+ Unknown_Attributes : File_Attributes; - -- A cache for various attributes for a file (length, accessibility,...) -- -- This must be initialized to Unknown_Attributes prior to the first call. -+ -- Will be initialized properly at elaboration (for efficiency later on, -+ -- avoid function calls every time we want to reset the attributes) prior -+ -- to the first usage. We cannot make it constant since the compiler may -+ -- put it in a read-only section. - - function Is_Directory - (Name : C_File_Name; -@@ -754,22 +770,4 @@ private - -- detected, the file being written is deleted, and a fatal error is - -- signalled. - -- File_Attributes_Size : constant Natural := 32; -- -- This should be big enough to fit a "struct file_attributes" on any -- -- system. It doesn't cause any malfunction if it is too big (which avoids -- -- the need for either mapping the struct exactly or importing the sizeof -- -- from C, which would result in dynamic code). However, it does waste -- -- space (e.g. when a component of this type appears in a record, if it is -- -- unnecessarily large). Note: for runtime units, use System.OS_Constants. -- -- SIZEOF_struct_file_attributes instead, which has the exact value. -- -- type File_Attributes is -- array (1 .. File_Attributes_Size) -- of System.Storage_Elements.Storage_Element; -- for File_Attributes'Alignment use Standard'Maximum_Alignment; -- -- Unknown_Attributes : constant File_Attributes := (others => 0); -- -- Will be initialized properly at elaboration (for efficiency later on, -- -- avoid function calls every time we want to reset the attributes). -- - end Osint; diff --git a/util/crossgcc/patches/gcc-8.3.0_ada-musl_workaround.patch b/util/crossgcc/patches/gcc-8.4.0_ada-musl_workaround.patch similarity index 100% rename from util/crossgcc/patches/gcc-8.3.0_ada-musl_workaround.patch rename to util/crossgcc/patches/gcc-8.4.0_ada-musl_workaround.patch diff --git a/util/crossgcc/patches/gcc-8.3.0_gnat.patch b/util/crossgcc/patches/gcc-8.4.0_gnat.patch similarity index 100% rename from util/crossgcc/patches/gcc-8.3.0_gnat.patch rename to util/crossgcc/patches/gcc-8.4.0_gnat.patch diff --git a/util/crossgcc/patches/gcc-8.4.0_gnat_eh.patch b/util/crossgcc/patches/gcc-8.4.0_gnat_eh.patch new file mode 100644 index 0000000..151a3e6 --- /dev/null +++ b/util/crossgcc/patches/gcc-8.4.0_gnat_eh.patch @@ -0,0 +1,270 @@ +commit 5d733372faa97c1c3943a20a252d000db37c738b +Author: Alexandre Oliva <oliva(a)adacore.com> +Date: Fri Aug 2 18:46:51 2019 +0000 + + rework Ada EH Machine_Occurrence deallocation + + Introduce exception handler ABI #1 to ensure single release, no access + after release of reraised Machine_Occurrences, and no failure to + re-reraise a Machine_Occurrence. + + Unlike Ada exceptions, foreign exceptions do not get a new + Machine_Occurrence upon reraise, but each handler would delete the + exception upon completion, normal or exceptional, save for the case of + a 'raise;' statement within the handler, that avoided the delete by + clearing the exception pointer that the cleanup would use to release + it. The cleared exception pointer might then be used by a subsequent + reraise within the same handler. Get_Current_Excep.all would also + expose the Machine_Occurrence to reuse by Reraise_Occurrence, even for + native exceptions. + + Under ABI #1, Begin_Handler_v1 claims responsibility for releasing an + exception by saving its cleanup and setting it to Claimed_Cleanup. + End_Handler_v1 restores the cleanup and runs it, as long as it isn't + still Claimed_Cleanup (which indicates an enclosing handler has + already claimed responsibility for releasing it), and as long as the + same exception is not being propagated up (the next handler of the + propagating exception will then claim responsibility for releasing + it), so reraise no longer needs to clear the exception pointer, and it + can just propagate the exception, just like Reraise_Occurrence. + + ABI #1 is fully interoperable with ABI #0, i.e., exception handlers + that call the #0 primitives can be linked together with ones that call + the #1 primitives, and they will not misbehave. When a #1 handler + claims responsibility for releasing an exception, even #0 reraises + dynamically nested within it will refrain from releasing it. However, + when a #0 handler is a handler of a foreign exception that would have + been responsible for releasing it with #1, a Reraise_Occurrence of + that foreign or other Machine_Occurrence-carrying exception may still + cause the exception to be released multiple times, and to be used + after it is first released, even if other handlers of the foreign + exception use #1. + + + for gcc/ada/ChangeLog + + * libgnat/a-exexpr.adb (Begin_Handler_v1, End_Handler_v1): New. + (Claimed_Cleanup): New. + (Begin_Handler, End_Handler): Document. + * gcc-interface/trans.c (gigi): Switch to exception handler + ABI #1. + (Exception_Handler_to_gnu_gcc): Save the original cleanup + returned by begin handler, pass it to end handler, and use + EH_ELSE_EXPR to pass a propagating exception to end handler. + (gnat_to_gnu): Leave the exception pointer alone for reraise. + (add_cleanup): Handle EH_ELSE_EXPR, require it by itself. + + From-SVN: r274029 + +diff --git a/gcc/ada/libgnat/a-exexpr.adb b/gcc/ada/libgnat/a-exexpr.adb +index b1aa1c6e6ba..5e72fd6e3f2 100644 +--- a/gcc/ada/libgnat/a-exexpr.adb ++++ b/gcc/ada/libgnat/a-exexpr.adb +@@ -197,15 +197,75 @@ package body Exception_Propagation is + -- whose machine occurrence is Mo. The message is empty, the backtrace + -- is empty too and the exception identity is Foreign_Exception. + +- -- Hooks called when entering/leaving an exception handler for a given +- -- occurrence, aimed at handling the stack of active occurrences. The +- -- calls are generated by gigi in tree_transform/N_Exception_Handler. ++ -- Hooks called when entering/leaving an exception handler for a ++ -- given occurrence. The calls are generated by gigi in ++ -- Exception_Handler_to_gnu_gcc. ++ ++ -- Begin_Handler_v1, called when entering an exception handler, ++ -- claims responsibility for the handler to release the ++ -- GCC_Exception occurrence. End_Handler_v1, called when ++ -- leaving the handler, releases the occurrence, unless the ++ -- occurrence is propagating further up, or the handler is ++ -- dynamically nested in the context of another handler that ++ -- claimed responsibility for releasing that occurrence. ++ ++ -- Responsibility is claimed by changing the Cleanup field to ++ -- Claimed_Cleanup, which enables claimed exceptions to be ++ -- recognized, and avoids accidental releases even by foreign ++ -- handlers. ++ ++ function Begin_Handler_v1 ++ (GCC_Exception : not null GCC_Exception_Access) ++ return System.Address; ++ pragma Export (C, Begin_Handler_v1, "__gnat_begin_handler_v1"); ++ -- Called when entering an exception handler. Claim ++ -- responsibility for releasing GCC_Exception, by setting the ++ -- cleanup/release function to Claimed_Cleanup, and return the ++ -- address of the previous cleanup/release function. ++ ++ procedure End_Handler_v1 ++ (GCC_Exception : not null GCC_Exception_Access; ++ Saved_Cleanup : System.Address; ++ Propagating_Exception : GCC_Exception_Access); ++ pragma Export (C, End_Handler_v1, "__gnat_end_handler_v1"); ++ -- Called when leaving an exception handler. Restore the ++ -- Saved_Cleanup in the GCC_Exception occurrence, and then release ++ -- it, unless it remains claimed by an enclosing handler, or ++ -- GCC_Exception and Propagating_Exception are the same ++ -- occurrence. Propagating_Exception could be either an ++ -- occurrence (re)raised within the handler of GCC_Exception, when ++ -- we're executing as an exceptional cleanup, or null, if we're ++ -- completing the handler of GCC_Exception normally. ++ ++ procedure Claimed_Cleanup ++ (Reason : Unwind_Reason_Code; ++ GCC_Exception : not null GCC_Exception_Access); ++ pragma Export (C, Claimed_Cleanup, "__gnat_claimed_cleanup"); ++ -- A do-nothing placeholder installed as GCC_Exception.Cleanup ++ -- while handling GCC_Exception, to claim responsibility for ++ -- releasing it, and to stop it from being accidentally released. ++ ++ -- The following are version 0 implementations of the version 1 ++ -- hooks above. They remain in place for compatibility with the ++ -- output of compilers that still use version 0, such as those ++ -- used during bootstrap. They are interoperable with the v1 ++ -- hooks, except that the older versions may malfunction when ++ -- handling foreign exceptions passed to Reraise_Occurrence. + + procedure Begin_Handler (GCC_Exception : not null GCC_Exception_Access); + pragma Export (C, Begin_Handler, "__gnat_begin_handler"); ++ -- Called when entering an exception handler translated by an old ++ -- compiler. It does nothing. + + procedure End_Handler (GCC_Exception : GCC_Exception_Access); + pragma Export (C, End_Handler, "__gnat_end_handler"); ++ -- Called when leaving an exception handler translated by an old ++ -- compiler. It releases GCC_Exception, unless it is null. It is ++ -- only ever null when the handler has a 'raise;' translated by a ++ -- v0-using compiler. The artificial handler variable passed to ++ -- End_Handler was set to null to tell End_Handler to refrain from ++ -- releasing the reraised exception. In v1 safer ways are used to ++ -- accomplish that. + + -------------------------------------------------------------------- + -- Accessors to Basic Components of a GNAT Exception Data Pointer -- +@@ -352,6 +412,128 @@ package body Exception_Propagation is + end if; + end Setup_Current_Excep; + ++ ---------------------- ++ -- Begin_Handler_v1 -- ++ ---------------------- ++ ++ function Begin_Handler_v1 ++ (GCC_Exception : not null GCC_Exception_Access) ++ return System.Address is ++ Saved_Cleanup : constant System.Address := GCC_Exception.Cleanup; ++ begin ++ -- Claim responsibility for releasing this exception, and stop ++ -- others from releasing it. ++ GCC_Exception.Cleanup := Claimed_Cleanup'Address; ++ return Saved_Cleanup; ++ end Begin_Handler_v1; ++ ++ -------------------- ++ -- End_Handler_v1 -- ++ -------------------- ++ ++ procedure End_Handler_v1 ++ (GCC_Exception : not null GCC_Exception_Access; ++ Saved_Cleanup : System.Address; ++ Propagating_Exception : GCC_Exception_Access) is ++ begin ++ GCC_Exception.Cleanup := Saved_Cleanup; ++ -- Restore the Saved_Cleanup, so that it is either used to ++ -- release GCC_Exception below, or transferred to the next ++ -- handler of the Propagating_Exception occurrence. The ++ -- following test ensures that an occurrence is only released ++ -- once, even after reraises. ++ -- ++ -- The idea is that the GCC_Exception is not to be released ++ -- unless it had an unclaimed Cleanup when the handler started ++ -- (see Begin_Handler_v1 above), but if we propagate across its ++ -- handler a reraise of the same exception, we transfer to the ++ -- Propagating_Exception the responsibility for running the ++ -- Saved_Cleanup when its handler completes. ++ -- ++ -- This ownership transfer mechanism ensures safety, as in ++ -- single release and no dangling pointers, because there is no ++ -- way to hold on to the Machine_Occurrence of an ++ -- Exception_Occurrence: the only situations in which another ++ -- Exception_Occurrence gets the same Machine_Occurrence are ++ -- through Reraise_Occurrence, and plain reraise, and so we ++ -- have the following possibilities: ++ -- ++ -- - Reraise_Occurrence is handled within the running handler, ++ -- and so when completing the dynamically nested handler, we ++ -- must NOT release the exception. A Claimed_Cleanup upon ++ -- entry of the nested handler, installed when entering the ++ -- enclosing handler, ensures the exception will not be ++ -- released by the nested handler, but rather by the enclosing ++ -- handler. ++ -- ++ -- - Reraise_Occurrence/reraise escapes the running handler, ++ -- and we run as an exceptional cleanup for GCC_Exception. The ++ -- Saved_Cleanup was reinstalled, but since we're propagating ++ -- the same machine occurrence, we do not release it. Instead, ++ -- we transfer responsibility for releasing it to the eventual ++ -- handler of the propagating exception. ++ -- ++ -- - An unrelated exception propagates through the running ++ -- handler. We restored GCC_Exception.Saved_Cleanup above. ++ -- Since we're propagating a different exception, we proceed to ++ -- release GCC_Exception, unless Saved_Cleanup was ++ -- Claimed_Cleanup, because then we know we're not in the ++ -- outermost handler for GCC_Exception. ++ -- ++ -- - The handler completes normally, so it reinstalls the ++ -- Saved_Cleanup and runs it, unless it was Claimed_Cleanup. ++ -- If Saved_Cleanup is null, Unwind_DeleteException (currently) ++ -- has no effect, so we could skip it, but if it is ever ++ -- changed to do more in this case, we're ready for that, ++ -- calling it exactly once. ++ if Saved_Cleanup /= Claimed_Cleanup'Address ++ and then ++ Propagating_Exception /= GCC_Exception ++ then ++ declare ++ Current : constant EOA := Get_Current_Excep.all; ++ Cur_Occ : constant GCC_Exception_Access ++ := To_GCC_Exception (Current.Machine_Occurrence); ++ begin ++ -- If we are releasing the Machine_Occurrence of the current ++ -- exception, reset the access to it, so that it is no ++ -- longer accessible. ++ if Cur_Occ = GCC_Exception then ++ Current.Machine_Occurrence := System.Null_Address; ++ end if; ++ end; ++ Unwind_DeleteException (GCC_Exception); ++ end if; ++ end End_Handler_v1; ++ ++ --------------------- ++ -- Claimed_Cleanup -- ++ --------------------- ++ ++ procedure Claimed_Cleanup ++ (Reason : Unwind_Reason_Code; ++ GCC_Exception : not null GCC_Exception_Access) is ++ pragma Unreferenced (Reason); ++ pragma Unreferenced (GCC_Exception); ++ begin ++ -- This procedure should never run. If it does, it's either a ++ -- version 0 handler or a foreign handler, attempting to ++ -- release an exception while a version 1 handler that claimed ++ -- responsibility for releasing the exception remains still ++ -- active. This placeholder stops GCC_Exception from being ++ -- released by them. ++ ++ -- We could get away with just Null_Address instead, with ++ -- nearly the same effect, but with this placeholder we can ++ -- detect and report unexpected releases, and we can tell apart ++ -- a GCC_Exception without a Cleanup, from one with another ++ -- active handler, so as to still call Unwind_DeleteException ++ -- exactly once: currently, Unwind_DeleteException does nothing ++ -- when the Cleanup is null, but should it ever be changed to ++ -- do more, we'll still be safe. ++ null; ++ end Claimed_Cleanup; ++ + ------------------- + -- Begin_Handler -- + ------------------- diff --git a/util/crossgcc/patches/gcc-8.3.0_libgcc.patch b/util/crossgcc/patches/gcc-8.4.0_libgcc.patch similarity index 100% rename from util/crossgcc/patches/gcc-8.3.0_libgcc.patch rename to util/crossgcc/patches/gcc-8.4.0_libgcc.patch diff --git a/util/crossgcc/patches/gcc-8.3.0_nds32_ite.patch b/util/crossgcc/patches/gcc-8.4.0_nds32_ite.patch similarity index 100% rename from util/crossgcc/patches/gcc-8.3.0_nds32_ite.patch rename to util/crossgcc/patches/gcc-8.4.0_nds32_ite.patch diff --git a/util/crossgcc/sum/gcc-8.3.0.tar.xz.cksum b/util/crossgcc/sum/gcc-8.3.0.tar.xz.cksum deleted file mode 100644 index b46ef8c..0000000 --- a/util/crossgcc/sum/gcc-8.3.0.tar.xz.cksum +++ /dev/null @@ -1 +0,0 @@ -c27f4499dd263fe4fb01bcc5565917f3698583b2 tarballs/gcc-8.3.0.tar.xz diff --git a/util/crossgcc/sum/gcc-8.4.0.tar.xz.cksum b/util/crossgcc/sum/gcc-8.4.0.tar.xz.cksum new file mode 100644 index 0000000..441f096 --- /dev/null +++ b/util/crossgcc/sum/gcc-8.4.0.tar.xz.cksum @@ -0,0 +1 @@ +00ddb177b04caffd40f7af0175d5b3c8e5442545 tarballs/gcc-8.4.0.tar.xz -- To view, visit https://review.coreboot.org/c/coreboot/+/42159 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icfc8430764404a6c272deb490fee23c963bd7ee5 Gerrit-Change-Number: 42159 Gerrit-PatchSet: 1 Gerrit-Owner: Iru Cai (vimacs) <mytbk920423(a)gmail.com> Gerrit-Reviewer: Iru Cai <mytbk920423(a)gmail.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: [WIP] ec/kontron/kempld: Add code to GPIOs control
by Maxim Polyakov (Code Review) 16 Jul '21

16 Jul '21

Maxim Polyakov has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/47595 ) Change subject: [WIP] ec/kontron/kempld: Add code to GPIOs control ...................................................................... [WIP] ec/kontron/kempld: Add code to GPIOs control This is based on code from the drivers/gpio/gpio-kempld.c linux driver. Tested on Kontron mAL10 COMe module with T10-TNI carrierboard [1]. [1] https://review.coreboot.org/c/coreboot/+/39133 Change-Id: Id767aa451fbf2ca1c0dccfc9aa2c024c6f37c1bb Signed-off-by: Maxim Polyakov <max.senia.poliak(a)gmail.com> --- M src/ec/kontron/kempld/Makefile.inc M src/ec/kontron/kempld/kempld.h A src/ec/kontron/kempld/kempld_gpio.c A src/ec/kontron/kempld/kempld_gpio.h 4 files changed, 118 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/95/47595/1 diff --git a/src/ec/kontron/kempld/Makefile.inc b/src/ec/kontron/kempld/Makefile.inc index 0d59886..e7bafa3 100644 --- a/src/ec/kontron/kempld/Makefile.inc +++ b/src/ec/kontron/kempld/Makefile.inc @@ -2,3 +2,4 @@ ramstage-$(CONFIG_EC_KONTRON_KEMPLD) += early_kempld.c ramstage-$(CONFIG_EC_KONTRON_KEMPLD) += kempld.c ramstage-$(CONFIG_EC_KONTRON_KEMPLD) += kempld_i2c.c +ramstage-$(CONFIG_EC_KONTRON_KEMPLD) += kempld_gpio.c diff --git a/src/ec/kontron/kempld/kempld.h b/src/ec/kontron/kempld/kempld.h index 6f624aa..7bd6ba3 100644 --- a/src/ec/kontron/kempld/kempld.h +++ b/src/ec/kontron/kempld/kempld.h @@ -13,4 +13,9 @@ void kempld_enable_uart_for_console(void); +int kempld_gpio_get(unsigned int offset); +void kempld_gpio_set(unsigned int offset, int value); +void kempld_gpio_direction_input(unsigned int offset); +void kempld_gpio_direction_output(unsigned int offset, int value); + #endif /* EC_KONTRON_KEMPLD_H */ diff --git a/src/ec/kontron/kempld/kempld_gpio.c b/src/ec/kontron/kempld/kempld_gpio.c new file mode 100644 index 0000000..b3307ae --- /dev/null +++ b/src/ec/kontron/kempld/kempld_gpio.c @@ -0,0 +1,83 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Kontron PLD driver definitions + * + * Copyright (c) 2010-2012 Kontron Europe GmbH + * Author: Michael Brunner <michael.brunner(a)kontron.com> + */ + +#include <stdint.h> +#include <arch/io.h> +#include <delay.h> +#include "chip.h" +#include "kempld.h" +#include "kempld_gpio.h" +#include "kempld_internal.h" + +int kempld_gpio_get(unsigned int offset) +{ + int status; + + if (kempld_get_mutex(100) < 0) + return 0; + + status = kempld_read8((u8)KEMPLD_GPIO_LVL_NUM(offset)); + status &= KEMPLD_GPIO_MASK(offset); + + kempld_release_mutex(); + + return status; +} + +void kempld_gpio_set(unsigned int offset, int value) +{ + int status; + + if (kempld_get_mutex(100) < 0) + return; + + status = kempld_read8((u8)KEMPLD_GPIO_LVL_NUM(offset)); + if (value) + status |= KEMPLD_GPIO_MASK(offset); + else + status &= ~KEMPLD_GPIO_MASK(offset); + kempld_write8((u8)KEMPLD_GPIO_LVL_NUM(offset), (u8)status); + + kempld_release_mutex(); +} + + +void kempld_gpio_direction_input(unsigned int offset) +{ + int status; + + if (kempld_get_mutex(100) < 0) + return; + + status = kempld_read8((u8)KEMPLD_GPIO_DIR_NUM(offset)); + status &= ~KEMPLD_GPIO_MASK(offset); + kempld_write8((u8)KEMPLD_GPIO_DIR_NUM(offset), (u8)status); + + kempld_release_mutex(); +} + +void kempld_gpio_direction_output(unsigned int offset, int value) +{ + int status; + + if (kempld_get_mutex(100) < 0) + return; + + status = kempld_read8((u8)KEMPLD_GPIO_LVL_NUM(offset)); + if (value) + status |= KEMPLD_GPIO_MASK(offset); + else + status &= ~KEMPLD_GPIO_MASK(offset); + kempld_write8((u8)KEMPLD_GPIO_LVL_NUM(offset), (u8)status); + + status = kempld_read8((u8)KEMPLD_GPIO_DIR_NUM(offset)); + status |= KEMPLD_GPIO_MASK(offset); + kempld_write8((u8)KEMPLD_GPIO_DIR_NUM(offset), (u8)status); + + kempld_release_mutex(); +} diff --git a/src/ec/kontron/kempld/kempld_gpio.h b/src/ec/kontron/kempld/kempld_gpio.h new file mode 100644 index 0000000..b918bd0 --- /dev/null +++ b/src/ec/kontron/kempld/kempld_gpio.h @@ -0,0 +1,29 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Kontron PLD driver definitions + * + * Copyright (c) 2010-2012 Kontron Europe GmbH + * Author: Michael Brunner <michael.brunner(a)kontron.com> + */ + +#ifndef _KEMPLD_GPIO_H_ +#define _KEMPLD_GPIO_H_ + +#define KEMPLD_GPIO_MAX_NUM 16 +#define KEMPLD_GPIO_MASK(x) (1 << ((x) % 8)) +#define KEMPLD_GPIO_DIR 0x40 +#define KEMPLD_GPIO_DIR_NUM(x) (0x40 + (x)/8) +#define KEMPLD_GPIO_LVL 0x42 +#define KEMPLD_GPIO_LVL_NUM(x) (0x42 + (x)/8) +#define KEMPLD_GPIO_STS 0x44 +#define KEMPLD_GPIO_STS_NUM(x) (0x44 + (x)/8) +#define KEMPLD_GPIO_EVT_LVL_EDGE 0x46 +#define KEMPLD_GPIO_EVT_LVL_EDGE_NUM(x) (0x46 + (x)/8) +#define KEMPLD_GPIO_EVT_LOW_HIGH 0x48 +#define KEMPLD_GPIO_EVT_LOW_HIGH_NUM(x) (0x48 + (x)/8) +#define KEMPLD_GPIO_IEN 0x4A +#define KEMPLD_GPIO_IEN_NUM(x) (0x4A + (x)/8) +#define KEMPLD_GPIO_NMIEN 0x4C +#define KEMPLD_GPIO_NMIEN_NUM(x) (0x4C + (x)/8) + +#endif /* _KEMPLD_GPIO_H_ */ -- To view, visit https://review.coreboot.org/c/coreboot/+/47595 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id767aa451fbf2ca1c0dccfc9aa2c024c6f37c1bb Gerrit-Change-Number: 47595 Gerrit-PatchSet: 1 Gerrit-Owner: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: [DONOTSUBMIT] build system: temporarily disable adding config to cbfs
by Patrick Georgi (Code Review) 14 Jul '21

14 Jul '21

Patrick Georgi has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42820 ) Change subject: [DONOTSUBMIT] build system: temporarily disable adding config to cbfs ...................................................................... [DONOTSUBMIT] build system: temporarily disable adding config to cbfs Makes comparisons between kconfig versions easier Change-Id: I30e4988b70785b3500a5b5284d760ea209c64ec4 Signed-off-by: Patrick Georgi <pgeorgi(a)google.com> --- M Makefile.inc 1 file changed, 3 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/20/42820/1 diff --git a/Makefile.inc b/Makefile.inc index 7f61a5e..a204908 100644 --- a/Makefile.inc +++ b/Makefile.inc @@ -1209,9 +1209,9 @@ vgaroms/seavgabios.bin-file := $(CONFIG_PAYLOAD_VGABIOS_FILE) vgaroms/seavgabios.bin-type := raw -cbfs-files-$(CONFIG_INCLUDE_CONFIG_FILE) += config -config-file := $(DOTCONFIG):defconfig -config-type := raw +# cbfs-files-$(CONFIG_INCLUDE_CONFIG_FILE) += config +# config-file := $(DOTCONFIG):defconfig +# config-type := raw cbfs-files-$(CONFIG_INCLUDE_CONFIG_FILE) += revision revision-file := $(obj)/build.h -- To view, visit https://review.coreboot.org/c/coreboot/+/42820 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I30e4988b70785b3500a5b5284d760ea209c64ec4 Gerrit-Change-Number: 42820 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-MessageType: newchange

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