coreboot-gerrit May 2021

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Change in coreboot[master]: mb/google/mancomb: Fix S0i3/S3 GPIO configuration
by Raul Rangel (Code Review) 03 May '21

03 May '21

Raul Rangel has submitted this change. ( https://review.coreboot.org/c/coreboot/+/52802 ) Change subject: mb/google/mancomb: Fix S0i3/S3 GPIO configuration ...................................................................... mb/google/mancomb: Fix S0i3/S3 GPIO configuration Using PAD_WAKE is actually wrong. The wake bits are only supposed to be set when using the GPIO controller to wake the system. coreboot's current architecture relies on using GPEs to wake the system. BUG=b:186011392 TEST=none Signed-off-by: Raul E Rangel <rrangel(a)chromium.org> Change-Id: Ib956fc299fe21cd7ea0b465cbdc5c8da830a668d Reviewed-on: https://review.coreboot.org/c/coreboot/+/52802 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> --- M src/mainboard/google/mancomb/variants/baseboard/gpio.c 1 file changed, 1 insertion(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified EricR Lai: Looks good to me, approved diff --git a/src/mainboard/google/mancomb/variants/baseboard/gpio.c b/src/mainboard/google/mancomb/variants/baseboard/gpio.c index a9346a3..f829117 100644 --- a/src/mainboard/google/mancomb/variants/baseboard/gpio.c +++ b/src/mainboard/google/mancomb/variants/baseboard/gpio.c @@ -47,7 +47,7 @@ /* AGPIO21 */ PAD_NC(GPIO_21), /* EC_SOC_WAKE_ODL */ - PAD_WAKE(GPIO_22, PULL_NONE, EDGE_LOW, S0i3), + PAD_SCI(GPIO_22, PULL_NONE, EDGE_LOW), /* AC_PRES */ PAD_NF(GPIO_23, AC_PRES, PULL_UP), /* HUB_RST_L */ -- To view, visit https://review.coreboot.org/c/coreboot/+/52802 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib956fc299fe21cd7ea0b465cbdc5c8da830a668d Gerrit-Change-Number: 52802 Gerrit-PatchSet: 4 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: merged

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Change in coreboot[master]: soc/amd/common: Add placeholder GPIO macro, PAD_UNCHANGED
by Furquan Shaikh (Code Review) 03 May '21

03 May '21

Attention is currently required from: Jason Glenesk, Raul Rangel, Martin Roth, Marshall Dawson, Felix Held. Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52763 ) Change subject: soc/amd/common: Add placeholder GPIO macro, PAD_UNCHANGED ...................................................................... Patch Set 1: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/52763/comment/09e1428a_8baece54 PS1, Line 9: GPIOs can only be updated in gpio_configure_pads_with_override() if they : are present in the base table. If they are not there, the override : does not work. This allows them to be in the base table so that they can : be overridden without changing the existing configuration. > Hrmm, can we die() if we encounter such a problem? It's a configuration error that needs to be fixed […] This is nothing to do about "behavior in Intel ChromeOS platforms". The primary reason is that mainboard must configure all pads in ramstage. Now, with the base/override logic, the base table is expected to contain the configuration for all pads so that the override table can update those in case they differ from what the base table provides. The solution depends on what the end goal is. If it is to ensure we avoid these misconfigurations, then a `die()` call makes sense. -- To view, visit https://review.coreboot.org/c/coreboot/+/52763 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7e5e7b7d30f2c89fa1db375ddba394e6914d97b9 Gerrit-Change-Number: 52763 Gerrit-PatchSet: 1 Gerrit-Owner: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Mon, 03 May 2021 18:55:43 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Raul Rangel <rrangel(a)chromium.org> Comment-In-Reply-To: Martin Roth <martinroth(a)google.com> Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel: Don't select VBOOT_SEPARATE_VERSTAGE
by Furquan Shaikh (Code Review) 03 May '21

03 May '21

Attention is currently required from: Martin Roth, Tim Wawrzynczak, Julius Werner, Arthur Heymans, Aaron Durbin, Patrick Rudolph, Karthik Ramasubramanian. Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52788 ) Change subject: soc/intel: Don't select VBOOT_SEPARATE_VERSTAGE ...................................................................... Patch Set 4: Code-Review+1 (1 comment) Patchset: PS4: > Should be fine, but I wanted others to provide their opinion. Seems okay to me. My understanding is that we use VBOOT_SEPARATE_VERSTAGE in a couple of scenarios: 1. Reducing bootblock size (where the slow boot ROM SPI drivers result in boot time impact). 2. Using the overlapping romstage-verstage in memlayout (RETURN_FROM_VERSTAGE) for limited SRAM capacity. For x86 platforms being updated here, we boot from memory-mapped boot media. So, there is no concern about bootblock loading or SRAM capacity. The only other reason to use VBOOT_SEPARATE_VERSTAGE here was because of the coreboot restriction on bootblock size. If we no longer have the bootblock size restriction, then it should be okay to drop VBOOT_SEPARATE_VERSTAGE selection for these platforms. I will CR+1 for now to let others take a look. -- To view, visit https://review.coreboot.org/c/coreboot/+/52788 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5e02961183b5bcc37365458a3b10342e5bc2b525 Gerrit-Change-Number: 52788 Gerrit-PatchSet: 4 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Mon, 03 May 2021 18:38:54 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Aaron Durbin <adurbin(a)chromium.org> Gerrit-MessageType: comment

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Change in coreboot[master]: util/intelp2m: Set GO111MODULE environment parameter explicitly
by Jonathan Zhang (Code Review) 03 May '21

03 May '21

Attention is currently required from: Maxim Polyakov, Arthur Heymans. Jonathan Zhang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52862 ) Change subject: util/intelp2m: Set GO111MODULE environment parameter explicitly ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/52862 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I93a516ff76c8da4b7f37157d58ecd4c0b09c582c Gerrit-Change-Number: 52862 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Attention: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Mon, 03 May 2021 18:31:33 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: util/intelp2m: Set GO111MODULE environment parameter explicitly
by Arthur Heymans (Code Review) 03 May '21

03 May '21

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/52862 ) Change subject: util/intelp2m: Set GO111MODULE environment parameter explicitly ...................................................................... util/intelp2m: Set GO111MODULE environment parameter explicitly With go1.16 the default for GO111MODULE changed to on which break building this tool. Change-Id: I93a516ff76c8da4b7f37157d58ecd4c0b09c582c Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M util/intelp2m/Makefile 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/62/52862/1 diff --git a/util/intelp2m/Makefile b/util/intelp2m/Makefile index 1d9ba70..524ecd6 100644 --- a/util/intelp2m/Makefile +++ b/util/intelp2m/Makefile @@ -5,7 +5,7 @@ default: go version - go build -v -o $(PROJECT_NAME) + GO111MODULE=off go build -v -o $(PROJECT_NAME) clean: rm -Rf $(PROJECT_NAME) $(OUTPUT_DIR) -- To view, visit https://review.coreboot.org/c/coreboot/+/52862 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I93a516ff76c8da4b7f37157d58ecd4c0b09c582c Gerrit-Change-Number: 52862 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newchange

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Change in coreboot[master]: x86/exception: Print the offset within the stage that caused the fault
by build bot (Jenkins) (Code Review) 03 May '21

03 May '21

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52861 ) Change subject: x86/exception: Print the offset within the stage that caused the fault ...................................................................... Patch Set 1: (2 comments) File src/arch/x86/exception.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118262): https://review.coreboot.org/c/coreboot/+/52861/comment/786e55d7_5ddcc563 PS1, Line 381: if ((uintptr_t)_program <= IP && (uintptr_t)_eprogram > IP ) space prohibited before that close parenthesis ')' Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118262): https://review.coreboot.org/c/coreboot/+/52861/comment/e53e0da9_8d826e7d PS1, Line 383: "Faulty instruction is in " ENV_STRING " at offset 0x%zx\n", IP - (uintptr_t)_program); line over 96 characters -- To view, visit https://review.coreboot.org/c/coreboot/+/52861 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0c44e4ee773ccf4bdd25b551949e02d754681417 Gerrit-Change-Number: 52861 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 03 May 2021 18:24:13 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: x86/exception: Print the offset within the stage that caused the fault
by Patrick Rudolph (Code Review) 03 May '21

03 May '21

Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/52861 ) Change subject: x86/exception: Print the offset within the stage that caused the fault ...................................................................... x86/exception: Print the offset within the stage that caused the fault To ease debugging print the offset if it's within the current stage. This is more convenient than searching the log for the rmodule loading address and subtracting it manually from the IP. Change-Id: I0c44e4ee773ccf4bdd25b551949e02d754681417 Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> --- M src/arch/x86/exception.c 1 file changed, 19 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/61/52861/1 diff --git a/src/arch/x86/exception.c b/src/arch/x86/exception.c index f10c7bf..e9a0da2 100644 --- a/src/arch/x86/exception.c +++ b/src/arch/x86/exception.c @@ -372,9 +372,17 @@ #endif /* CONFIG_GDB_STUB */ #include <arch/registers.h> +#include <symbols.h> void x86_exception(struct eregs *info); +static void program_offset(uintptr_t IP) +{ + if ((uintptr_t)_program <= IP && (uintptr_t)_eprogram > IP ) + printk(BIOS_EMERG, + "Faulty instruction is in " ENV_STRING " at offset 0x%zx\n", IP - (uintptr_t)_program); +} + void x86_exception(struct eregs *info) { #if CONFIG(GDB_STUB) @@ -496,6 +504,10 @@ printk(BIOS_EMERG, "CPU Index %d - APIC %d Unexpected Exception:\n" "%lld @ %02llx:%016llx - Halting\n" + logical_processor, (unsigned int)lapicid(), + info->vector, info->cs, info->rip); + program_offset(info->rip); + printk(BIOS_EMERG, "Code: %lld rflags: %016llx cr2: %016llx\n" "rax: %016llx rbx: %016llx\n" "rcx: %016llx rdx: %016llx\n" @@ -505,8 +517,6 @@ "r10: %016llx r11: %016llx\n" "r12: %016llx r13: %016llx\n" "r14: %016llx r15: %016llx\n", - logical_processor, (unsigned int)lapicid(), - info->vector, info->cs, info->rip, info->error_code, info->rflags, read_cr2(), info->rax, info->rbx, info->rcx, info->rdx, info->rdi, info->rsi, info->rbp, info->rsp, @@ -518,12 +528,16 @@ printk(BIOS_EMERG, "CPU Index %d - APIC %d Unexpected Exception:" - "%d @ %02x:%08x - Halting\n" + "%d @ %02x:%08x - Halting\n", + logical_processor, (unsigned int)lapicid(), + info->vector, info->cs, info->eip); + + program_offset(info->eip); + + printk(BIOS_EMERG, "Code: %d eflags: %08x cr2: %08x\n" "eax: %08x ebx: %08x ecx: %08x edx: %08x\n" "edi: %08x esi: %08x ebp: %08x esp: %08x\n", - logical_processor, (unsigned int)lapicid(), - info->vector, info->cs, info->eip, info->error_code, info->eflags, read_cr2(), info->eax, info->ebx, info->ecx, info->edx, info->edi, info->esi, info->ebp, info->esp); -- To view, visit https://review.coreboot.org/c/coreboot/+/52861 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0c44e4ee773ccf4bdd25b551949e02d754681417 Gerrit-Change-Number: 52861 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/intel/skylake: Drop EXCLUDE_NATIVE_SD_INTERFACE
by Furquan Shaikh (Code Review) 03 May '21

03 May '21

Attention is currently required from: Felix Singer, Nico Huber, Martin Roth, Tim Wawrzynczak, Angel Pons, Subrata Banik. Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52789 ) Change subject: soc/intel/skylake: Drop EXCLUDE_NATIVE_SD_INTERFACE ...................................................................... Patch Set 5: (1 comment) File src/soc/intel/skylake/acpi/scs.asl: https://review.coreboot.org/c/coreboot/+/52789/comment/ce04605d_6302986b PS5, Line 120: 0x4c4 Did you confirm that the mainboards do not use these GPIOs for some other purpose? Else, it would be wrong to change the GPIO configuration here. -- To view, visit https://review.coreboot.org/c/coreboot/+/52789 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id07f59b5252cf3862724d6ff3d7c54d51ccfd9a6 Gerrit-Change-Number: 52789 Gerrit-PatchSet: 5 Gerrit-Owner: Felix Singer <felixsinger(a)posteo.net> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Michael Niewöhner <foss(a)mniewoehner.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Singer <felixsinger(a)posteo.net> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Comment-Date: Mon, 03 May 2021 18:23:21 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel: Don't select VBOOT_SEPARATE_VERSTAGE
by Aaron Durbin (Code Review) 03 May '21

03 May '21

Attention is currently required from: Furquan Shaikh, Martin Roth, Tim Wawrzynczak, Arthur Heymans, Patrick Rudolph, Karthik Ramasubramanian. Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52788 ) Change subject: soc/intel: Don't select VBOOT_SEPARATE_VERSTAGE ...................................................................... Patch Set 4: (1 comment) Patchset: PS4: Should be fine, but I wanted others to provide their opinion. -- To view, visit https://review.coreboot.org/c/coreboot/+/52788 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5e02961183b5bcc37365458a3b10342e5bc2b525 Gerrit-Change-Number: 52788 Gerrit-PatchSet: 4 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Mon, 03 May 2021 18:10:02 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: nb/intel: Don't select VBOOT_SEPARATE_VERSTAGE
by Aaron Durbin (Code Review) 03 May '21

03 May '21

Attention is currently required from: Angel Pons, Arthur Heymans. Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52787 ) Change subject: nb/intel: Don't select VBOOT_SEPARATE_VERSTAGE ...................................................................... Patch Set 4: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/52787 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic92ecf8068f327a893d20924685ce571752d379f Gerrit-Change-Number: 52787 Gerrit-PatchSet: 4 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Mon, 03 May 2021 18:08:42 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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coreboot-gerrit May 2021