coreboot-gerrit May 2021

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Change in coreboot[master]: mb/adlrvp: Fix DDR5 Boot issue
by Deepti Deshatty (Code Review) 04 May '21

04 May '21

Attention is currently required from: Furquan Shaikh, Maulik V Vaghela, Subrata Banik, Meera Ravindranath. Deepti Deshatty has uploaded a new patch set (#6) to the change originally created by Meera Ravindranath. ( https://review.coreboot.org/c/coreboot/+/50996 ) Change subject: mb/adlrvp: Fix DDR5 Boot issue ...................................................................... mb/adlrvp: Fix DDR5 Boot issue Currently, DDR5 boot is broken due to reading of spd data via SMBus through coreboot. This implementation requires study of spd5 architecture and is currently Work In Progress. Switching to the older implemention of booting DDR5 by passing DIMM slave address to FSP through this CL. BUG=b:180458099 TEST=Boot DDR5 to kernel Signed-off-by: Meera Ravindranath <meera.ravindranath(a)intel.com> Change-Id: I9998bfcd12b81c11fcc9f791da2a27d3c788e48a --- M src/mainboard/intel/adlrvp/romstage_fsp_params.c 1 file changed, 7 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/50996/6 -- To view, visit https://review.coreboot.org/c/coreboot/+/50996 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9998bfcd12b81c11fcc9f791da2a27d3c788e48a Gerrit-Change-Number: 50996 Gerrit-PatchSet: 6 Gerrit-Owner: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Meera Ravindranath <meera.ravindranath(a)intel.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: drivers/i2c/generic: Set S0W to D3hot for wake device
by Furquan Shaikh (Code Review) 04 May '21

04 May '21

Attention is currently required from: Tony Huang, Keith Tzeng, Wisley Chen. Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52847 ) Change subject: drivers/i2c/generic: Set S0W to D3hot for wake device ...................................................................... Patch Set 8: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/52847 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I34e4b2350875530d3337be700276bcc4fb1f810a Gerrit-Change-Number: 52847 Gerrit-PatchSet: 8 Gerrit-Owner: Tony Huang <tony-huang(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Keith Tzeng <keith.tzeng(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Sam McNally <sammc(a)google.com> Gerrit-Reviewer: Wisley Chen <wisley.chen(a)quanta.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Tony Huang <tony-huang(a)quanta.corp-partner.google.com> Gerrit-Attention: Keith Tzeng <keith.tzeng(a)quanta.corp-partner.google.com> Gerrit-Attention: Wisley Chen <wisley.chen(a)quanta.corp-partner.google.com> Gerrit-Comment-Date: Tue, 04 May 2021 07:00:18 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/brya: Enable DPTF functionality for Brya
by John Su (Code Review) 04 May '21

04 May '21

John Su has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52691 ) Change subject: mb/google/brya: Enable DPTF functionality for Brya ...................................................................... Patch Set 2: (1 comment) Patchset: PS2: > Patch Set 2: > > (3 comments) > > This change is ready for review. Hi Sumeet Thanks your review. I just create dptf device tree for byra. Wait to our thermal team provide correct thermal table. And I will update CL for review. -- To view, visit https://review.coreboot.org/c/coreboot/+/52691 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I225bc5e5836312a4c1dfabe46ddc5e754f79deb8 Gerrit-Change-Number: 52691 Gerrit-PatchSet: 2 Gerrit-Owner: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-Reviewer: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Alan Lee <alan_lee(a)compal.corp-partner.google.com> Gerrit-CC: Amanda Hwang <amanda_hwang(a)compal.corp-partner.google.com> Gerrit-CC: Frank Wu <frank_wu(a)compal.corp-partner.google.com> Gerrit-CC: Ivy Jian <ivy_jian(a)compal.corp-partner.google.com> Gerrit-CC: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Comment-Date: Tue, 04 May 2021 06:56:52 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/octopus: add audio codec into SSFC support for Phaser
by build bot (Jenkins) (Code Review) 04 May '21

04 May '21

Attention is currently required from: Kevin Chang. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52878 ) Change subject: mb/google/octopus: add audio codec into SSFC support for Phaser ...................................................................... Patch Set 4: (1 comment) File src/mainboard/google/octopus/variants/phaser/gpio.c: Robot Comment from checkpatch (run ID jenkins-coreboot-checkpatch-118339): https://review.coreboot.org/c/coreboot/+/52878/comment/5f30ca32_c08a0fed PS4, Line 40: PAD_CFG_GPI_APIC_IOS(GPIO_137,NONE, DEEP, LEVEL, INVERT, HIZCRx1, space required after that ',' (ctx:VxV) -- To view, visit https://review.coreboot.org/c/coreboot/+/52878 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I202f71f57ad2db84fb90b52f9ffd7a1fd05494a3 Gerrit-Change-Number: 52878 Gerrit-PatchSet: 4 Gerrit-Owner: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com> Gerrit-Comment-Date: Tue, 04 May 2021 06:55:04 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/octopus: add audio codec into SSFC support for Phaser
by Kevin Chang (Code Review) 04 May '21

04 May '21

Attention is currently required from: Kevin Chang. Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/52878 to look at the new patch set (#4). Change subject: mb/google/octopus: add audio codec into SSFC support for Phaser ...................................................................... mb/google/octopus: add audio codec into SSFC support for Phaser Add audio codec module RT5682I in project. BUG=b:182221327 BRANCH=octopus TEST=adjust SSFC value of CBI to select RT5682I or DA7219 then check whether device tree is updated correspondingly by disabling unselected one. Signed-off-by: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com> Change-Id: I202f71f57ad2db84fb90b52f9ffd7a1fd05494a3 --- M src/mainboard/google/octopus/Kconfig.name M src/mainboard/google/octopus/variants/phaser/gpio.c M src/mainboard/google/octopus/variants/phaser/overridetree.cb 3 files changed, 18 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/78/52878/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/52878 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I202f71f57ad2db84fb90b52f9ffd7a1fd05494a3 Gerrit-Change-Number: 52878 Gerrit-PatchSet: 4 Gerrit-Owner: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: arch/x86/walkcbfs.S: Use FMAP instead "cbfs master header"
by Arthur Heymans (Code Review) 04 May '21

04 May '21

Arthur Heymans has uploaded a new patch set (#2). ( https://review.coreboot.org/c/coreboot/+/52879 ) Change subject: arch/x86/walkcbfs.S: Use FMAP instead "cbfs master header" ...................................................................... arch/x86/walkcbfs.S: Use FMAP instead "cbfs master header" Tested on qemu/i440fx on X86_64: - Page tables are found in cbfs (finding a file works) - returns 0 when a file is not found - works when there is no cbfs file at the start of the FMAP, e.g. with the cbfs master header removed. Change-Id: Ibab657cc40cd5c09c3a73c54950b98ac45a98dbf Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/arch/x86/walkcbfs.S 1 file changed, 5 insertions(+), 25 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/79/52879/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/52879 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibab657cc40cd5c09c3a73c54950b98ac45a98dbf Gerrit-Change-Number: 52879 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/dedede: Create pirika variant
by Karthik Ramasubramanian (Code Review) 04 May '21

04 May '21

Attention is currently required from: Paul Fagerburg, Paul2 Huang, Kirk Wang, Shou-Chieh Hsu. Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52626 ) Change subject: mb/google/dedede: Create pirika variant ...................................................................... Patch Set 1: Code-Review+1 (2 comments) Patchset: PS1: Other than the comment, it looks good. File src/mainboard/google/dedede/Kconfig.name: https://review.coreboot.org/c/coreboot/+/52626/comment/f5abb5da_5b595214 PS1, Line 138: bool "-> Pirika" Is it based on CR50 or TPM2. Please enable the config accordingly. This used to be enabled by default earlier. But with second sourcing of TPM, we need to enable this explicitly. -- To view, visit https://review.coreboot.org/c/coreboot/+/52626 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I57bf33deeadacc88800f9ce1d3d54385ba56c798 Gerrit-Change-Number: 52626 Gerrit-PatchSet: 1 Gerrit-Owner: Kirk Wang Gerrit-Reviewer: Alex1 Kao <alex1_kao(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Henry Sun <henrysun(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Kirk Wang <kirk_wang(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Paul Fagerburg <pfagerburg(a)chromium.org> Gerrit-Reviewer: Paul2 Huang <paul2_huang(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Ariel Chang <ariel_chang(a)pegatron.corp-partner.google.com> Gerrit-CC: Hao Chou <hao_chou(a)pegatron.corp-partner.google.com> Gerrit-CC: Wayne3 Wang <wayne3_wang(a)pegatron.corp-partner.google.com> Gerrit-Attention: Paul Fagerburg <pfagerburg(a)chromium.org> Gerrit-Attention: Paul2 Huang <paul2_huang(a)pegatron.corp-partner.google.com> Gerrit-Attention: Kirk Wang Gerrit-Attention: Shou-Chieh Hsu <shouchieh(a)google.com> Gerrit-Comment-Date: Tue, 04 May 2021 06:51:19 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/octopus: add audio codec into SSFC support for Phaser
by Kevin Chang (Code Review) 04 May '21

04 May '21

Attention is currently required from: Kevin Chang. Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/52878 to look at the new patch set (#3). Change subject: mb/google/octopus: add audio codec into SSFC support for Phaser ...................................................................... mb/google/octopus: add audio codec into SSFC support for Phaser Add audio codec module RT5682I in project. BUG=b:182221327 BRANCH=octopus TEST=adjust SSFC value of CBI to select RT5682I or DA7219 then check whether device tree is updated correspondingly by disabling unselected one. Signed-off-by: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com> Change-Id: I202f71f57ad2db84fb90b52f9ffd7a1fd05494a3 --- M src/mainboard/google/octopus/Kconfig.name M src/mainboard/google/octopus/variants/phaser/gpio.c M src/mainboard/google/octopus/variants/phaser/overridetree.cb 3 files changed, 18 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/78/52878/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/52878 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I202f71f57ad2db84fb90b52f9ffd7a1fd05494a3 Gerrit-Change-Number: 52878 Gerrit-PatchSet: 3 Gerrit-Owner: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Kevin Chang <kevin.chang(a)lcfc.corp-partner.google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: drivers/i2c/generic: Set S0W to D3hot for wake device
by Tony Huang (Code Review) 04 May '21

04 May '21

Attention is currently required from: Furquan Shaikh, Tony Huang, Keith Tzeng, Wisley Chen. Hello Sam McNally, build bot (Jenkins), Furquan Shaikh, Edward O'Callaghan, Keith Tzeng, Wisley Chen, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/52847 to look at the new patch set (#8). Change subject: drivers/i2c/generic: Set S0W to D3hot for wake device ...................................................................... drivers/i2c/generic: Set S0W to D3hot for wake device If device is supported as a wake source, _S0W should be set to D3hot. This ensures that the device is put into D3hot by the OSPM. Power resource(PRIC) for the device is listed in both _PR0 and _PR3. Thus, it ensures that the OSPM does not turn off power resource when device is put into D0 and D3hot. Hence, it is capable of waking the system from D3hot state. However, if it is put into D3cold, then the power resource is turned off by the OSPM. The devices we are currently looking at for touchscreen/touchpad do not really support auxiliary power and so do not support wake from D3cold. BUG=b:186070097 TEST=build and check device wake state _S0W set to 3 in ssdt table. Change-Id: I34e4b2350875530d3337be700276bcc4fb1f810a Signed-off-by: Tony Huang <tony-huang(a)quanta.corp-partner.google.com> --- M Documentation/acpi/devicetree.md M src/drivers/i2c/generic/generic.c 2 files changed, 3 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/47/52847/8 -- To view, visit https://review.coreboot.org/c/coreboot/+/52847 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I34e4b2350875530d3337be700276bcc4fb1f810a Gerrit-Change-Number: 52847 Gerrit-PatchSet: 8 Gerrit-Owner: Tony Huang <tony-huang(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Keith Tzeng <keith.tzeng(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Sam McNally <sammc(a)google.com> Gerrit-Reviewer: Wisley Chen <wisley.chen(a)quanta.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Tony Huang <tony-huang(a)quanta.corp-partner.google.com> Gerrit-Attention: Keith Tzeng <keith.tzeng(a)quanta.corp-partner.google.com> Gerrit-Attention: Wisley Chen <wisley.chen(a)quanta.corp-partner.google.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: arch/x86/walkcbfs.S: Use FMAP instead "cbfs master header"
by Arthur Heymans (Code Review) 04 May '21

04 May '21

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/52879 ) Change subject: arch/x86/walkcbfs.S: Use FMAP instead "cbfs master header" ...................................................................... arch/x86/walkcbfs.S: Use FMAP instead "cbfs master header" Tested on qemu/i440fx on X86_64. Page tables are found in cbfs. Change-Id: Ibab657cc40cd5c09c3a73c54950b98ac45a98dbf Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/arch/x86/walkcbfs.S 1 file changed, 5 insertions(+), 25 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/79/52879/1 diff --git a/src/arch/x86/walkcbfs.S b/src/arch/x86/walkcbfs.S index 393bcf5..4608e2c 100644 --- a/src/arch/x86/walkcbfs.S +++ b/src/arch/x86/walkcbfs.S @@ -1,13 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#define CBFS_HEADER_PTR 0xfffffffc - -#define CBFS_HEADER_MAGIC 0 -#define CBFS_HEADER_VERSION (CBFS_HEADER_MAGIC + 4) -#define CBFS_HEADER_ROMSIZE (CBFS_HEADER_VERSION + 4) -#define CBFS_HEADER_BOOTBLOCKSIZE (CBFS_HEADER_ROMSIZE + 4) -#define CBFS_HEADER_ALIGN (CBFS_HEADER_BOOTBLOCKSIZE + 4) -#define CBFS_HEADER_OFFSET (CBFS_HEADER_ALIGN + 4) +#include <fmap_config.h> /* we use this instead of CBFS_HEADER_ALIGN because the latter is retired. */ #define CBFS_ALIGNMENT 64 @@ -33,14 +26,7 @@ walkcbfs_asm: cld - mov CBFS_HEADER_PTR, %eax - mov CBFS_HEADER_ROMSIZE(%eax), %ecx - bswap %ecx - mov $0, %ebx - sub %ecx, %ebx /* ROM base address in ebx */ - mov CBFS_HEADER_OFFSET(%eax), %ecx - bswap %ecx - add %ecx, %ebx /* address where we start looking for LARCHIVEs */ + movl $FMAP_SECTION_COREBOOT_START, %ebx /* determine filename length */ mov $0, %eax @@ -96,17 +82,11 @@ mov %ecx, %ebx check_for_exit: - /* look if we should exit: did we pass into the bootblock already? */ - mov CBFS_HEADER_PTR, %ecx - mov CBFS_HEADER_BOOTBLOCKSIZE(%ecx), %ecx - bswap %ecx - not %ecx - add $1, %ecx + /* if addr <= COREBOOT_END - 1, continue */ +#define FMAP_SECTION_COREBOOT_END (FMAP_SECTION_COREBOOT_START - 1 + FMAP_SECTION_COREBOOT_SIZE) + movl $FMAP_SECTION_COREBOOT_END, %ecx cmp %ecx, %ebx - /* if bootblockstart >= addr (==we're still in the data area), - * jump back - */ jbe walker out: -- To view, visit https://review.coreboot.org/c/coreboot/+/52879 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibab657cc40cd5c09c3a73c54950b98ac45a98dbf Gerrit-Change-Number: 52879 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newchange

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coreboot-gerrit May 2021